Power Amplifiers Sheet
Power Amplifiers Sheet
Power Amplifiers Sheet
CLASSES OF AMPLIFIERS
Power amplifiers are classified according to the percent of time that collector
current is nonzero. There are four principal classifications: Class A, Class B, Class
AB, and Class C.
Class─A Operation
The collector current is nonzero 100% of the time. This type of operation is
insufficient, since even with zero input signal, ICQ is nonzero. The transistor
therefore dissipates power in the rest, or quiescent condition.
iC
Saturation region
t
2ICQ
AC load line
t
ICQ
DC load line
/
vCE
Cutoff region CC VCC
With Class─B operation, one amplifier is used to amplify the positive half─cycle of
the input signal while a second amplifier is used to amplify the negative half─cycle.
This amplifier configuration is known as push─pull or complementary symmetry.
The advantage of Class─B operation is that the collector current is zero when
the signal input to the amplifier is zero. Therefore, the transistor dissipates no power
in the quiescent condition.
Among the disadvantages of a Class─B amplifier is that the nonlinear cutoff
region is included in the operating range. That is, unlike the Class─A situation, the
5% of the operating region shaded at the bottom of Figure 11.1 is included in the
operating region. Therefore, distortion occurring near the Q─point is included in
the output signal.
Saturation
+i C region
Transistor 1
Transistor 1 conducts Cutoff
Transistor 2 cutoff t regions
Transistor 1 cutoff
Transistor 1 Transistor 2 conducts
Transistor 2
─ vCE
+ vCE
AC load line
Transistor 1
Saturation
AC load line region
Figure 11.2 Transistor 2 Transistor 2
Class─A operation. −i C
iC Amplifier 1 conducts ─iC Amplifier 1 conducts iC
positive portion only positive portion only
Amplifier 1
Amplifier 2 cutoff Amplifier 2 cutoff
output
t t t
Amplifier 2
(a) (b) (c) output
Class─AB Operation
Class─A operation has the advantage of little distortion, and Class─B has the
advantage of higher efficiency. Class─AB operation is a compromise between these
two extremes. The Q─point is set slightly above the cutoff value, so it is at the lower
boundary of the linear (no distortion) portion of the operating curves. The transistor
therefore supports a nonzero collector current for slightly more than 50% of the
time.
Figure 11.4 illustrates the positive portion of the operating curve for a sinusoidal
input and Class─AB operation. Note that ICQ is slightly above zero to reduce the
distortion. The Class─AB amplifier is, of course, used in a push─pull type of
arrangement.
Class─C Operation
A Class─C amplifier load line is shown in Figure 11.5, where VBEQ is set to a
negative value. The transistor is biased with a negative VBB. Thus it will conduct
only when the input signal is above a specified positive value. The output is less
than one─half of a sinusoid and the collector current is nonzero less than 50% of
the time.
iC
Time, t
Positive part of
input signal
Negative part of
input signal
Figure 11.4
ICQ
Class─AB vCE
operation.
iC
Output t
waveform
AC load
line Positive half of
t
Transistor vCE input signal
cutoff AC load line
VBEQ
extended
Figure 11.5
Class─C operation.
Power amplifier circuits usually contain transistors capable of handling high power.
These normally operate at higher voltages than do low─power transistors, and they
therefore often require a separate power supply. For example, voltages of power
transistors can exceed 450 V. Current ratings are also high, often in excess of 10 A
continuous current. Since these transistors need to dissipate high power, they are
designed differently from low─power transistors. Additional effort is expended to
dissipate heat that builds up during operation.
In this section, we discuss some useful circuit configurations for power
amplifiers. These are categorized according to the type of coupling.
+VCC
iC
CC DC load line
R2 L 1
C L Slope = −
coil+ E
C +
• iL ICQ Qpoint
+
RL v0 • AC load line
vin R1 1
RE Slope = −
L
C
• VCEQ » VCC »2VCC
vCE
(a) (b)
Figure 11.6 Inductively coupled amplifier.
Inductively─Coupled Amplifier
The inductor is selected so that it approximates an open circuit for the input
frequency but a short circuit for DC. In other words,
wL >> RL
CC
=
ac dc
The AC resistance is simply RL, since the inductor is an approximate open circuit
for AC and the capacitors are short circuits. The DC resistance is RE provided that
we can neglect the resistance of the inductor. Therefore,
CC
= (11.1)
L E
Since both DC and AC load lines cross at the Q─point, the AC load line equation
yields
CEQ
= (11.2)
L
We have assumed RE << RL, which is usually true. Then from Equations (11.1) and
(11.2) we see that VCEQ » VCC and the AC load line intersects the vCE axis at
approximately 2VCC. The use of the storage device (inductor) results in a voltage
swing that is effectively equivalent to doubling the supply voltage. The inductor
field stores energy during the conducting cycle and thus acts like a second VCC
source in series with the DC supply.
The inductively coupled amplifier has high efficiency than the amplifier that
contains a collector resistance. To provide this, we calculate the efficiency of this
amplifier, assuming sinusoidal input signals.
The power supplied by the voltage source is
2
CC
= + = CEQ CQ +
1 2
2 2 2
CEQ CC CC CC
= CC + = +
L 1 2 L 1 2
where we ignore RE because we assume that RE << RL. The power delivered to the
load
2
2 2 L 2 L CC
= Lrms L = Lmax = CQ =
L
We define conversion efficiency, h, as the ratio of AC load power to the power
supplied by the DC source. Therefore,
2
CC L
h= = 2 2 ( 1
CC L CC 2)
This efficiency measure therefore depends on the power dissipated in the bias
circuitry and in RE. To derive a maximum value for efficiency, we assume that the
power dissipated in the bias circuitry, in RE, and in Rcoil is negligible. The maximum
conversion efficiency is then given by
2
CC L
hmax = 2 × 100% = 50%
CC L
2
ac = L
CC CC
CQ = = 2 (11.3)
ac dc L
+VCC
AC load line
iC
R2 DC load line
1
Slope = −
• 2ICQ transistor
+
C a:1 Qpoint
••
iL 1
vin R1
RL
+
v0
ICQ
• Slope = − AC + transistor
• VCEQ » VCC »2VCC
vCE
(a) (b)
Figure 11.7 Transformer─coupled power amplifier.
In the last equality, we assume that the transformer primary resistance is negligible
and therefore that Rdc = 0.
In the design of CE amolifiers, we select the base resistance, RB, from the bias
stability design equation
RB = 0.1βRE
Neglecting the power dissipated in the bias circuitry, the maximum conversion
efficiency is given by
2 2
CC L
hmax = 2 2 × 100% = 50%
CC L
Example
Design 11.1 Transformer─Coupled
a transformer Amplifier
─coupled amplifier (see Figure 11.3) for a current gain of 80,
VCC = 12 V, VBE = 0.7 V, β = 100, a = 8, and RL = 8 Ω. Find the power supplied to
the load, the power required from the supply, and conversion efficiency.
SOLUTION We first use the design equation to find the location of the Q─point
for maximum output swing.
CC CC V
CQ = = 2 = 2 Ω
= 23.4 mA
ac dc L
Since the problem statement requires a current gain of 80, the amplifier must have
a current gain of 10 because the transformer provides an additional gain of 8 (equal
to turns ratio). We use the equation of Ai from Section 3.3 to find the base resistance,
RB .
B
i =( = 10
B⁄ ) ib ac
where
2
ac = E = L = 512 Ω
We note that hib is sufficiently small to be neglected. Then solving for RB yields
B = 5.69 kΩ
CQ B
BB = BQ B + BE = + BE = 2.03 V
CC B
2 = = 33.6 kΩ
BB
1 2
Since BB = 1‖ 2 = , therefore
1 2
BB ( 1 2)
1 = = 6.85 kΩ
2
The design is now complete. The power delivered by the source is given by
2 2
CC CC
= 2 + = 284 mW
L 1 2
h= = = 0.4 or 40%
EXERCISE 11.1
A Class─B audio amplifier uses one transistor to amplify the positive portion of the
input signal and another transistor to amplify the negative portion of the input
signal. As indicated earlier, the Class─B audio amplifier provides higher efficiency
and lower output impedance to drive a typically low─impedance load. For example,
a speaker load is normally 8 Ω.
A typical push─pull power amplifier can be designed with one pnp and one npn
transistor with symmetrical characteristics as shown in Figure 11.8. This circuit is
commonly called a complementary─symmetry power amplifier. We isolate the load
with a capacitor and a single power supply is used. The capacitor C1 blocks the DC
( CC ⁄2) from the load. The capacitor also provides the power supply voltage to Q2
when Q1 is not conducting. That is, the capacitor charges to a DC value of CC ⁄2 at
the connection of the two emitters.
The DC load line is vertical, since the capacitor C1 acts as an open circuit for
DC. Since the amplifier is to operate as Class B, ICQ is set to zero.
As is the case for the transformer─coupled power amplifier, RB is determined
from the current gain or input resistance equations. The input resistance, Rin, is
determined as follows (hib = 0):
B L
in = B ‖( L) = (11.4)
B⁄ L
iC
AC load
CC
+VCC line DC load
L
line
iC1
R2
C2
• Q1 vCE
CC
C1
• (b)
+ • R3 • +
C2 vin
vin • Q2 RL v0
R2 iC2
• t
(a)
Q1 on Q1 off
Figure 11.8 Complementary symmetry Q2 off Q2 ofn
Class─B amplifier. (c)
Each half of the circuit operates as an EF amplifier and the equivalent base
resistance, RB, is 2 ‖ 2 . The current gain is found from the current divider equation
as follows:
B 2
i = = (11.5)
B L 2⁄ L
L
v = i =1
in
1 CC
BB =
1 2
In order to avoid the nonlinear operating region near cutoff and thereby to obtain
more symmetrical operation, the two R1 resistors can be replaced by one adjustable
resistor (larger than 2R1) in order to raise ICQ above zero to compensate for the
distortion. This accomplishes Class─AB operation.
1
1 =
2 low L Midfrequency
C1 max
0.707 max
+ +
vin RL v0
Half─power
(a) frequency
(b)
Frequency (Hz)
Figure 11.9 Input equivalent circuit.
A capacitor is used to isolate the load in the circuit of Figure 11.8. The capacitor
forms part of the current path for one transistor when the other is cut off. Thus, the
capacitor charges during conduction of Q1 and discharges during conduction of Q2.
With capacitance present, the circuit becomes frequency dependent. The
low─frequency response of the stage is determined by the RC network shown in
Figure 11.9(a). As the signal frequency decreases, the voltage across the series
capacitor increases and the voltage across RL decreases. This effect reduces the
signal developed across RL and hence decreases the gain of the amplifier.
The half─power or cutoff or 3─dB point specifies the low─frequency cutoff.
This is the frequency that causes a 3─dB drop 1⁄√2 in the output amplitude. At
this point, the magnitude of the real part of the impedance (RL) is equal to that of
the imaginary part (1⁄w 1 ) or
L =w
1
or
w=
L 1
Figure 11.9(b) shows the amplitude response of the RC network. Note that at the
half─power frequency, the amplitude drops by a factor of 1⁄√2 from its peak value.
This frequency is the lower radian cutoff frequency and normally represents the
lowest frequency that can be effectively processed by the amplifier. That is, as
frequency decreases, the output decreases. At some point, the output amplitude is
too small to be of use. The half─power point represents about a 30% drop in output
voltage or current i.e., 1⁄√2 = 0.707 , and this may be more than can be permitted
for the given application. Nevertheless, the half─power point is generally accepted
as the limiting frequency.
+VCC
+
VR2 R2
Q1 Q1
C1 C2 D1
C1
ID
+ + +
+
D2
/
+
/
L
RL v0 = vL vin L
RL v0 = vL
Q2 R2 Q2
•
Figure 11.10 Output voltage Figure 11.11 Complementary symmetry with
divider at lowest frequency. diode compensation.
Figure 11.10 shows that if C1 is large the impedance is small and vL is almost
/
equal to L . The output power is therefore approximately at its maximum value.
Alternatively, if C1 is relatively small, vL is almost equal to zero and the output
power is small. The impedance of C1 determines the output amplitude, and this
impedance depends on frequency. The impedance of a fixed capacitor decreases
with increasing frequency, so the worst case occurs at the lowest operating
frequency. Let us assume that the lowest frequency (i.e., the cutoff frequency) is
flow (hertz). Then the value of C1 is found from the equation for the half─power
point as follows:
1 = (11.7)
low L
For this value of C1 the output voltage magnitude is given by
/ /
L L
| L| = = (11.8)
2 2 √
C1 L
Thus, as long as we operate above the cutoff frequency, | L | is greater than the value
shown in Equation (11.8).
Further improvement in circuit operation is possible. The fluctuations of VBE
with temperature can be reduced by replacing the two R1 resistors with diodes.
These diodes should have characteristics similar to those of the transistor and they
should be mounted on the same heat sink. This form of compensation is illustrated
in the circuit diagram of Figure 11.11.
There are three areas of concern in the design of a complementary─symmetry
amplifier. The first is the crossover distortion discussed in Section 11.1. This
distortion can be reduced by placing a small resistor in series with each diode to
cause ICQ to be slightly above zero. This, in turn, causes both amplifiers to amplify
the AC input signal simultaneously in the cutoff region, thus compensating for the
lower individual amplification in that region. The second area of concern is the
possibility of thermal runaway, which can be caused by the two complementary
transistors having different characteristics or by the value of VBE decreasing at high
temperatures. This can lead to a higher collector current, resulting in additional
power dissipation and heating. This process continues until the transistor overheats
and fails. Thermal runaway is prevented by placing a small resistor in series with
each emitter to increase the bias level. With a load of 4 to 8 Ω, each resistor should
be approximately 0.5 Ω.
The third area of concern is the distortion that results if the bias diodes, D1 and
D2, stop conducting. One of the design requirements for the power amplifier of
Figure 11.11 is to keep the diodes always turned on.
The design of the power amplifier shown in Figure 11.11 requires knowledge of
diode forward resistance, Rf. The value Rf varies widely with the value of
instantaneous diode forward current. The estimated value of 1⁄ f is found from the
slope of the diode forward characteristic curve. Fortunately, the design of the
amplifier is not highly dependent on the value of Rf and we use a fixed value of Rf
in the design procedure.
It is important that the diode bias current be large enough to keep the diodes in
their forward─biased region for all input voltages. The maximum negative peak
current through the diode must be less than the direct─current bias. That is, the DC
component of current must be larger than the AC component, so that when it adds
to the AC component the resulting current does not go negative. If this were not
true, the diode would be reverse─biased and distortion would result. This restriction
is stated as
D > dp (11.9)
XC = 0 at midfrequency
R2 iR2 βib
ib
• +
iin Rf id
+ C1
Rf /
L
vin +
R2 RL vL
Figure 11.12
Base equivalent
circuit.
( CC ⁄ ) .
D =
2
where we estimate the value of VBE as 0.7 V. The peak signal current through the
diode in the reverse direction, idp, is (refer to Figure 11.12) given by Equation
(11.10).
/
Lp
dp = dp + R2p = dp + (11.10)
2
Equation (11.10) is derived by assuming that the voltage gain is unity for the EF
amplifier. That is, the AC voltage across R2 is the same as the voltage from the
emitter to ground.
By equating ID to idp, we find the limiting condition for operating in the
forward─biased diode condition (see Equation (11.9)). From this, R2 can be found
as follows:
/
( CC ⁄ ) . Lp
= dp +
2 2
so
/
( CC ⁄ ) . Lp
2 = (11.11)
dp
/
Since the amplifier is an emitter follower, vin » L . At midfrequency, the voltage
/
across C1 is zero, so the entire voltage, vL, appears across RL. Therefore, L » vL. At
the lower 3─dB cutoff frequency, the output power drops to one half of the power
at the midrange frequency, and the magnitude of the voltage across RL is equal to
that of the voltage across C1. Each of these voltage magnitudes is equal to Lp ⁄√2.
The peak magnitude of the voltage across the series combination of RL and C1 is
/ Lp Lp
Lp = + = Lp
√ √
/
Hence the value of Lp in Equation (11.11) can be written as
/
Lp = L bp = L Cp (11.12)
The input resistance is determined from the equivalent circuit shown in Figure
11.13. We have assumed that ZL = RL at the midfrequency of the amplifier where
XC1 = 0. The capacitor is assumed to be a short circuit for midfrequency operation.
Note that RL reflects back as βRL and the diode has a forward resistance of Rf.
Conducting circuit
+ iin i2 +
Nonconducting Rf vD1 Rf
circuit i bp
vin +
i D2 R2
R2 vL βZL = βRL
at midfrequency
Figure 11.13
Input equivalent
circuit.
•
The input resistance is found from Figure 11.13 as follows:
in =( f + 2) ‖[ f +( 2‖ L )] (11.13)
The current gain is found using current division. The voltage across D1 with Q1
conducting is
L
D1 = f bp +
2
D1 L
D2 =
f 2
D1 L L
in = + bp + (11.14)
f 2 2
/
where vL= Lp and
bp
i = (11.15)
in
The power delivered by the AC source is split between the transistor and the
resistors in the bias circuitry. The AC signal source adds an insignificant additional
amount of power, since base currents are small relative to collector currents. Part
of the power to the transistor goes to the load, and the other part is dissipated by the
transistor itself. The following equations specify the various power relationships in
the circuit.
The input power is given by
where IDC is the average current drawn from the power supply for the transistor
portion of the circuit. The current, IDC, is determined by averaging across a full
period. That is,
⁄
DC = ∫ ( ) = Cmax
This result requires close examination. During the first half─cycle of the input,
current flows through the upper transistor into the capacitor and load resistor. The
second transistor is cutoff. The power during this half─cycle goes to the upper
transistor and the load. During this half─cycle, energy is stored in the capacitor.
During the second half─cycle, the upper transistor is cutoff. Thus, the VCC source
does not supply any power during this half─cycle. Instead, stored energy in the
capacitor is returned to the load and to the lower transistor.
CC Cmax
VCC (delivered to the transistor circuit)= (11.16)
CC
Cmax =
L
CC
VCC (max delivered to the transistor)=
L
Cmax L
o (ac)= (11.17)
The total DC power supplied to the stage is the sum of the power to the transistor
and the power to the bias and compensating circuitry.
CC Cmax CC
VCC = + (11.18)
f 2
If we substract the power to the load from the power supplied to the transistor
circuit, we find the power being dissipated in the transistors. Since this power is
shared equally between two transistors, the power dissipated by a single transistor
is one─half of this value. Thus,
CC Cmax Cmax L
transistor = − (11.19)
We are assuming that the base current is negligible. The efficiency of the Class─B
push─pull amplifier is the ratio of the output power to the power delivered to the
transistor. Thus we neglect the power dissipated by the bias circuitry. Therefore,
maximum efficiency of this amplifier is given by
2
CC L
hmax = 2 = = 0.785 or 78.5%
CC L
This amplifier is more efficient than a Class─A amplifier. It is often used in output
circuits where efficiency is an important design requirement.
The amplifier designer must specify the power rating of the transistor. That is,
it is important to know the maximum power dissipated by a single transistor. This
parameter is found by differentiating Equation (11.19) with respect to ICmax and
setting the derivative to zero. Thus we will find the value of ICmax that results in
maximum dissipated power as follows:
transistor CC
= − Cmax L =0 (11.20)
Cmax
CC
Cmax = (11.21)
L
We now substitute this value into Equation (11.19) to find the maximum power
rating of the transistor:
CC CC CC
max_transistor = − = (11.22)
L L L
SOLUTION We first determine the value of ICmax needed to achieve the specified
load power. From Equation (11.17) we obtain
Cmax L
o (ac)= = 0.5 W
Cmax = = 0.354 A
L
Cmax
bp = = 5.9 mA
The lower frequency, 60 Hz, represents the half─power frequency used to find C1.
At this frequency,
1 = = 332 μF
low L
L
D1 = f bp + = 0.1 V
2
D1 L L
in = + bp + = 19.5 mA
f 2 2
in =( f + 2) ‖[ f +( 2‖ L )] = 150 Ω
bp
i = = 18.2
in
The power to the amplifier, including the bias circuitry, is given by Equation
(11.18):
CC Cmax CC
VCC = + = 1.52 W
f 2
CC
transistor = = 0.456 W
L
o (ac) .
h= =
.
= 0.3289 or 32.89%
VCC
Example 11.3 Class─B Push─Pull Amplifier Design
Design a diode─compensated complementary─symmetry (see Figure 11.11)
amplifier to drive a 4─Ω load to ±3 V for a 3─dB point of 50 Hz. Use a 16 V power
supply and silicon transistors with β = 100. The diodes have forward resistance of
10 Ω. Calculate the power that is delivered from the supply, power delivered to the
load, power rating of the transistors, and conversion efficiency.
1 = = 796 μF » 800 F
low L
The maximum load voltage, VLmax, is given as 3 V. Thus, the value of ICmax is
Lmax
Cmax = = Ω
= 750 mA
L
Cmax
bp = = 7.5 mA
At the midfrequency
/
Lp = Lp =3V
in =( f + 2) ‖[ f +( 2‖ L )] = 173 Ω
The power to the amplifier, including the bias circuitry, is given by Equation
(11.18):
CC Cmax CC
VCC = + = 4.04 W
f 2
Cmax L
o (ac) = = 1.13 W
CC
transistor = = 1.62 W
L
o (ac) .
h= = .
= 0.6975 or 69.75%
VCC
2 2 2
bp = =
2 L
Therefore,
bp
2 = = 12.7 mA
( f 2 ) in in
2 = =
f 2 f 2‖ L
Hence,
2
in = = 18 mA
D1 L L
in = + bp + = 19.5 mA
f 2 2
Finally,
bp
i = = 41.6
in
EXERCISE 11.3
EXERCISE 11.3
EXERCISE 11.4