Unit-1

(1) Draw and explain the internal architecture of 8085.

 The architecture of 8085 Microprocessor is shown in figure given below. The internal architecture of
8085 includes following section
ALU-Arithmetic and Logic unit
Timing and control unit
Instruction register and decoder,
Register array,
Interrupt control and serial I/O control.

ALU:-

The ALU performs the arithmetic and logical operations. The operations performed by ALU of 8085 are
addition, subtraction, increment, decrement, logical AND, OR, EXCLUSIVE -OR, compare, complement
and left / right shift. The accumulator and temporary register are used to hold the data during an
arithmetic / logical operation. After an operation the result is stored in the accumulator and the flags are
set or reset according to the result of the operation.

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TIMING & CONTROL UNIT:

The timing and control unit synchronizes all the microprocessor operations with the clock and generates
the control signals necessary for communication between the microprocessor and peripherals.

INSTRUCTION REGISTER & DECODER:

When an instruction is fetched from memory it is placed in instruction register. Then it is decoded and
encoded into various machine cycles.

REGISTER ARRAY:

Apart from Accumulator (A-register), there are six general-purpose programmable registers B, C, D, E, H
and L. They can be used as 8-bit registers or paired to store l6-bit data. The allowed pairs are B-C,D-E
and H-L.

The temporary registers W and Z are intended for internal use of the processor and it cannot be used by
the programmer.

STACK POINTER (SP):

The stack pointer SP, holds the address of the stack top. The stack is a sequence of RAM memory
locations defined by the programmer. The stack is used to save the content of registers during the
execution of a program.

PROGRAM COUNTER (PC):

The program counter (PC) keeps track of program execution. To execute a program the starting address of
the program is loaded in program counter. The PC sends out an address to fetch a byte of instruction from
memory and increment its content automatically. Hence, when a byte of instruction is fetched, the PC
holds the address of the next byte of the instruction or next instruction.

INTERRUPT CONTROL:-interrupt control provide control for following interrupt INT, INTA, RST5.5,
RST6.5, RST7.5, TRAP

SERIAL I/O CONTROL: IT provide two pin for serial communication SOD-Serial output data and SID-
Serial input data

(2) Draw the PIN DIAGRAM of 8085 & explain the detail of each pin OR Draw &
explain 8085 Pin out signals OR Explain function of HOLD and HLDA pin in
brief OR List the function of flowing pins of 8085 (i) ALE, (ii) CLK (iii) Ready
OR List the interrupt pins of 8085.

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X1 & X2

These are also called Crystal Input Pins. 8085 can generate clock signals internally. To generate clock
signals internally, 8085 requires external inputs from X1 and X2.

̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐑𝐄𝐒𝐄𝐓 𝐈𝐍:

It is used to reset the microprocessor. It is active low signal. When the signal on this pin is low (for at
least 3 clocking cycles), it forces the microprocessor to reset itself.
Resetting the microprocessor means:
Clearing the PC and IR.
Disabling all interrupts (except TRAP).
Disabling the SOD pin.
All the buses (data, address, control) are tristated.
Gives HIGH output to RESET OUT pin.

RESET OUT:

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It is used to reset the peripheral devices and other ICs on the circuit. It is an output signal. It is an active
high signal. The output on this pin goes high whenever RESET IN is given low signal. The output
remains high as long as RESET IN is kept low

SID (Serial Input Data):

It takes 1 bit input from serial port of 8085 and Stores the bit at the 8th position (MSB) of the
Accumulator.RIM (Read Interrupt Mask) instruction is used to transfer the bit.

SOD (Serial Output Data):

It takes 1 bit from the 8th position (MSB) of the Accumulator to serial port of 8085. SIM (Set Interrupt
Mask) instruction is used to transfer the bit.

Interrupt Pin:

TRAP:-
It is a non-maskable interrupt. It has the highest priority. It cannot be disabled. It is both edge and level
triggered. It means TRAP signal must go from low to high and must remain high for a certain period of
time. TRAP is usually used for power failure and emergency shutoff.

RST 7.5:-
It is a maskable interrupt. It has the second highest priority. It is positive edge triggered only. The internal
flip-flop is triggered by the rising edge. The flip-flop remains high until it is cleared by RESET IN.

RST 6.5:-
It is a maskable interrupt. It has the third highest priority. It is level triggered only. The pin has to be held
high for a specific period of time.RST 6.5 can be enabled by EI instruction. It can be disabled by DI
instruction.

RST 5.5:-
It is a maskable interrupt. It has the fourth highest priority. It is also level triggered. The pin has to be held
high for a specific period of time. This interrupt is very similar to RST 6.5.

INTR:-
It is a maskable interrupt. It has the lowest priority. It is also level triggered. It is a general purpose
interrupt. By general purpose we mean that it can be used to vector microprocessor to any specific
subroutine having any address.
̅̅̅̅̅̅̅
𝐼𝑁𝑇𝐴
It stands for interrupt acknowledge. It is an outgoing signal. It is an active low signal. Low output on this
pin indicates that microprocessor has acknowledged the INTR request.
Address and Data Pins
AD0 – AD7:- (Bidirectional)
These pins have dual purpose of transmitting lower order address and data byte. During 1st clock cycle,
these pins act as lower half of address. In remaining clock cycles, these pins act as data bus. The
separation of lower order address and data is done by address latch.

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A8 – A15:-(Unidirectional)
These pins carry the higher order of address bus. The address is sent from microprocessor to memory.
ALE:- (Output)
It is used to enable Address Latch. It indicates whether bus functions as address bus or data bus.
If ALE = 1 then Bus functions as address bus.
If ALE = 0 then Bus functions as data bus.
S0 and S1 :-( output)
S0 and S1 are called Status Pins. They tell the current operation which is in progress in 8085.
S0 S1 Operation
0 0 Halt
0 1 Write
1 0 Read
1 1 Opecode
IO/M:-
This pin tells whether I/O or memory operation is being performed.
If IO/M = 1 then I/O operation is being performed.
If IO/M = 0 then Memory operation is being performed.
̅̅̅̅̅:-
𝑹𝑫
RD stands for Read. It is an active low signal. It is a control signal used for Read operation either from
memory or from Input device. A low signal indicates that data on the data bus must be placed either from
selected memory location or from input device.
̅̅̅̅̅
𝑾𝑹:-
WR stands for Write. It is also active low signal. It is a control signal used for Write operation either into
memory or into output device. A low signal indicates that data on the data bus must be written into
selected memory location or into output device.
READY:-
This pin is used to synchronize slower peripheral devices with fast microprocessor

HOLD:-
HOLD pin is used to request the microprocessor for DMA transfer. A high signal on this pin is a request
to microprocessor to come off from the hold on buses. This request is sent by DMA controller.

HLDA:-
HLDA stands for Hold Acknowledge. The microprocessor uses this pin to acknowledge the receipt of
̅̅̅̅ , 𝑊𝑅
HOLD signal. When HLDA signal goes high, address bus, data bus, 𝑅𝐷 ̅̅̅̅̅, IO/𝑀
̅ pins are tri-stated.
This means they are cut-off from external environment. The control of these buses goes to DMA
Controller.

VSS and VCC:-

+5V power supply is connected to VCC. Ground signal is connected to VSS.

(3) Explain how to demultiplex address from multiplex address/Data line. OR

Describe Demultiplexed address data bus and control signals.

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 AD0- AD7 lines are use for dual purpose i.e. Address bus and Data bus and they need to be
demultiplexed to get all the information.
 The high order bits of the address remain on the bus for three clock periods. However, the low order
bits remain for only one clock period and they would be lost if they are not saved externally.
 To make sure we have the entire address for the full three clock cycles, we will use an external latch to
save the value of AD7–AD0 when it is carrying the address bits. We use the ALE signal to enable this
latch.

 The address AD7 –AD0 is connected as inputs to the latch 74LS373.

 The ALE signal is connected to the enable (G) pin of the latch and the OC –Output control –of the
latch is grounded
 ALE operates as a pulse during T1, when this signal goes low, the address is saved and the AD7-AD0
lines can be used for data bus.

(4) Explain flag register of 8085.

 Flag is flip-flops that indicate some condition produce by the arithmetic and logical instruction. This
flip-flop can set or reset according to the result of an operation.
 These flags are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags.
 The bit position for the flags in flag register is,

D7 D6 D5 D4 D3 D2 D1 D0
S Z X AC X P X CY

Sign Flag:-After execution of any arithmetic and logical operation, if D7 of the result is 1, the sign flag is
set. Otherwise it is reset

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Zero Flag:-This flag is set if result obtained after an operation is 0.and Reset if Result is non Zero.
Carry Flag:-This flag is set if there is a carry or borrow from arithmetic operation.
Auxiliary Carry Flag: -This flag is set if there is a carry out of bit 3.
Parity Flag:-This flag is set if parity is even (even numbers of 1s) and reset if parity is odd(odd numbers
of 1s).
(5) Discuss the bus organization of 8085.

The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates with the other units using a 16-bit
address bus, an 8-bit data bus and a control bus.

Address Bus
It consists of 16 address lines: A0 – A15
It operates in unidirectional mode: The address bits are always sent from the MPU to peripheral
devices in one direction, not reverse.
MPU uses the address bus to perform first function : identifying a peripheral or a memory
location.16 address lines are capable of addressing a Total of 216=65,536 (64k) memory locations.
Address locations: 0000 (hex) to FFFF (hex)
When the 8085 wants to access a peripheral or a memory location, it places the 16-bit address on
the address bus and then sends the appropriate control signals.

Data Bus
It consists of 8 data lines: D0 – D7
It operates in bidirectional mode: The data bits are sent from the MPU to peripheral devices, as
well as from the peripheral devices to the MPU.
The MPU uses the data bus to perform second function : Transfer binary information ( data and
instructions )
Data range: 00 (hex) – FF (hex)

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Control Bus
It comprised of various single lines that carry synchronization signals.
The MPU uses such lines to perform third function: Provide timing or synchronization signals
(control signals)

(6) Explain registers organization of 8085. OR Explain Internal Operation

perform by the microprocessor

The 8085 can perform a number of internal operations. Such as: storing data, Arithmetic & Logic
operations, testing for condition, etc. To perform these operations, the microprocessor needs an
internal architecture similar to the following:

Registers
Six general purpose 8-bit registers: B, C, D, E, H, L
They can also be combined as register pairs to perform 16-bit operations: BC, DE, and HL
Registers are programmable (data load, move, etc.)
Accumulator
Single 8-bit register that is part of the ALU
Used for arithmetic / logic operations – the result is always stored in the accumulator.
Flag Bits
Indicate the result of condition tests.
Carry, Zero, Sign, Parity, etc.
Conditional operations (IF / THEN) are executed based on the condition of these flag bits.
The Program Counter (PC)
This is a register that is used to control the sequencing of the execution of instructions.
This register always holds the address of the next instruction.

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Since it holds an address, it must be 16 bits wide.

The Stack pointer
The stack pointer is also a 16-bit register that is used to point into memory.

The memory this register points to be a special area called the stack.
The stack is an area of memory used to hold data that will be retrieved soon.
The stack is usually accessed in a Last in First out (LIFO) fashion.

(7) Explain Microprocessor initiated and externally initiated operations in 8085

microprocessor.

Microprocessor-Initiated Operations
Microprocessor performs primarily four operations as a part of communication process between
MPU and peripheral devices.
1. Memory Read : Reads data ( instructions) from memory
2. Memory Write : Writes data ( instructions) in to memory
3. I/O Read: Accepts data from input devices.
4. I/O Write : Sends data to output devices
To communicate with a peripheral, the MPU need to perform following steps:-
1. Identify the peripherals or the memory location (with its address)
2. Transfer binary information ( data and instructions )
3. Provide timing or synchronization signals (control signals)

Memory Read Operation

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To read the contents of a memory location, the following steps take place:
 The microprocessor places the 16-bit address of the memory location on the address bus.
 The microprocessor activates a control signal called “memory read” which enables the
memory chip.
 The memory decodes the address and identifies the right location.
 The memory places the contents on the data bus.
 The microprocessor reads the value of the data bus after a certain amount of time.

Similar steps carried out for memory write operation, I/O read Operation, I/O write
operation

Peripheral-Initiated Operations OR external operation

External devices can initiate (start) one of the 4 following operations:

1. Reset
All operations are stopped and the program counter is reset to 0000.
2. Interrupt
The microprocessor’s operations are interrupted and the microprocessor executes what is
called a “service routine”. This routine “handles” the interrupt, (perform the necessary
operations). Then the microprocessor returns to its previous operations and continues.

3. Ready
The 8085 has a pin called RDY. This pin is used by external devices to stop the 8085
until they catch up. As long as the RDY pin is low, the 8085 will be in a wait state.
4. Hold
The 8085 has a pin called HOLD. This pin is used by external devices to gain control of
the busses. When the HOLD signal is activated by an external device, 8085 stops

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executing current instructions. This would allow external devices to control the
information on the busses. Example DMA.

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