Azoteq - Ci - Iqs333-0-Qfr-2337996

IQ Switch®
ProxSense® Series
ProxSense® IQS333 Datasheet

9 Channel Projected / 7 Channel Self- Capacitive Touch and Proximity
Controller with 2 x 11-bit slider/scroll wheels
The IQS333 ProxSense® IC is a 9-channel projected (or 7-channel self) capacitive proximity
and touch controller with best in class sensitivity, signal to noise ratio and power consumption.
Other features include automatic tuning of sense electrodes, internal reference capacitor and
internal regulator to reduce total system cost.
Main Features
• 7 Self or 9 Mutual Channel Capacitive Controller

• 2 Configurable 11-bit sliders/scroll wheels
• Advanced on-chip digital signal processing
RoHS2
• Automatic adjustment for optimal performance (ATI) Compliant
• User selectable Proximity and Touch thresholds

• Long proximity range
• Automatic drift compensation
• Fast I2C Interface

• Event mode or Streaming modes IQS333 QFR32
Representations only, not
actual markings
• 8 PWM LED/Output drivers (5mA source/10mA sink)

o Hardware PWM set through I2C memory map – no overhead from host
o Dimming modes available, up and down
o Minimum, maximum & adjustable limit levels for dimming modes
• Low Power, suitable for battery applications
• Supply voltage: 1.8V to 3.6V
• <3µA Active sensing in LP mode
Applications
• White goods and appliances

• Office equipment, toys
• Medical and test equipment
• Blu-Ray, DVD players, TVs
Available options
TA QFR(5x5)-32
-20°C to 85°C IQS333
Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 1 of 52

All rights reserved. Revision 1.13 May 2018
IQ Switch®
ProxSense® Series
Contents
FUNCTIONAL OVERVIEW ............................................................................................................................................ 3
1 INTRODUCTION .................................................................................................................................................. 3
2 ANALOGUE FUNCTIONALITY............................................................................................................................... 3
3 DIGITAL FUNCTIONALITY .................................................................................................................................... 3
4 HARDWARE CONFIGURATION ............................................................................................................................ 4
5 USER CONFIGURABLE OPTIONS .........................................................................................................................11
6 PROXSENSE® MODULE .......................................................................................................................................17
7 COMMUNICATION ............................................................................................................................................22
8 RF NOISE ...........................................................................................................................................................27
9 COMMUNICATION COMMAND/ADDRESS STRUCTURE .....................................................................................29
10 IQS333 OTP OPTIONS ........................................................................................................................................40
11 SPECIFICATIONS ................................................................................................................................................41
12 PACKAGE INFORMATION ..................................................................................................................................45
13 DEVICE MARKING ..............................................................................................................................................50
14 ORDERING INFORMATION ................................................................................................................................50
15 ERRATA .............................................................................................................................................................51
16 DATASHEET REVISION HISTORY.........................................................................................................................51
APPENDIX A. CONTACT INFORMATION ..................................................................................................................52

IQ Switch®
ProxSense® Series
Functional Overview
through a charge transfer process that is
1 Introduction periodically initiated by the digital circuitry.
The IQS333 is a 9 channel projected (7 The capacitance measurement circuitry
self) capacitive proximity and touch sensor makes use of an internal reference
featuring an internal voltage regulator and capacitor CS and voltage reference (VREF).
reference capacitor (CS).
The measuring process is referred to as a
The device has 7 possible pins for the conversion and consists of the discharging
connection of the sense electrodes, which
of Cs and Cx capacitors, the charging of Cx
consist of 7 Self electrodes, or 3
transmitters and 3 receivers. Three pins are and then a series of charge transfers from
used for serial data communication through Cx to Cs until a trip voltage is reached. The
the I2CTM compatible protocol, including an number of charge transfers required to
optional RDY pin. Up to 9 configurable reach the trip voltage is referred to as the
outputs provide 8 PWM or general purpose Counts (CS) value.
I/O’s. There is also a dedicated pin for
driving a buzzer. The analogue circuitry further provides
The device automatically tracks slow functionality for:
varying environmental changes via various • Power On Reset (POR) detection.
filters, detects noise and is equipped with
• Brown Out Detection (BOD).
an Automatic Tuning Implementation (ATI)
to adjust the device for optimal sensitivity. • Internal regulation provides for
accurate sampling.
1.1 Applicability
All specifications, except where specifically
3 Digital Functionality
mentioned otherwise, provided by this The digital processing functionality is
datasheet are applicable to the following responsible for:
ranges:
• Managing BOD and WDT events.
• Temperature -20°C to +85°C • Initiation of conversions at the selected
• Supply voltage (VDDHI) 1.8V to 3.6V rate.
• Processing of CS and execution of
2 Analogue Functionality algorithms.
CRX and CTX electrodes are arranged in a • Monitoring and execution of the
ATI algorithm.
suitable configuration that results in a
mutual capacitance (Cm) between the two • Signal processing and digital filtering.
electrodes. CTX is charged up to a set • Detection of PROX and TOUCH
positive potential during a charge cycle events.
which results in a negative charge buildup • Managing outputs of the device.
at CRX. • Managing serial communications.
The resulting charge displacement is then
measured within the IQS333 device

IQ Switch®
ProxSense® Series
4 Hardware Configuration
The IQS333 can be configured to charge in Self- or Projected-Capacitive mode through the
memory map by the host controller. The IQS333 is default in Self-Capacitive mode, and can
be set to Projected-Capacitive mode by setting the “Proj Mode” bit in Register 0x01, byte 0.
In Self-Capacitive mode, the IQS333 has 7 channels. It can be used as 7 discrete buttons OR
1 slider and 4 buttons, OR 2 sliders with 1 button.
In Projected-Capacitive mode, the IQS333 has 9 channels. It can be used as 9 discrete
buttons OR 1 slider with 6 buttons, OR 2 sliders with 3 buttons.
4.1 IQS333 Pin Out
PWM7
Buzz
RDY
SDA
SCL
N/C
N/C
N/C
32 31 30 29 28 27 26 25
PWM6 1 24 N/C
IQS333 xi z
PWM5 2 23 VDDHI
PWWYY
3 22 VREG
PWM4
21 CTRX0
PWM3 4
20 CTRX1
PWM2 5
19 CTRX2
PWM1 6
PWM0 7 18 GND
nMCLR 8 17 N/C
9 10 11 12 13 14 15 16
N/C
N/C
N/C
CTRX6
CTRX5
CTRX4
CTRX3
N/C
Figure 4.1 IQS333 Pin out in QFN-32.

IQ Switch®
ProxSense® Series
Table 4.1 IQS333 QFN-32 Pin-outs.

Self-Capacitive Projected-Capacitive Function
Pin
1 PWM6 PWM6 Output
2 PWM5 PWM5 Output
3 PWM4 PWM4 Output
4 PWM3 PWM3 Output
5 PWM2 PWM2 Output
6 PWM1 PWM1 Output
7 PWM0 PWM0 Output
8 NMCLR NMCLR Master Clear
9 N/C N/C No Connect
10 Internal use1 Internal use No Connect
11 Internal use Internal use Connect to GND
12 Internal use Internal use Connect to GND
13 CX6 Sense Electrode
14 CX5 TX2 Sense Electrode
18 GND GND Supply Ground
19 CX2 CRX2 Sense Electrode
22 VREG VREG Regulator Output
23 VDDHI VDDHI Supply Input
24 Internal use Internal use No Connect
25 SDA SDA I2C Data
26 SCL SCL I2C Clock
27 BUZ BUZ Buzzer
28 N/C N/C Connect to GND
29 RDY RDY Ready
32 PWM7 PWM7 Output
1
Do not connect to GND

IQ Switch®
ProxSense® Series
4.2 Reference Design

4.2.1 Projected Schematic
Figure 4.2 IQS333 Reference Design (Projected capacitive sensing).

IQ Switch®
ProxSense® Series
4.2.2 Projected Electrodes

1
Wheel
Rx1
Tx0
Rx0
1 1
OR
Rx2
Tx0 GND Slider
Rx0 Rx1 Rx2 Rx0
5 to 12mm
Tx0
Up to 8cm. Suggested line thickness: Tx = 1mm; Rx = 0.8mm
Figure 4.3 Projected-Capacitive Wheel, Slider and Button layout guidelines.

DXF files for wheels and sliders are available on request: info@azoteq.com.

IQ Switch®
ProxSense® Series
4.2.3 Example Routing
Figure 4.4 Example routing of a projected slider. GND on

top layer shields the Rx lines from the user on the bottom
layer.
4.2.4 Self-capacitive Schematic
Figure 4.5 IQS333 Self Capacitive Reference Design.

IQ Switch®
ProxSense® Series
4.2.5 Self Electrode Layouts

Rx1
Rx0
0
Rx6
Rx2
Rx3 Rx3
Rx4 Rx5
Figure 4.6 Self-Capacitive Wheel, Slider and Button layout guidelines.

DXF files for wheels and sliders are available on request:
info@azoteq.com.
Tx1
Rx2
Rx1
Tx0 Tx0
GND
Rx0
Tx1
Figure 4.7 Projected XY-cross slider, made possible by the reuse of the Rx
electrodes. As these sliders do not wrap around, the full resolution
specified will not be achievable.

IQ Switch®
ProxSense® Series
4.3 Power Supply and PCB Layout

Azoteq IC's provide a high level of on-chip hardware and software noise filtering and ESD
protection (refer to application note “AZD013 – ESD Overview”). Designing PCB's with better
noise immunity against EMI, FTB and ESD in mind, it is always advisable to keep the critical
noise suppression components like the de-coupling capacitors and series resistors in Figure
4.2 as close as possible to the IC. Always maintain a good ground connection and ground
pour underneath the IC. For more guidelines please refer to the relevant application notes as
mentioned in Section 4.4.
Where a system level ESD strike is found to cause the IC to go into ESD induced latch-up, it is
suggested that the supply current to the IQS333 IC is limited by means of a series resistor that
could limit the maximum supply current to the IC to <80mA.
4.4 Design Rules for Harsh EMC Environments
➢ Applicable application notes: AZD013, AZD015, AZD051, and AZD052.

4.5 High Sensitivity
Through patented design and advanced signal processing, the device is able to provide
extremely high sensitivity to detect proximity. This enables designs to detect proximity at
distances that cannot be equaled by most other products. When the device is used in
environments where high levels of noise or floating metal objects exist, a reduced proximity
threshold is proposed to ensure reliable functioning of the sensor. The high sensitivity also

IQ Switch®
ProxSense® Series
allows the device to sense through overlay materials with low dielectric constants, such as
wood or porous plastics.
For more guidelines on the layout of capacitive sense electrodes, please refer to application
note AZD008, available on the Azoteq web page: www.azoteq.com.
5 User Configurable Options

The IQS333 requires configuration by a master/host controller or MCU. The user needs to
select the number of channels and corresponding touch and proximity thresholds.
5.1 Self and Projected Modes

The IQS333 can function as a Self or Projected capacitive controller, depending on the
application requirement. The IQS333 is default in Self capacitive mode. Pre-configured
devices can be ordered for projected mode, or the user can select the operation mode as
projected during initialization by setting the “Proj Mode” bit in Register 0x01, byte 0
(Sysflags0).
5.2 Active Channels
The IQS333 can be configured to have up to 9 active touch channels (CH1-CH9) with one
additional proximity channel (CH0) in projected charging mode. By default CH0 is a distributed
proximity channel, comprised of charging all the channels together in one timeslot. There is an
option to only charge Tx0 (transmitter) and CTRX0 – CTRX2 (receivers) together (see Figure
5.1). by setting the CH0_Settings bit in Register 0x08, byte 6.
The IQS333 can be configured to have up to 7 active touch channels (CH1-CH7) with one
additional proximity channel (CH0) in self-capacitive charging mode. CH0 is a distributed
proximity channel, comprised of charging all the channels together in one timeslot.
The desired number of channels can be selected in Register 0x0E.
Figure 5.1 illustrates the IQS333 channels mapped to the respective transmit (CTX) and
receive (CRX) sense electrodes. Tx0 is used with all three Rx lines to form wheel 1, and Tx1 is
used with all three lines to form wheel 2. All three Rx lines are charged together with Tx0 to for
the distributed proximity channel (CH0).
Figure 5.2 illustrates the IQS333 channels mapped to the respective CTRX lines in Self
capacitive charging mode. CX0 to CX2 forms wheel 1, while CX 3 to CX 5 forms wheel 2. All
the channels are charged together to form 1 distributed proximity channel (CH0).

IQ Switch®
ProxSense® Series
CTRX0
CTRX1
CTRX2
Wh
ee
l1 CH0
CTRX3 CH
1
CH
2
CH
3 Tx0
Wh
ee
l2
CTRX4 CH
4
CH
5
CH
6 Tx1
CTRX5 CH
7
CH
8
CH
9 Tx2
Rx0 Rx1 Rx2
Figure 5.1 IQS333 Channel Mapping in Projected mode. By default CH0 charges all
the channels, but can be set to only use Tx0 as shown.
CH0
CTRX0 CH
1
CTRX1 CH
2 Wheel 1
CTRX2 CH
3
CTRX3 CH
4
CTRX4 CH
5 Wheel 2
CTRX5 CH
6
CTRX6 CH
7
Figure 5.2 IQS333 Channel mapping in Self mode.

5.3 Proximity Threshold 255 (least sensitive) counts. These
threshold values (i.e. 1-255) are specified
A proximity threshold for channel 0 can be
in Counts (CS). Note: The IQS333 has a
selected by the designer in Register 0x09,
default proximity threshold of 4 counts,
byte 0, to obtain the desired proximity
PTHR = 4.
trigger level. The proximity threshold is
selectable between 1 (most sensitive) and

IQ Switch®
ProxSense® Series
5.4 Touch Thresholds 5.8 Halt times

A touch threshold for each channel can be The Halt Timer is started when a proximity
selected by the designer to obtain the or touch event occurs and is restarted
desired touch sensitivity and is selectable when that event is removed or reoccurs.
between 1/256 (most sensitive) to 255/256 When a proximity or touch event condition
(least sensitive). The touch threshold is occurs, the LTA values for all channels will
calculated as a fraction of the Long-Term be "halted", thus its values will be kept
Average (LTA) given by, fixed, until the proximity event is cleared, or
the halt timer reaches the halt time. The
𝑇𝑇𝐻𝑅 = 𝑥⁄256 × 𝐿𝑇𝐴
halt timer will count to the selected halt time
With lower target values (therefore lower (tHALT), which can be configured in Register
LTA’s) the touch threshold will be lower and 0x0A, byte 0. There is also the option to
vice versa. change to never halt or always halt instead
of tHALT by setting the HALT bits in Register
Individual touch thresholds can be set for
each channel (excl. CH0) in Register 0x09, 0x08, byte 2 (ProxSettings2) When the
byte 1 to 9. timer expires, the output will be cleared,
and a reseed or re-ATI event will occur
Note: The IQS333 has a default touch (depending on whether the counts are
threshold of 16/256*LTA for all active within the ATI band).
channels.
It is possible that the CS (Count Value)
5.5 Wheel Enable/Disable could be outside the ATI boundary (ATI
The IQS333 has the option to enable or Target +- 12.5%) when the timer expires,
disable wheel/slider coordinate calculations which will cause the device to perform a re-
on 2 wheels. By default, both wheels will be ATI event on that channel and not just a
enabled, but can disabled by setting the reseed event.
Wheel_Disable bits in Register 0x08, byte
3 (ProxSettings3). The designer needs to select a halt timer
value (tHALT) to best accommodate the
5.6 Wheel Resolution required application. The value of tHALT is
Both wheels/sliders have resolution up to selectable between 1and 255 (times
11-bit. The resolution can be adjusted 250ms). The default value is 0x50H (80
between 4-bit and 11-bit, depending on the decimal times 250ms = 20 seconds).
application requirements and wheel size.
The resolution of the wheels cannot be There is also the option to set tHALT timer to
adjusted individually. To adjust the never halt, or always halt in Register 0x08,
resolution, set the Resolution bits in byte 2 (Prox_Settings2).
Register 0x08, byte 3 (ProxSettings3).
5.7 Wheel Filter 5.9 AC Filter
A filter is implemented on both The AC filter can be implemented to
wheels/sliders to smooth the output. This provide better stability of Counts (CS) in
filter can be disabled to increase the electrically noisy environments.
response rate by setting the Wheel Filter
Disable bit in Register 0x08, byte 3 The AC filter also enforces a longer
(ProxSettings3). minimum sample time for detecting
proximity events on CH0, which will result
in a slower response rate when the device
IQ Switch®
ProxSense® Series
enters low power modes. The AC filter can BP rate. The LP charge cycle timing is
be disabled in Register 0x08, byte 2 illustrated in Figure 5.3. The bit0 in
(Prox_Settings2). Register 0x01, byte 0 (Sys_Flags0), will
The AC filter is implemented on all indicate if low power is active, or the device
channels, to aid in the slider coordinate is zoomed in.
calculations, but touch events are
When designing for low power operation,
determined on unfiltered count values.
the VREG capacitors should ensure that
5.10 Power Modes VREG does not drop more than 50mV during
low power operations.
5.10.1 LP Modes
The IQS333 IC has a wide range of
configurable low power modes, specifically
designed to reduce current consumption for
low power and battery applications.
The power modes are implemented around
the occurrence of a charge cycle every tLP
seconds. The value of tLP is determined by
the custom (LPvalue) value between 1 and
255 in Register 0x0A, byte 2, multiplied by
16ms. Only CH0 is charged during LP, and
is forced active (CH0 cannot be disabled).
The other active channels will be
periodically charged to keep their LTA filter
values up to date.
Lower sampling frequencies typically yield
significant lower power consumption (but
also decreases the response time)
NOTE: While in any power mode the
device will zoom to Boost Power (BP)
mode whenever the condition (CS – LTA)1
> PROX_TH or TOUCH_TH holds,
indicating a possible proximity or touch
event. This improves the response time.
The device will remain in BP for tZOOM (4
seconds) after the last proximity event on
CH0 is cleared and then return to the
selected power mode. A proximity event
during the zoom time will reset the timer.
The Zoom function allows reliable detection
of events with counts being produced at the
1
CS-LTA in Projected mode. LTA-CS in Self capacitive
sensing mode.

IQ Switch®
ProxSense® Series
sense
process
Scan Period = LP x 16ms
CH0 CH0
Prox
t comms
RDY
Figure 5.3 IQS333 Charge Cycle Timing in Low Power Mode.

Typical timings of the charge sequence shown above are listed in Table 5.1. These timings are
only as reference, as they will differ with each application, depending on the setup of the
IQS333. For example, the sense (or charge time) is affected by the target counts and charge
transfer frequency, while process time is dependent on the turbo mode activation, ATI
checking for counts within the pre-set band, filter settings and slider calculations.
Communication time is affected by the MCU clock speed and the amount of data read (as well
as the sequence thereof) and can be bypassed with using Event Mode. Communication time
and the number of active channels will influence the Scan Period. Values shown below are for
default settings.
Table 5.1 Typical Timings in LP mode
Typical timings of IQS333
tsense 900 µs
tprocess 1.4 ms
tcomms 6 ms
Scan Period1 LP register setting x 16 ms
1
All channels active, and all data read during communication window. Projected mode, all other settings default.

IQ Switch®
ProxSense® Series
5.10.2 Turbo Mode 5.12 Base Value

Setting the Turbo Mode bit in Register The IQS333 has the option to individually
0x08, byte 1 (Prox_settings1) will enable change the base value of each channel
the IQS333 device to perform conversions during the Full ATI algorithm. Depending on
(charge transfers or sensing) as fast as the application, this provides the user with
processing and communication allows. another option to select the sensitivity of
Enabling Turbo Mode will maximizing the IQS333 without changes in the
detection speeds, but also increasing hardware (CRX/CTX sizes and routing,
current consumption. Disabling Turbo etc).
Mode will yield in a fixed sampling period
tSample. The base values are set in Register 0x06,
byte 0 to 9 (for channels 0 to 9). The base
5.11 ATI Method values can be selected to be 200(default),
The IQS333 can be set up to perform 75, 100 or 150.
sensor calibration in three ways: Full ATI, The base value influences the overall
Partial ATI and Alternative ATI. The ATI sensitivity of the channel and establishes a
method is selected or turned off in Register base count from where the ATI algorithm
0x08, byte 0 (Prox_Settings0). starts executing. A lower base value will
In Full ATI mode, the device automatically typically result in a higher sensitivity of the
selects the multipliers through the ATI respective channel, as lower multipliers will
algorithm to setup the IQS333 as close as be selected, and more compensation would
possible to its default sensitivity for the be required.
environment where it was placed. 5.13 Target Value
The user can however, select Partial ATI, The default target value of the IQS333 is
and set the multipliers to pre-configured 512 counts for the touch channels and
values. This will cause the IQS333 to only 1024 counts for the proximity channel.
calculate the compensation (not the
compensation and multipliers as in Full The target values are calculated by
ATI), which allows the freedom to make the multiplying the value in Register 0x0B,
IQS333 more or less sensitive for its byte 0 (for channel 0) & byte 1 (for
intended environment of use. The Partial channels 1 to 9) by 8.
ATI also reduces start-up and re-ATI times. Example: CH0 target = Register Value x 8
= 128(default) x 8 = 1024.
In Alternative ATI, the IQS333 will take the
smallest multiplier values from Full ATI, and 5.14 Charge Transfer Speed
apply it to all the channels, and the
algorithm will determine the compensation The frequency at which charge cycles are
values. Special attention should be paid to performed can be adjusted by the Charge
layout when using Alternative ATI when Xfer Speed bits in Register 0x08, byte 1
(Prox_Settings1).
using a wheel and/or slider, as multipliers
for sliders and touch keys are not always in Adjusting the charge transfer speed will
the same range. change the charge cycle duration (tSENSE)
as shown in Figure 5.3.
The charge transfer frequency is a fraction
of the main oscillator (FOSC = 8MHz) and
IQ Switch®
ProxSense® Series
can be set at 1MHz (default), 500kHz, applications using Halt Charge, pin 11 and
250kHz (not recommended for projected) pin 12 needs to be connected to GND.
or 2MHz.
5.17.2 Force Halt
Higher charge transfer speeds are
The Force Halt bit in Register 0x08, byte 2
preferred for applications that require
(Prox_Settings2) can be set to halt all
increased immunity against aqueous
current LTA values and prevent them from
substances.
being adjusted towards the CS values.
5.15 Cs Size Setting this bit overrides all filter halt
Another method to adjust the sensitivity of settings and prevents the device from
the IQS333 is to change the size of the performing re-ATI events in cases where
internal Cs capacitor. The size on default is the CS values persist outside the ATI
60pF, but can be changed to 30pF by boundaries for extended periods of time.
setting the Cs_Size bit in Register 0x08,
byte 0 (Prox_Settings0). Choosing the Reseed will also not be possible.
smaller Cs size will effectively reduce the 5.17.3 CTX / CRX Float
number of counts before ATI, thus
changing the multiplier and compensation During the charge transfer process, the
values required to reach the ATI target. channels that are not being processed
during the current cycle, are effectively
5.16 Projected Bias
grounded to decrease the effects of noise-
The IQS333 has the option to change the coupling between the sense electrodes.
bias current of the transmitter during
Grounding these traces is useful in
projected sensing mode. A larger bias
current is required to use larger electrodes, applications with long tracks between IC
but will also increase the IC power and sense electrode.
consumption. The bias current is default on In Register 0x08, byte 5, there is the
10µA, and can be changed in Register
option to specify which channels’ transmit
0x08, byte 0 (Prox_Settings0).
and/or receive electrodes to float when they
5.17 Additional Features are not charged. This is particularly useful
5.17.1 Halt Charge for applications with self-capacitive
wheels/sliders with thick overlays, where
Setting the Halt Charge bit in Register more sensitivity is required. Sensitivity will
0x08, byte 1 (Prox_Settings1), will stop all be increased when floating the wheel
conversions. channels, as they charge in series, and not
This function is typically useful for ultra-low parallel.
power requirements, where the IQS333 can
be controlled by a host MCU and does not 6 ProxSense® Module
require wake-up on proximity or touch
The IQS333 contains a ProxSense®
events. This is a low power alternative to
module that uses patented technology to
switching off, where no sensing is required,
provide detection of proximity and touch
to avoid resetting the memory map.
conditions on numerous sensing lines.
During Halt Charge, a 512ms wake up
The ProxSense® module is a combination
timer is used. The VREG capacitor needs
of hardware and software, based on the
to ensure VREG does not drop more than
principles of charge transfer
100mV during Halt Charge. A capacitor of
measurements.
4.7uA or bigger is suggested. For
IQ Switch®
ProxSense® Series
6.1 Charge Transfer Concept 6.2 Rate of Charge Cycles

On ProxSense® devices like the IQS333, The IQS333 samples all its active channels
capacitance measurements are taken with (up to 9 + channel 0 for proximity) in 10
a charge transfer process that is timeslots. The charge sequence (as
periodically initiated. measured on the receive electrodes) is
shown in Figure 6.1, where CH0, the
For projected capacitive sensing, the
Proximity channel, charges first, followed
device measures the capacitance between
by all other active channels. There is only a
2 electrodes referred to as the transmitter
communication window after all active
(CTX) and receiver (CRX).
channels have been charged.
The measuring process is referred to as a
The charging of CH0 comprises the
charge transfer cycle and consists of the
simultaneous charging of the three receive
following:
electrodes (CRX0, CRX1 and CRX2) in
• Discharging of an internal sampling
conjunction with all transmit electrodes,
capacitor (Cs) and the electrode
thus realising a distributed load mutual
capacitors (mutual: CTX & CRX) on
capacitive sense electrode. Refer to Figure
a channel.
5.1 for IQS333 channel numbering. The
• charging of CTX’s connected to the
user has the option to only charge 1 Tx
channel
(Tx0/CTRX3) together with all 3 receivers,
• and then a series of charge
by setting the 1 Tx bit in Register 0x08,
transfers from the CRX’s to the
byte 1 (Prox_Settings1).
internal sampling capacitors (Cs),
until the trip voltage is reached. In self-capacitive mode, CH0 is also a
distributed channel charging all 7 CX
The number of charge transfers required to channels together.
reach the trip voltage on a channel is 6.2.1 Boost Power rate
referred to as the Current Sample (CS) or
Count value (Counts). With the IQS333 zoomed to Boost Power
(BP) mode, the active channels are
The device continuously repeats charge charged at a fixed sampling period (tSAMPLE)
transfers on the sense electrodes per channel (if Turbo Mode is not enabled).
connected to the CRX pins. For each This is done to ensure regular samples for
channel a Long Term Average (LTA) is processing of results, and fix timings for the
halt times.
calculated (12 bit unsigned integer values).
The count (CS) values (12 bit unsigned It is calculated as each channel having a
integer values) are processed and time tSAMPLE = charge/conversion time
(tSENSE) + computation time (tPROCESS) of
compared to the LTA to detect Touch and approximately tSAMPLE = 1.6ms. Thus the
Proximity events. time between consecutive samples on a
Please note: Attaching scope probes to specific channel (Scan Period) will depend
on the number of enabled channels and the
the CTX/CRX pins will influence the
length of communication between the
capacitance of the sense electrodes and IQS333 and the host MCU. Communication
therefore the related CS values of those will always happen after processing of the
channels. This will have an instant effect last active channel. Due to processing and
on the CS measurements. charging happening in parallel, CH0 will
charge while the last active channel is
processed. Therefore, communication
IQ Switch®
ProxSense® Series
windows will always be after CH0 has

charged.
sense
process
Scan Period
CH0 CH1 CH2 CHx CH0 CH1

Prox
tcomms
RDY
Figure 6.1 IQS333 Charge Sequence timing diagram in Boost Power mode.
Typical timings of the charge sequence shown above are listed in Table 6.1. These timings are
only as reference, as they will differ with each application, depending on the setup of the
IQS333. For example, the sense (or charge time) is affected by the target counts and charge
transfer frequency, while process time is dependent on the turbo mode activation, ATI
checking for counts within the pre-set band, filter settings and slider calculations.
Communication time is affected by the MCU clock speed and the amount of data read (as well
as the sequence thereof) and can be bypassed with using Event Mode. Communication time
and the number of active channels will influence the Scan Period. Values shown below are for
default settings.
Table 6.1 Typical Timings
Typical timings of IQS333
tsense 600 µs
tprocess 1.4 ms
tcomms 6 ms
Scan Period1 26 ms
1
All channels active, and all data read during communication window. Projected mode, all other settings default.

IQ Switch®
ProxSense® Series
6.2.2 Low Power rate • Charge Transfer Speed: Increasing

the charge transfer frequency will
A wide range of low current consumption
reduce the conversion time (tSENSE)
charging modes is available on the IQS333.
and increase the touch report rate.
In any Low Power (LP) mode, there will be
an applicable low power time (tLP). This is • ACF: Disabling the AC filter and
determined by Register 0x0A, byte 1. The wheel/slider position calculations will
value written into this register multiplied by reduce the processing time
16ms will yield the LP time (tLP). (tPROCESS) and yield a faster report
With the detection of an undebounced rate.
proximity event the IC will zoom to BP 6.4 Long Term Average
mode, allowing a very fast reaction time for
further possible touch events. The Long-term Average (LTA) filter can be
seen as the baseline or reference value.
During any LP mode, only channel 0 is The LTA is calculated to continuously adapt
charged every tLP. The LP charge timing is to any environmental drift. The LTA filter is
illustrated in Figure 5.3. calculated from the CS value for each
If a low power rate is selected and charging channel. The LTA filter allows the device to
is not in the zoomed state (BP mode), the adapt to environmental (slow moving)
low power active bit (Register 0x01) will be changes/drift. Actuation (Touch or Prox)
set. decisions are made by comparing the CS
value with the LTA reference value.
Please refer to Section 5.10.
The 12bit LTA values are contained in
6.3 Touch report Rate Register 0x05. Low bytes first, from CH0
During Boost Power (BP) mode, the touch up to CH9 (18 bytes in total).
report rate of the IQS333 device depends Please refer to Section 5.8 for LTA Halt
on the charge transfer frequency, the Times.
number of channels enabled and the length
of communications performed by the host 6.5 Determine Touch or Prox
MCU or master device. An event is determined by comparing the
Several factors may influence the touch CS value with the LTA. Since the CS reacts
report rate: differently when comparing the self- with
the mutual capacitance technology, the
• Enabled channels: Disabling
user should consider only the conditions for
channels that are not used will not
the technology used.
only increase the touch report rate,
but will also reduce the device’s An event is recorded if:
current consumption. • Self: CS < LTA – Threshold
• Turbo Mode: See Section 5.10.2 • Projected: CS > LTA + Threshold
• Target Values: Lower target values Threshold can be either a Proximity or
requires shorter charge transfer Touch threshold, depending on the current
times (tSENSE), thus reducing the channel being processed.
SCAN PERIOD and increasing the
touch report rate.

IQ Switch®
ProxSense® Series
Note that a proximity condition will be 𝑇𝐴𝑅𝐺𝐸𝑇

𝑆𝑒𝑛𝑠𝑖𝑡𝑖𝑣𝑖𝑡𝑦 ∝
forced enabled if there is a touch condition 𝐵𝐴𝑆𝐸
on any channel. As can be seen from this equation, the
Please refer to Section 1.1 and 5.4 for sensitivity can be increased by either
proximity and touch threshold selections. increasing the Target value or decreasing
the Base value. It should, however, be
6.6 ATI noted that a higher sensitivity will yield a
The Automatic Tuning Implementation higher noise susceptibility.
(ATI) is a sophisticated technology 6.6.2 ATI Target
implemented on the new ProxSense®
series devices. It allows for optimal The target value is reached by adjusting
performance of the devices for a wide the COMPENSATION bits for each channel
range of sense electrode capacitances, (ATI target limited to 4096 counts).
without modification or addition of external The target value is written into the
components. respective channel’s TARGET registers.
The ATI allows the tuning of two The value written into these registers
parameters, an ATI Multiplier and an ATI multiplied by 8 will yield the new target
Compensation, to adjust the Count values value. (Please refer to Section 5.13)
for an attached sense electrode. 6.6.3 ATI Base (Multiplier)
ATI allows the designer to optimize a The base value is calculated with the
specific design by adjusting the sensitivity compensation set to zero. The following
and stability of each channel through the parameters will influence the base value:
adjustment of the ATI parameters.
• Cs_SIZE1: Size of sampling capacitor.
The IQS333 has a full ATI function. The
• PROJ_BIAS bits: Adjusts the biasing of
full-ATI function is default enabled, but can
some analogue parameters in the
be disabled by setting the ATI_OFF bit, or
mutual capacitive operated IC. (Only
changed to partial or alternative ATI by
applicable in mutual capacitance
setting the ATI_Partial and ATI_ALT bits in
mode.)
Register 0x08, byte 0.
The ATI_Busy bit in Register 0x01, byte 0 • Charge Transfer Frequency
(Sysflags0) will be set while an ATI event is • MULTIPLIER bits.
busy.
The base value used for the ATI function
For more information regarding the ATI can be implemented in 2 ways:
algorithm, please contact Azoteq at:
1. ATI_PARTIAL = 0. ATI automatically
ProxSenseSupport@azoteq.com
adjusts MULTIPLIER bits to reach a
6.6.1 ATI Sensitivity selected base value2. Please refer
On the IQS333 device, the user can specify to Section 5.12 for available base
the BASE value (Section 5.12) for each values.
channel individually and the TARGET
values (Section 5.13) for the proximity
1
(CH0) and touch (CH1-CH9) channels. Changing CS_SIZE if ATI_OFF = 0 will change CS
2 ATI function will use user selected CS_SIZE and
Sensitivity is a function of base and target PROJ_BIAS (if applicable) and will only adjust the
MULTIPLIER bits to reach the base values.
values as follows:
IQ Switch®
ProxSense® Series
2. ATI_PARTIAL = 1. The designer can LTAnew = CS + 8 (CS – 8 for Self). The LTA
specify the multiplier settings. These will then track the CS value until they are
settings will give a custom base even.
value from where the compensation
Performing a reseed action on the LTA
bits will be automatically
filters, will effectively clear any proximity
implemented to reach the required
and/or touch conditions that may have
target value. The base value is
been established prior to the reseed call.
determined by two sets of multiplier
bits. Sensitivity Multipliers which will 6.6.6 Alternative ATI
also scale the compensation to The Alternative ATI implementation
normalise the sensitivity and ensures that all the multiplier values are
Compensation Multipliers to adjust identical for all the channels and adjusts
the gain. only the compensation in order to achieve
the desired count value. The multipliers are
6.6.4 Re-ATI selected from the channel with the smallest
multipliers according to the full ATI
An automatic re-ATI event will occur if the
algorithm. Alternative ATI can be enabled
counts are outside its re-ATI limits. The re- in Register 0x08, byte 0.
ATI limit or ATI boundary is calculated as
the target value divided by 8. For example: 6.6.7 ATI ERROR
The ATI error bit (read only) in Register
- Target = 512, Re-ATI will occur if CS is
0x08, byte 1 (Prox_Settings1) indicates to
outside 512±64. the user that the ATI targets where not
A re-ATI event can also be issued by the reached. Adjustments of the base values or
ATI BANDs are required.
host MCU by setting the REDO_ATI bit in
Register 0x08, byte0 (ProxSettings0). The 6.6.8 ATI Band
REDO_ATI bit will clear automatically after The user has the option to select the re-ATI
the ATI event was started. band as 1/8 of the ATI target (default) or ¼
of the ATI target counts by setting the ATI
Note: Re-ATI will automatically clear all
BAND bit in Register 0x08, byte 1
proximity, touch and halt status bits. (Prox_Settings1).
6.6.5 Reseed
Setting the Reseed bit in Register 0x08,
byte 0), will shift all LTA filters to a value of
7 Communication
The IQS333 device interfaces to a master controller via a 3-wire (SDA, SCL and RDY) serial
interface bus that is I2CTM compatible, with a maximum communication speed of 400kbit/s.
7.1 Control Byte
The Control byte indicates the 7-bit device address (64H default) and the Read/Write indicator
bit. The structure of the control byte is shown in Figure 7.1.

IQ Switch®
ProxSense® Series
7 bit address
MSB 1 1 0 0 1 0 0 R/W LSB
I2C Group Sub- addresses
Figure 7.1 IQS333 Control Byte.

The I2C device has a 7 bit Slave Address (default 0x64H) in the control byte as shown in
Figure 7.1. To confirm the address, the software compares the received address with the
device address. Sub-address values can be set by OTP programming options.
7.2 I2C Read
To read from the device a current address read can be performed. This assumes that the
address-command is already setup as desired.
Current Address Read
Start Control Byte Data n Data n+1 Stop
S ACK ACK NACK S
Figure 7.2 Current Address Read.

If the address-command must first be specified, then a random read must be performed. In
this case a WRITE is initially performed to setup the address-command, and then a repeated
start is used to initiate the READ section.
Random Read
Address-
Start Control Byte command Start Control Byte Data n Stop
S Adr + WRITE ACK ACK S Adr + READ ACK NACK S
Figure 7.3 Random Read.

7.3 I2C Write
To write settings to the device a Data Write is performed. Here the Address-Command is
always required, followed by the relevant data bytes to write to the device.
DATA WRITE
Address-
Start Control Byte Command Data n Data n+1 Stop
S Adr + WRITE ACK ACK ACK ACK S
Figure 7.4 I2C Write.

7.4 End of Communication Session / Window
Similar to other Azoteq I2C devices, to end the I2C communication session, a STOP command
is given. When sending numerous read and write commands in one communication cycle, a
repeated start command must be used to stack them together (since a STOP will jump out of
the communication window, which is not desired).
The STOP will then end the communication, and the IQS333 will return to process a new set of
data. Once this is obtained, the communication window will again become available (RDY set
LOW).

IQ Switch®
ProxSense® Series
7.5 I2C Sub-address 7.7 RDY Hand-Shake Routine

The IQS333 has four available sub The master or host MCU has the capability
addresses, 64H (default) to 67H, which to force a communication window at any
allows up to four devices on a single I2C time, by pulling the RDY line low. The
bus.
communication window will open directly
7.5.1 Internal sub-address selection following the current conversion cycle.
Selecting the sub-address via OTP bits 7.8 I2C Specific Commands
allows the user 4 different options:
7.8.1 Show Reset
Table 7.1 I2C sub-address selection
The SHOW_RESET bit can be read in
FG25 FG26 Device Address Register 0x01, byte 1 (Sysflags0), to
0 0 0x64 determine whether a reset has occurred on
0 1 0x65 the device. This bit will be set ’1’ after a
1 0 0x66 reset. A reset can be forced by writing the
1 1 0x67 Soft_Reset bit in Register 0x08, byte 2
7.6 Event Mode (ProxSettings2).
By default the device operates in full The SHOW_RESET bit will be cleared (set
streaming mode. There is an option for an to ’0’) by writing a ’1’ into the ACK_RESET
event-driven I2C communication mode (also bit in Register 0x08, byte 3
called “Event Mode”), with the RDY pin (ProxSettings3). A reset will typically take
ONLY indicating a communication window place if a timeout during communication
after a prescribed event has occurred. occurs.
These events include: 7.8.2 WDT disable
• Proximity events The WDT (watchdog timer) is used to reset

the IC if a problem (for example a voltage
• Touch events
spike) occurs during communication. The
• ATI events
WDT will time-out (and thus reset the
• Noise events (Noise detect enabled)
device) after tWDT if no valid communication
occurred during this time.
If the wheels/sliders are enabled, the The WDT can be disabled by setting the
device will stream data continuously when WDT Off bit in Register 0x08, byte 2
a touch is present on one of the (ProxSettings2).
wheel/slider channels, even if Event Mode
is enabled. This allows the wheel/slider 7.8.3 Timeout Disable
coordinates to be read continuously. If no communication is initiated from the
Event Mode can be enabled by setting the master/host MCU within the first tCOMMS
Event_Mode bit in Register 0x08, byte 2 (tCOMMS = 20ms) of the RDY line indicating
(Prox_Settings2). that data is available (i.e. RDY = low), the
device will resume with the next cycle of
Note: The device is also capable of charge transfers and the data from the
functioning without a RDY line on a polling previous conversions will be lost.
basis.

IQ Switch®
ProxSense® Series
This time-out function can be disabled by

setting the TIME_OUT DISABLE bit in
Register 0x08, byte 2 (ProxSettings2).
7.8.4 Soft Reset
The user has the option to do a soft reset
on the IQS333. The soft reset will clear all
the registers (the device will restart as with
POR) except the PWM register will keep
their state.
A soft reset is initiated by setting the bit in
Register 0x08, byte 2 (Prox_Settings2).
The bit Soft Reset bit will automatically
clear after the command is sent.
7.9 I2C I/O Characteristics
The IQS333 requires the input voltages
given in Table 7.2, for detecting high (“1”)
and low (“0”) input conditions on the I2C
communication lines (SDA, SCL and RDY).
Table 7.2 IQS333 I2C Input voltage
Input Voltage (V)

VinLOW 0.3*VDDHI
VinHIGH 0.7*VDDHI
Table 7.3 provides the output voltage levels

of the IQS333 device during I2C
communication.
Table 7.3 IQS333 I2C Output voltage
Output Voltage (V)

VoutLOW VSS +0.2 (max.)
VoutHIGH VDDHI – 0.2 (min.)

IQ Switch®
ProxSense® Series
7.10 PWM Controller CMP4:0 PWM Timer PWM DUTY

Count
The IQS333 incorporates a highly configurable 3 3 4.69%
PWM controller to implement user 4 4 6.25%
configurable LED lighting displays. The 5 5 7.81%
various PWM control modes can be easily 6 6 9.38%
configured with an I2C interface by writing 7 7 10.94%
directly to the control bytes in the memory 8 8 12.50%
map. There are 8 identical PWM modules with 9 9 14.06%
15.625kHz PWM carrier frequency which can 10 10 15.63%
be controlled independently to allow for a wide 11 11 17.19%
range of user configurable options. 12 12 18.75%
7.11 PWM Diming modes 13 13 20.31%
14 14 21.88%
The hardware PWM channels can be 15 15 23.44%
controlled through the memory map various 16 16 25.00%
diming modes. These include: 17 18 28.13%
• Incrementing to 100% 18 20 31.25%
19 22 34.38%
• Incrementing to a set level 20 24 37.50%
• Decrementing to 0% 21 26 40.63%
22 28 43.75%
• Decrementing to a set level 23 30 46.88%
The speed of the dimming modes is also 24 32 50.00%
configurable. 25 36 56.25%
26 40 62.50%
7.12 Dimming During LP 27 44 68.75%
28 48 75.00%
Because the IQS333 PWM lines requires the
29 52 81.25%
use of FOSC to output correctly, the PWM
30 56 87.50%
lines cannot be used if low power modes are
31 64 100.00%
required in the application. During low power
the main oscillator on the IQS333 goes to
sleep which results in dimming changes on all
PWM lines.
7.13 PWM Duty Cycle Mapping
Although there are only 5 PWM bits in the
MM, the resolution of the PWM engine is
effectively 6 bits to ensure a more linear
increase in LED brightness. A 6 bit internal
timer is compared to a PWM value comprised
of the Duty Cycle bits CMP4:0 in Register
0x0C, bytes 0 to 7.
Table 7.4 PWM Duty Cycle Mapping
CMP4:0 PWM Timer PWM DUTY
Count
0 0 0.00%
1 1 1.56%
2 2 3.13%

IQ Switch®
ProxSense® Series
PWM SLOPE
100.00%
90.00%
80.00%
70.00%
60.00%
DUTY CYCLE
50.00%
40.00%
30.00%
20.00%
10.00%
0.00%
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CMP4:0
Figure 7.5 PWM Slope.

▪ Place the sensor IC as close as
8 RF Noise possible to the sense electrodes.
Please see application note: “AZD015: RF ▪ All the tracks on the PCB must be
Immunity and detection in ProxSense kept as short as possible.
devices” for details regarding RF noise and
▪ The capacitor between VDDHI and
capacitive sensing.
GND as well as between VREG and
8.1 RF Noise Immunity GND must be placed as close as
possible to the IC.
The IQS333 has advanced immunity to RF
noise sources such as GSM cellular ▪ A 100 pF capacitor can be placed in
telephones, DECT, Bluetooth and WIFI parallel with the 1uF capacitor
devices. Design guidelines should however between VDDHI and GND. Another
be followed to ensure the best noise 100 pF capacitor can be placed in
immunity on a hardware level. parallel with the 1uF capacitor
between VREG and GND.
In general, the design of capacitive sensing
applications may encompass a large range ▪ When the device is too sensitive for
of configurations; however, following the a specific application a parasitic
guidelines in Section 8.1.1 may improve a capacitor (max 5pF) can be added
capacitive sensing design. between the CX line and ground.
▪ Proper sense electrode and button
design principles must be followed.
8.1.1 Notes for layout:
▪ Unintentional coupling of sense
▪ A ground plane should be placed
electrodes to ground and other
under the IC, except under the CRX
circuitry must be limited by
lines.

IQ Switch®
ProxSense® Series
increasing the distance to these  However, if after proper layout,

sources. interference from an RF noise
▪ In some instances a ground plane source persists, please refer to
some distance from the device and application note: “AZD015: RF
sense electrode may provide Immunity and detection in
significant shielding from ProxSense devices”.
undesirable interference.

IQ Switch®
ProxSense® Series
9 Communication Command/Address Structure
9.1 Registers
Table 9.1 IQS333 Registers
Address Description Access Section
0x00H Device Information R 9.2.1
0x01H System Flags R/W 9.2.2
0x02H Wheel Coordinates R 0
0x03H Touch Bytes R 9.2.4
0x04H Counts R 9.2.5
0x05H LTA R 9.2.6
0x06H Multipliers R/W 9.2.7
0x07H Compensation R/W 9.2.8
0x08H ProxSettings R/W 9.2.9
0x09H Thresholds R/W 9.2.10
0x0AH Timings R/W 9.2.11
0x0BH Targets R/W 9.2.12
0x0CH PWM Duty R/W 9.2.13
0x0DH PWM LIM R/W 9.2.14
0x0EH Active Channels R/W 9.2.15
0x0FH Buzzer R/W 9.2.16
9.2 Registers Descriptions

9.2.1 Device Information 0x00H
Information regarding the device type and version is recorded here. Any other information
specific to the device version can be stored here. Each Azoteq ROM has a unique Product-
and Version number.

IQ Switch®
ProxSense® Series
Product Number (PROD_NUM)
Access Bit 7 6 5 4 3 2 1 0
R Value 54 (Decimal)1
Version Number (VERSION_NUM)
Access Bit 7 6 5 4 3 2 1 0
R Value 02 (Decimal)
9.2.2 System Flags 0x01H
System Flags (SYSFLAGS0)
Access Bit 7 6 5 4 3 2 1 0
Show Filter Proj Is Ch0 LP ATI Noise Zoom

R/W Name reset Halted Mode Active Busy detect
ed
Bit 5: 0 = Self Capacitive Sensing (Default)

1 = Projected Capacitive Sensing
9.2.3 Wheel Coordinates 0x02H
Wheel 1 Low
Access Bit 7 6 5 4 3 2 1 0
R Name Wheel 1 Coordinate Low byte first
Wheel 1 High
Access Bit 7 6 5 4 3 2 1 0
R Name Wheel 1 Coordinate High byte
1
Product and Version numbers are 32 14 for QFN20 devices – alpha customers only

IQ Switch®
ProxSense® Series
Wheel 2 Low
Access Bit 7 6 5 4 3 2 1 0
R Name Wheel 2 Coordinate Low byte first
Wheel 2 High
Access Bit 7 6 5 4 3 2 1 0
R Name Wheel 2 Coordinate High byte
9.2.4 Touch Bytes 0x03H
Touch Byte 0
Access Bit 7 6 5 4 3 2 1 0
R Name CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH01
Bit 0 of the first byte (CH0) will indicate proximity events; the rest of the bits indicate touches
as shown.
Touch Byte 1
Access Bit 7 6 5 4 3 2 1 0
R Name CH9 CH8
9.2.5 Counts 0x04H

This register has 18 bytes to store the count values of CH0 up to CH9 the low byte will always
read out first, followed by the high byte, before the moving to the next channel.
CH0 Low
Access Bit 7 6 5 4 3 2 1 0
R Name Channel 0 CS (Counts) Low byte first
1
CH0 indicates Proximity, not Touch.
IQ Switch®
ProxSense® Series
CH n High
Access Bit 7 6 5 4 3 2 1 0
R Name Last active channel, Count value (High byte last)
9.2.6 LTA 0x05H

This register has 18 bytes to store the LTA values of CH0 up to CH9 the low byte will always
read out first, followed by the high byte, before the moving to the next channel.
CH0 LTA Low byte
Access Bit 7 6 5 4 3 2 1 0
R Name
CH n LTA High byte
Access Bit 7 6 5 4 3 2 1 0
R Name
9.2.7 Multipliers 0x06H
CH0 Multipliers
Access Bit 7 6 5 4 3 2 1 0
Sensitivity
R/W Name Base Value Multipliers
Compensation Multipliers
Bit 7:6: 00 = 200 (default)

01 = 75
10 = 100
11 = 150
CH n Multipliers
Access Bit 7 6 5 4 3 2 1 0
Sensitivity
R/W Name Base Value Multipliers
Compensation Multipliers

IQ Switch®
ProxSense® Series
9.2.8 Compensation 0x07H
CH0 Compensation value
Access Bit 7 6 5 4 3 2 1 0
R/W Name Channel 0 Compensation
Byte 0
CH n Compensation Value
Access Bit 7 6 5 4 3 2 1 0
R/W Name Last active channel Compensation
Byte n
9.2.9 ProxSettings 0x08H
ProxSettings0
Access Bit 7 6 5 4 3 2 1 0
ATI OFF Partial ALT ATI Redo Reseed Cs Proj Bias

R/W Name
ATI ATI Size
Byte 0 Default 0x06H
Bit 1:0: 00 = 2.5µA

01 = 5µA
10 = 10µA (default)
11 = 20µA
Bit 2: 0 = Small
1 = Large
ProxSettings1
Access Bit 7 6 5 4 3 2 1 0
Charge Transfer Turbo Halt ~ CH0 Error Band

R/W Name
Speed Mode Charge on 1Tx

IQ Switch®
ProxSense® Series
Bit 7:6: 00 = 1MHz

01 = 500kHz
10 = 250kHz
11 = 2MHz
Bit 2: 0 = All TX for CH0
1 = Only Tx0
Bit 0: 0 = 1/4
1 = 1/8
ProxSettings2
Access Bit 7 6 5 4 3 2 1 0
Soft WDT Force ACF Timeout Disable Event Mode Halt

R/W Name
Reset Off Halt Disable
Bit 1:0: 00 = F_Halt period (Set in Register 0x0A)

01 = F_Halt period (Set in Register 0x0A)
10 = Never
11 = Always
ProxSettings3
Access Bit 7 6 5 4 3 2 1 0
Wheel Wheel Filter Wheel2 Wheel1 ACK

R/W Name
Resolution Disable Disable Disable Reset
Bit 6:4: 000 = 11-bit

111 = 4-bit
ProxSettings4
Access Bit 7 6 5 4 3 2 1 0
R/W Name Up Up Enable Pass

IQ Switch®
ProxSense® Series
ProxSettings5
Access Bit 7 6 5 4 3 2 1 0
R/W Name CTRX_VSS
Byte 5 Default 0x7FH
9.2.10 Thresholds 0x09
Proximity Threshold
Access Bit 7 6 5 4 3 2 1 0
R/W Name Value
Touch Threshold CH1
Access Bit 7 6 5 4 3 2 1 0
R/W Name (Value/256)*LTA
Touch Threshold CH9
Access Bit 7 6 5 4 3 2 1 0
R/W Name (Value/256)*LTA
9.2.11 Timings 0x0AH
Filter Halt (t_HALT)
Access Bit 7 6 5 4 3 2 1 0
R/W Name Steps of 250ms

IQ Switch®
ProxSense® Series
Power Mode (LP)
Access Bit 7 6 5 4 3 2 1 0
R/W Name Steps of 16ms
Timeout Period
Access Bit 7 6 5 4 3 2 1 0
R/W Name Steps of 1.28ms
CH0 ACF Beta
Access Bit 7 6 5 4 3 2 1 0
R/W Name Value
CH1 – CH9 ACF Beta
Access Bit 7 6 5 4 3 2 1 0
R/W Name Value
9.2.12 ATI Targets 0x0BH
ATI Target CH0
Access Bit 7 6 5 4 3 2 1 0
R/W Name Steps of 8
Byte 0 Default 128 (Decimal)

IQ Switch®
ProxSense® Series
ATI Targets CH1 to CH 9
Access Bit 7 6 5 4 3 2 1 0
R/W Name Steps of 8
Byte 1 Default 64 (Decimal)
9.2.13 PWM 0x0CH
PWM 0
Access Bit 7 6 5 4 3 2 1 0
R/W Name Mode Duty Cycle
PWM 7
Access Bit 7 6 5 4 3 2 1 0
R/W Name Mode Duty Cycle
Bit 7-5: MODE2:MODE0: Selects PWM mode.

000 = PWM Off
001 / 010 / 011 = PWM Constant
100 = PWM CMP4:0 decremented and stops at 0%
101 = PWM CMP4:0 decremented and stops at value in PWM_LIM
110 = PWM CMP4:0 incremented and stops at 100%
111 = PWM CMP4:0 incremented and stops at value in PWM_LIM
Bit 4-0: CMP4:CMP0: LED Duty Cycle Value
9.2.14 PWM Limit 0x0DH
PWM Lim
Access Bit 7 6 5 4 3 2 1 0
R/W Name PWM Limit

IQ Switch®
ProxSense® Series
Bit 7-5: System Use

Bit 4-0: LIM4:LIM0: CMP 4:0 is compared against this value if MODE 2:0 is configured 101
or 111
PWM Speed
Access Bit 7 6 5 4 3 2 1 0
R/W Name PWM Speed
Bit 7-4: System Use

Bit 3-0: SPD3:SPD0: PWM slope adjustment speed control
𝑃𝑊𝑀 𝑇𝑖𝑚𝑖𝑛𝑔 = 𝑆𝑃𝐷3: 0 × ⌊𝐶𝑀𝑃4: 0 + 1⌋ × 8.192𝑚𝑠
Example:
SPD3:0 = 0100
CMP4:0 = 11111 (PWM Duty = 100%)
𝑇𝑜𝑛 = 4 × ⌊31 + 1⌋ × 8.192𝑚𝑠 = 1.0486𝑠
9.2.15 Active Channels 0x0EH
Active Chan 0
Access Bit 7 6 5 4 3 2 1 0
R/W Name CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0
Byte 0 Default 0x0FH
Active Chan 1
Access Bit 7 6 5 4 3 2 1 0
R/W Name CH9 CH8

IQ Switch®
ProxSense® Series
9.2.16 Buzzer Output 0x0FH
Buzzer 0
Access Bit 7 6 5 4 3 2 1 0
R/W Name Enable DC PERM Burst
This Byte sets up the Buzzer as shown below:

Bit 7: Enable: This bit enables or Disables the Buzzer output
0 = Disabled
1 = Enabled
Bit 6-3: Not Used
Bit 2: DC: Makes a DC output
0 = Low
1 = High
Bit 1: Perm: Permanently sounding the buzzer
0 = Disabled
1 = Enabled
Bit 0: Burst: Burst mode to make a “click” sound
0 = Disabled
1 = Enabled

IQ Switch®
ProxSense® Series
10 IQS333 OTP Options

The IQS333 only provide OTP (One-Time Programmable) options for configuration of the
device I2C sub-address and charge transfer methodology (Self/Projected sensing).
Configuration of the OTP settings can be done on packaged devices or in-circuit. In-circuit
configuration may be limited by values of external components chosen.
Azoteq offers a Configuration Tool (CT210 or later) and associated software that can be used
to program the OTP user options for prototyping purposes. For further information regarding
this subject, please contact your local distributor or submit enquiries to Azoteq at:
ProxSenseSupport@azoteq.com
10.1 User Selectable OTP options

Table 10.1 User Selectable OTP options : Bank3
bit7 Bank 3 bit0
System System System System Proj_Mode I2C I2C System

use use use use SubAddr1 SubAddr0 use
Bank3: bit7 System Use
Bank3: bit 3 Proj_Mode : Projected Selection
0 = Self (Default)
1 = Projected
Bank3: bit 2:1 I2C SubAddr1: I2C SubAddr0 : I2C Sub-Address selection
00 = 0x64 (Default)
01 = 0x65
10 = 0x66
11 = 0x67
Bank3: bit 0 System Use

IQ Switch®
ProxSense® Series
11 Specifications
11.1 Absolute Maximum Specifications
The following absolute maximum parameters are specified for the device:
Exceeding these maximum specifications may cause damage to the device.
• Operating temperature -20°C to 85°C
• Supply Voltage (VDDHI – VSS) 3.6V
• Maximum pin voltage VDDHI + 0.5V (may not
exceed VDDHI max)
• Maximum continuous current (for specific Pins) 10mA
• Minimum pin voltage VSS - 0.5V
• Minimum power-on slope 100V/s
• ESD protection ±8kV (Human body model)
Table 11.1 IQS333 Self Capacitive General Operating Conditions1
DESCRIPTION Conditions PARAMETER MIN TYP MAX UNIT
Supply voltage VDDHI 1.8 3.3V 3.6 V
Internal regulator output 1.8 ≤ VDDHI≤ 3.6 VREG 1.62 1.7 1.79 V
Default Operating Current 3.3V IIQS333NP - 360 μA
Low Power Setting 1* 3.3V, LP=1 16ms - 58 μA
Low Power Setting 32* 3.3V, LP=32 512ms - <6 μA
*LP interval period = Low power value x 16ms
1
Operating current shown in this datasheet, does not include power dissipation through I 2C pull up resistors.

IQ Switch®
ProxSense® Series
Table 11.2 IQS333 Projected Capacitive General Operating Conditions
DESCRIPTION Conditions PARAMETER MIN TYP MAX UNIT
Supply voltage VDDHI 1.8 3.3V 3.6 V
Internal regulator output 1.8 ≤ VDDHI≤ 3.6 VREG 1.62 1.7 1.79 V
Default Operating Current 3.3V IIQS333 - 530 μA
Low Power Setting 32* 3.3V, LP=32 512ms - <6 μA
*LP interval period = Low power value x 16ms
Table 11.3 Start-up and shut-down slope Characteristics
DESCRIPTION Conditions PARAMETER MIN MAX UNIT
VDDHI Slope ≥ 100V/s

Power On Reset POR 1.6 V
@25°C
VDDHI Slope ≥ 100V/s

Brown Out Detect BOD 1 V
@25°C

IQ Switch®
ProxSense® Series
11.2 Moisture Sensitivity Level
Moisture Sensitivity Level (MSL) relates to the packaging and handling precautions for some
semiconductors. The MSL is an electronic standard for the time period in which a moisture
sensitive device is allowed to be exposed to ambient room conditions (approximately
30°C/60%RH) before reflow must occur.
Table 11.4 MSL
Package Level (duration)

QFN5x5-32 MSL 3 (168 hours)
QFR5x5-32 MSL 3 (168 hours)
11.3 Recommended storage environment
This storage environment assumes that the IC’s are packed properly inside a humidity barrier
bag:
Parameter Description Min Typ Max Unit Notes
TSTG Storage -55 25 150 °C Recommended storage temperature is 25 °C ± 25
Temperature °C. Extended duration storage at temperatures
above 85 °C degrades reliability as well as reduces
data retention performance
Tj Junction 150
Temperature
11.3.1 Supplementary notes according to Jedec recommendations
• Optimal Storage Temperature Range: 5 °C to 30 °C
• Humidity: between 40 to 70% RH
• Air should be clean
• Avoid harmful gasses and dust
• Avoid outdoor exposure or storage in areas subject to rain or water spraying
• Avoid storage in areas subject to corrosive gas or dust. Products shall not be stored in
areas exposed to direct sunlight
• Avoid rapid changes of temperature
• Avoid condensation
• Mechanical stress such as vibration and impact shall be avoided
• The products shall not be placed directly on the floor
• The products shall be stored on a plane area. They should not be turned upside down.
They should not be placed against the wall

IQ Switch®
ProxSense® Series
Table 11.5 Initial Touch Times (First Touch)
DESCRIPTION PARAMETER MAX Unit
TURBO MODE1 Response time 70 ms
Table 11.6 Repetitive Touch Rates
DESCRIPTION Conditions PARAMETER Rate UNIT
All power modes Zoom active Response Rate2 >8 Touches/second
The SCAN PERIOD of the IQS333 is increased by:

• Faster communication.
• Less data transfer.
• Using the fast charge selection (Turbo Mode) of the IQS333.
• Reduced process time by disabling ACF, wheel filter, wheel position and ATI.
1
Communication and charge frequency to comply with sample rate as reported earlier in this datasheet.
2
Debounce of 2 up and 2 down, 9 active channels in Event Mode

IQ Switch®
ProxSense® Series
12 Package information
12.1 IQS333 Package dimensions
W
P
F
B
Tt
Wt
C2
C1
A
Figure 12.1 IQS333 Package. Drawings not too scale -

illustration only.
Table 12.1 Packaging Dimensions.
QNR QFR
DESCRIPTION MIN MAX Unit
A 4.90 5.10 4.90 5.10 mm
B 4.90 5.10 4.90 5.10 mm
C1 0 0.05 0 0.05 mm
C2 0.203TYP 0.203TYP mm
F 0.600TYP 0.3 0.4 mm
H 0.85 0.95 0.85 0.95 mm
P 0.5TYP 0.5TYP mm
T 0.3 0.5 0.3 0.5 mm
Tt 3.3 TYP 3.55 3.75 mm
W 0.25TYP 0.25TYP mm
Wt 3.3 TYP 3.55 3.75 mm

IQ Switch®
ProxSense® Series
12.1.2 QFR package differences to QNR package

The overall physical size of the part (l x w x h) and pitch of the pins did not change.
The mechanical dimensions of the saddle (Tt & Wt) and length of the pins (F) have changed
from the old part (IQS333-0-QNR) to the new part (IQS333-0-QFR). The new dimensions are
given below:
IQS333 IQS333
-0-QNR -0-QFR
Figure 12.2 Changes in Package Dimensions. Only affected dimensions are

shown. Drawing for illustration only, not too scale.

IQ Switch®
ProxSense® Series
Y1 X2
X1 32 31 30 29 28 27 26 25
1 24
2 23
3 22
4 21
Y2 C2
33
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
C1
Figure 12.3 IQS333 Recommended Footprint. Illustration is not too

scale.
Table 12.2 IQS333 Footprint Recommended Dimensions.
QFN QFR
DESCRIPTION
Dimension Dimension Unit
C1 4.90 4.85 mm
C2 4.90 4.85 mm
X1 0.30 0.25 mm
X2 3.25 3.65 mm
Y1 0.90 0.8 mm
Y2 3.25 3.65 mm

IQ Switch®
ProxSense® Series
R1
R2
Figure 12.4 Silk Screen – optional.
Table 12.3 Silk Screen Dimensions.
DESCRIPTION Dimension Unit
R1 5.00 mm
R2 5.00 mm

IQ Switch®
ProxSense® Series
12.2 Tape and Reel Information
Figure 12.5 12mm Carrier Tape. Pin 1 – Left Bottom.

IQ Switch®
ProxSense® Series
13 Device Marking
IQS333 x t z PWWYY
REVISION DATE CODE
SUB ADDRESS
TEMPERATURE CONFIGURATION
REVISION x = IC Revision Number

TEMPERATURE RANGE t = I -20°C to 85°C (Industrial)
= C 0°C to 70°C (Commercial)
IC CONFIGURATION z = Sub Address Configuration (Hexadecimal)
0 = 64H
1 = 65H
2 = 66H
3 = 67H
DATE CODE P = Package House
WW = Week
YY = Year
14 Ordering Information
Order quantities will be subject to multiples of a full reel. Contact the official distributor for
sample quantities. A list of the distributors can be found under the “Distributors” section of
www.azoteq.com.
IQS333 z ppb
IC NAME BULK PACKAGING
SUB ADDRESS
PACKAGE TYPE
CONFIGURATION
IC NAME IQS333 = IQS333

0 = 64H
1 = 65H
2 = 66H
3 = 67H
PACKAGE TYPE QN = QFN(5x5)-32
QF = QFR(5x5)-32
BULK PACKAGING R = Reel (3000pcs/reel)

IQ Switch®
ProxSense® Series
15 Errata
15.1 Last Active Channels
The IQS333 only accepts settings for active channels. Therefore, to update any settings for
channels that are not enabled by default (only channels 0 to 3 are active by default), these
channels need to be activated first (followed by a STOP command), before settings can be written
to the IQS333 in the next communication window. Channels are only activated on the IC after
exiting the communication window. Settings here include everything specific to an individual
channel, such as base values and touch thresholds.
16 Datasheet Revision History

Table 16.1 Document Revisions
Revision Description Date
1.00 Preliminary Release January 2013
1.01 Update default register values April 2013
1.02 Add QFN32 information June 2013
1.03 Include more layout examples September 2013
1.04 Update Tape and Reel specifications August 2014
1.05 Remove QFN20 information, add QFR 32 information November 2014
1.06 Add Storage Temperature Specifications December 2014
1.07 Update Contact and Patent information March 2015
1.08 Updated Electrical Specifications October 2015
1.09 Additional Low Power current figures added January 2016
1.10 Update Contact and Patent information September 2016
1.11 Update Temperature Rating September 2017
1.12 Update Contact and Patent information February 2018
1.13 Update Reference schematic for Halt Charge May 2018

IQ Switch®
ProxSense® Series
Appendix A. Contact Information
USA Asia South Africa

Physical 6507 Jester Blvd Rm1227, Glittery City 109 Main Street
Address Bldg 5, suite 510G Shennan Rd Paarl
Austin Futian District 7646
TX 78750
Shenzhen, 518033 South Africa
USA
China
Postal 6507 Jester Blvd Rm1227, Glittery City PO Box 3534
Address Bldg 5, suite 510G Shennan Rd Paarl
Austin Futian District 7620
TX 78750
Shenzhen, 518033 South Africa
USA
China
Tel +1 512 538 1995 +86 755 8303 5294 +27 21 863 0033
ext 808
Fax +1 512 672 8442 +27 21 863 1512
Email info@azoteq.com info@azoteq.com info@azoteq.com
Please visit www.azoteq.com for a list of distributors and worldwide representation.
The following patents relate to the device or usage of the device: US 6,249,089; US 6,952,084; US 6,984,900; US
8,395,395; US 8,531,120; US 8,659,306; US 9,209,803; US 9,360,510; US 9,496,793; US 9,709,614; US 9,948,297; EP
2,351,220; EP 2,559,164; EP 2,748,927; EP 2,846,465; HK 1,157,080; SA 2001/2151; SA 2006/05363; SA 2014/01541; SA
2017/02224;
AirButton®, Azoteq®, Crystal Driver, IQ Switch®, ProxSense®, ProxFusion®, LightSense™, SwipeSwitch™, and the
logo are trademarks of Azoteq.

The information in this Datasheet is believed to be accurate at the time of publication. Azoteq uses reasonable effort to maintain the information up-to-date and accurate, but does not warrant
the accuracy, completeness or reliability of the information contained herein. All content and information are provided on an “as is” basis only, without any representations or warranties, express
or implied, of any kind, including representations about the suitability of these products or information for any purpose. Azoteq disclaims all warranties and conditions with regard to these
products and information, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party
intellectual property rights. Azoteq assumes no liability for any damages or injury arising from any use of the information or the product or caused by, without limitation, failure of performance,
error, omission, interruption, defect, delay in operation or transmission, even if Azoteq has been advised of the possibility of such damages. The applications mentioned herein are used solely
for the purpose of illustration and Azoteq makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for
application that may present a risk to human life due to malfunction or otherwise. Azoteq products are not authorized for use as critical components in life support devices or systems. No
licenses to patents are granted, implicitly, express or implied, by estoppel or otherwise, under any intellectual property rights. In the event that any of the abovementioned limitations or
exclusions does not apply, it is agreed that Azoteq’s total liability for all losses, damages and causes of action (in contract, tort (including without limitation, negligence) or otherwise) will not
exceed the amount already paid by the customer for the products. Azoteq reserves the right to alter its products, to make corrections, deletions, modifications, enhancements, improvements
and other changes to the content and information, its products, programs and services at any time or to move or discontinue any contents, products, programs or services without prior
notification. For the most up-to-date information and binding Terms and Conditions please refer to www.azoteq.com.
www.azoteq.com/ip
info@azoteq.com


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IQ Switch®

ProxSense® IQS333 Datasheet

• 7 Self or 9 Mutual Channel Capacitive Controller

• User selectable Proximity and Touch thresholds

• Fast I2C Interface

• 8 PWM LED/Output drivers (5mA source/10mA sink)

• White goods and appliances

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 1 of 52

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 2 of 52

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 3 of 52

Figure 4.1 IQS333 Pin out in QFN-32.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 4 of 52

Table 4.1 IQS333 QFN-32 Pin-outs.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 5 of 52

4.2 Reference Design

Figure 4.2 IQS333 Reference Design (Projected capacitive sensing).

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 6 of 52

4.2.2 Projected Electrodes

Up to 8cm. Suggested line thickness: Tx = 1mm; Rx = 0.8mm

Figure 4.3 Projected-Capacitive Wheel, Slider and Button layout guidelines.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 7 of 52

4.2.3 Example Routing

Figure 4.4 Example routing of a projected slider. GND on

Figure 4.5 IQS333 Self Capacitive Reference Design.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 8 of 52

4.2.5 Self Electrode Layouts

Figure 4.6 Self-Capacitive Wheel, Slider and Button layout guidelines.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 9 of 52

4.3 Power Supply and PCB Layout

4.4 Design Rules for Harsh EMC Environments

➢ Applicable application notes: AZD013, AZD015, AZD051, and AZD052.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 10 of 52

5 User Configurable Options

5.1 Self and Projected Modes

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 11 of 52

Figure 5.2 IQS333 Channel mapping in Self mode.

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 12 of 52

5.4 Touch Thresholds 5.8 Halt times

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 14 of 52

Figure 5.3 IQS333 Charge Cycle Timing in Low Power Mode.

Scan Period1 LP register setting x 16 ms

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 15 of 52

5.10.2 Turbo Mode 5.12 Base Value

6.1 Charge Transfer Concept 6.2 Rate of Charge Cycles

windows will always be after CH0 has

CH0 CH1 CH2 CHx CH0 CH1

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 19 of 52

6.2.2 Low Power rate • Charge Transfer Speed: Increasing

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 20 of 52

Note that a proximity condition will be 𝑇𝐴𝑅𝐺𝐸𝑇

Copyright © Azoteq (Pty) Ltd 2018. IQS333 Datasheet Page 22 of 52

MSB 1 1 0 0 1 0 0 R/W LSB

I2C Group Sub- addresses

Figure 7.1 IQS333 Control Byte.

S ACK ACK NACK S

Figure 7.2 Current Address Read.

S Adr + WRITE ACK ACK S Adr + READ ACK NACK S