Simplification of Boolean Functions Using K-Map Method

Name: Atienza, Raymond Angelo M.
Date Performed: 01/12/21

Alaan, Angelica B.
Monteiro, Franchesca Date Submitted: 01/16/21
Course: COE 3-1
Experiment No. 3
SIMPLIFICATION OF BOOLEAN FUNCTIONS USING K-MAP

METHOD
I. OBJECTIVE
1. To use Karnaugh map to simplify Boolean expressions.
2. To implement logic circuits using logic gates.
II. MATERIALS
− Logic gates IC’s
− Breadboard
− Connecting wires
− Power Supply
− LED’s
III. THEORY
Karnaugh maps or K-maps for short, provide another means of simplifying and
optimizing logical expressions. This is a graphical technique that utilizes a sum of product
(SOP) form. SOP forms combine terms that have been ANDed together that then get ORed
together. This format lends itself to the use of De Morgan's law which allows the final result
to be built with only NAND gates. The K-map is best used with logical functions with four or
less input variables. One of the advantages of using K-maps for reduction is that it is easier to
see when a circuit has been fully simplified. Another advantage is that using K-maps leads to
a more structured process for minimization.
In order to use a K-map, the truth table for a logical expression is transferred to a K-
map grid. The grid for two, three, and four input expressions are provided in the tables below.
Each cell corresponds to one row in a truth table or one given state in the logical expression.
The order of the items in the grid is not random at all; they are set so that any adjacent cell
differs in value by the change in only one variable. Because of this, items can be grouped
together easily in rectangular blocks of two, four, and eight to find the minimal number of
groupings that can cover the entire expression.
Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

IV. PROCEDURE
1. BCD invalid code detector
BCD is a 4-bit binary code representing the decimal numbers 0 through 9. The binary
numbers 1010 through 1111 are not used in BCD.
a) Construct a truth table containing all possible inputs and desired output. Assume that the
desired output for a valid code is a 1, and for an invalid code is 0. Complete the truth table
as shown in Table 3.1. A is the most significant bit, and D is the least significant bit.
Table 3.1
A B C D X
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0

b) Draw the Karnaugh map, and write the simplified Boolean expression for the valid
codes as sum of products.
c) Draw the circuit for the above simplified Boolean expression and implement using the
Multisim.

2. Boolean Functions (1)
a. Simplify the following two Boolean functions by means of Karnaugh maps.

F1 (A, B, C, D) = Σm (0,1,4,5,8,9,10,12,13)
F2 (A, B, C, D)= Σm (3,5,7,8,10,11,13,15)

b. Implement and draw the logic diagrams for outputs F1 and F2 in terms of the inputs A,
B, C, and D.

c. Connect the circuit and verify it’s operation by preparing a truth table for F1 and F2
similar to Table 3.1.
Verification of values (F1)

A B C D F1 F2
0 0 0 0 1 0
0 0 0 1 1 0
0 0 1 0 0 0
0 0 1 1 0 1
0 1 0 0 1 0
0 1 0 1 1 1
0 1 1 0 0 0
0 1 1 1 0 1
1 0 0 0 1 1
1 0 0 1 1 0
1 0 1 0 1 1
1 0 1 1 0 1
1 1 0 0 1 0
1 1 0 1 1 1
1 1 1 0 0 0
1 1 1 1 0 1

Verification of values F2
AB'D' + BD + CD

3. Boolean Functions (2)
a. Derive a truth table for the following Boolean Functions.

F=A’D+B’D+BC+AB’D
A B C D F F’
0 0 0 0 0 1
0 0 0 1 1 0
0 0 1 0 0 1
0 0 1 1 1 0
0 1 0 0 0 1
0 1 0 1 1 0
0 1 1 0 1 0
0 1 1 1 1 0
1 0 0 0 0 1
1 0 0 1 1 0
1 0 1 0 0 1
1 0 1 1 1 0
1 1 0 0 0 1
1 1 0 1 0 1
1 1 1 0 1 0
1 1 1 1 1 0
b. Draw a Karnaugh map. Combine all the 1’s to obtain the simplified function for F.
Combine all the 0’s to obtain the simplified function for F’.
SOP= A’D + BC + B'D

POS = (A+D') (B'+C') (B+D')

c. Draw both circuits and implement using the multisim
POS = (A+D') (B'+C') (B+D')
V. DISCUSSION QUESTIONS

Verification of values

Verification of values POS = (B'+C')(A+D')(B+D')

V. DISCUSSIONS
1. Use a Karnaugh map to find the minimum (SOP) form for the expression:
F = A’B’C’D’ + A’B’CD’ + AB’C’D’ + AB’CD’
2. Use a Karnaugh map to find the minimum (SOP) & (POS) form for the expression:
F = A’B’C’D’ + A’B’C’D + A’B’CD + A’BC’D’ + A’BC’D + A’BCD +
ABC’D’ + ABC’D + ABCD

VI. CONCLUSION
After analyzing the structure of Kmaps, we came to the conclusion that the Kmap
Simplification process is an effective reduction method in logical terms containing three
to six input variables . Multisim KMap method simplifies circuit creation and design. It
provides a simple graphical way to simplify Boolean expressions.

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Name: Atienza, Raymond Angelo M.

Date Performed: 01/12/21

Course: COE 3-1

SIMPLIFICATION OF BOOLEAN FUNCTIONS USING K-MAP

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

1. BCD invalid code detector

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

a. Simplify the following two Boolean functions by means of Karnaugh maps.

F2 (A, B, C, D)= Σm (3,5,7,8,10,11,13,15)

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Verification of values (F1)

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

a. Derive a truth table for the following Boolean Functions.

SOP= A’D + BC + B'D

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

SOP= A’D + BC + B'D

POS = (A+D') (B'+C') (B+D')

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

Engr. Pablo B. Asi Engr. Leni A. Bulan Engr. Liza R. Maderazo

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