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DLD HW

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DLD Homework 2

Term I – 2023
Student 1’s Name: Nguyễn Trọng Nguyên Student 1’s code: ITITIU21263
Student 2’s Name: Lê Hoài Bảo Student 2’s code: ITCSIU22259

Please attach this page to the front of your work. Show your work for each problem.

1. Draw the output waveform for the OR gate.

Change the OR gate to a NAND gate. Draw the output waveform.


2. Write the Boolean expression for output x in the following figure. Determine the value of x for
all possible input conditions and list the values in a truth table.

a.
X = 𝐴̅𝐵̅ 𝐶̅ + 𝐴𝐵̅ 𝐶̅ + 𝐴̅𝐵̅ 𝐷
= 𝐵̅ 𝐶̅ (𝐴̅ + 𝐴) + 𝐴̅𝐵̅ 𝐷
= 𝐵̅ 𝐶̅ + 𝐴̅𝐵̅ 𝐷
Truth Table:
A B C D X
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0

b.

3. For each of the following expressions, construct the corresponding logic circuit, using AND and
OR gates and INVERTERs.
a. 𝑥 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴𝐵(𝐶 + 𝐷)
̅̅̅̅̅̅̅̅̅
b. 𝑦 = (𝑀 + 𝑁 + 𝑃̅ 𝑄)

c. 𝑧 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴 + 𝐵 + 𝐶̅ 𝐷 𝐸̅ + 𝐵𝐶̅ 𝐷
4. Simplify the following expression using Boolean theorems
a. The output of Figure 2b
b. y = (𝑀 + 𝑁)(𝑀 ̅ + 𝑃)(𝑁 ̅ + 𝑃̅)
= (M+N)(M'+P)N' + (M+N)(M'+P)P'
= (MM' + MN + P(M'+P))N' + (MM' + MN + P(M'+P))P'
= 0 + MN' + PN' + 0 + 0 + MP'
= MN' + PN' + MP'
= N'(M+P) + MP'
= N'M + N'P + MP'
c. 𝑧 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴 + 𝐵 + 𝐶̅ 𝐷𝐸̅ + 𝐵𝐶̅ 𝐷
= A̅B̅CDE + BC̅D
= A̅B̅CDE + BCD̅ + BC̅D
= B̅C(A̅DE + D̅ + C̅D)
5. Implement y = ABCD using only two-input NAND gates.
Truth table:
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

6. Convert the circuit of Figure 2a to one using only NOR gates. Then write the output expression
for the new circuit, simplify it using DeMorgan’s theorems, and compare it with the expression
for the original circuit.

̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑋 = ̅̅̅̅̅̅̅̅
𝐴̅𝐵̅ 𝐶̅ ∙ ̅̅̅̅̅̅̅̅
𝐴𝐵̅ 𝐶̅ ∙ ̅̅̅̅̅̅
𝐴̅𝐵̅ 𝐷
̅̅̅̅̅̅
𝑋 = 𝐴̅𝐵̅ 𝐶̅ + ̿̿̿̿̿̿
𝐴𝐵̅ 𝐶̅ + ̿̿̿̿̿̿
𝐴̅𝐵̅ 𝐷
𝑋 = 𝐴̅𝐵̅ 𝐶̅ + 𝐴𝐵̅ 𝐶̅ + 𝐴̅𝐵̅ 𝐷
Comparison: output expression for new circuit is equals to output expression for the original circuit.
7. The circuit of Figure 2b is supposed to be a simple digital combination lock whose output will
generate an active-LOW signal for only one combination of inputs.
a. Modify the circuit diagram so that it represents more effectively the circuit operation.
b. Use the new circuit diagram to determine the input combination that will activate the
output.
𝑋=𝐴 ̿̿̿̿̿̿̿̿
+𝐵+𝐵 ̿̿̿̿̿̿̿̿
+ 𝐶̅
𝑋 = 𝐴 + 𝐵 + 𝐵 + 𝐶̅ = 𝐴 + 𝐵 + 𝐶̅
8. The following figure shows an application of logic gates that simulates a two-way switch like the
ones used in our homes to turn a light on or off from two different switches. Here the light is an
LED that will be ON (conducting) when the NOR gate output is LOW. Note that this output is
labeled LIGHT to indicate that it is active-LOW. Determine the input conditions needed to turn
on the LED. Then verify that the circuit operates as a two-way switch using switches A and B.

A B A.B A’.B’ Light


0 0 0 1 0
0 1 0 0 1
1 0 0 0 1
1 1 1 0 0
The LED will be on, when A = 0, B =1and when A = 1, B = 0.
Verification of a circuit operating like a two-way switch
Case-1: When A = 0, B =1 => The LED is on.
We can make it off by making A = 1.
Case-2: When A = 1, B =0 => The LED is on.
We can make it off by making B = 1.
We are able to control the ON and OFF operations of the LED using switches A and B.
So, we can say that circuits operate like a two-way switch.

9. Simplify the following expression using Boolean algebra.


a. 𝑥 = 𝐴̅𝐵̅ 𝐶̅ + 𝐴̅𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵̅ 𝐶̅ + 𝐴𝐵̅ 𝐶
= 𝐵̅ 𝐶̅ (𝐴̅ + 𝐴) + 𝐴𝐶(𝐵 + 𝐵̅ ) + 𝐴𝐵𝐶
= 𝐵̅ 𝐶̅ + 𝐴𝐶 + 𝐴𝐵𝐶
= 𝐵̅ 𝐶̅ + 𝐴𝐶𝐵
b. 𝑦 = (𝐶 ̅̅̅̅̅̅̅̅
+ 𝐷) + 𝐴̅𝐶 𝐷
̅ + 𝐴𝐵̅ 𝐶̅ + 𝐴̅𝐵̅ 𝐶𝐷 + 𝐴𝐶𝐷
̅
= 𝐶̅ 𝐷
̅ + 𝐴̅ + 𝐶̅ + 𝐷 ̅ + 𝐴̅ + 𝐵̅ + 𝐶̅ + 𝐴̅ + 𝐵̅ + 𝐶 + 𝐷 + 𝐴 + 𝐶 + 𝐷
̅
= 𝐴̅ + 𝐵̅ + 𝐶̅ + 𝐷
̅ + 𝐴 + 𝐵̅ + 𝐶 + 𝐷
c. 𝑧 = (𝐵 + 𝐶̅ )(𝐵̅ + 𝐶) + ̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴̅ + 𝐵 + 𝐶̅
= 𝐵𝐶̅ + 𝐵̅ 𝐶 + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴̅ + 𝐵 + 𝐶̅ )
= 𝐵𝐶̅ + 𝐵̅ 𝐶 + 𝐴̅𝐵̅ 𝐶̅

10. Design the logic circuit corresponding to the truth table and then implement the circuit using all
NAND gates.

𝑋 = 𝐴̅𝐵̅ 𝐶̅ + 𝐴̅𝐵𝐶̅ + 𝐴̅𝐵𝐶 + 𝐴𝐵̅ 𝐶̅ + 𝐴𝐵𝐶


= 𝐵̅ 𝐶̅ (𝐴̅ + 𝐴) + 𝐴̅𝐵(𝐶̅ + 𝐶) + 𝐴𝐵𝐶
= 𝐵̅ 𝐶̅ (1) + 𝐴̅𝐵(1) + 𝐴𝐵𝐶
= 𝐵̅ 𝐶̅ + 𝐴̅𝐵 + 𝐴𝐵𝐶

11. Starting with the truth table in Problem 10, use a K map to find the simplest SOP equation.
Using K-map:
𝑋 = ∏ 𝑀(1,5,6)
12. A four-bit binary number is represented as A3A2A1A0, where A3, A2, A1, and A0 represent the
individual bits and A0 is equal to the LSB. Design a logic circuit that will produce a HIGH output
whenever the binary number is greater than 0010 and less than 1010.
Obtain the output expression using a K map.
- Output F is 1 when: 0010 < the binary word < 1000.
- Truth table
A3 A2 A1 A0 F
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
 𝐹 = ∑ 𝑚(3, 4,5,6,7)
- Using K-map:
 F = ̅̅̅
𝐴3 𝐴2 + ̅̅̅
𝐴3 𝐴1 𝐴0

13. The following figure shows a BCD counter that produces a four-bit output representing the BCD
code for the number of pulses that have been applied to the counter input. For example, after four
pulses have occurred, the counter outputs are DCBA = 01002 = 410. The counter resets to 0000 on
the 10th pulse and starts counting over again. In other words, the DCBA outputs will never
represent a number greater than 10012 = 910.
a. Design the logic circuit that produces a HIGH output whenever the count is 2, 3, or 9. Use
K mapping and take advantage of the don’t-care conditions.
b. Repeat for x = 1 when DCBA = 3, 4, 6, 8
Truth Table:
D C B A X
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 X
1 0 1 1 X
1 1 0 0 X
1 1 0 1 X
1 1 1 0 X
1 1 1 1 X

Using K-Map:
DC\BA 00 01 11 10

00 0 0 1 1

01 0 0 0 0

11 X X X X

10 0 1 X X

X = DA + 𝐶̅ 𝐵
Z = 0 + 𝐴̅𝐵̅ 𝐶 + 𝐴̅𝐵𝐶̅ + 𝐴𝐵̅ 𝐶̅ + 𝐴𝐵𝐶
= 𝐶̅ (𝐴̅𝐵 + 𝐴𝐵̅ ) + 𝐶(𝐴𝐵 + 𝐴̅𝐵̅ )
= 𝐶̅ (𝐴 ⊕ 𝐵) + 𝐶(𝐴 ̅̅̅̅̅̅̅̅
⊕ 𝐵)
= A⊕B⊕C

14. A BCD code is being transmitted to a remote receiver. The bits are A3, A2, A1, and A0, with A3
as the MSB. The receiver circuitry includes a BCD error detector circuit that examines the
received code to see if it is a legal BCD code (i.e., ≤ 1001). Design this circuit to produce a HIGH
for any error condition.
Truth Table:
A3 A2 A1 A0 Z
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
Using K-map:
 Z = 𝐴4 𝐴2 + 𝐴4 𝐴3

15. Design a logic circuit whose output is HIGH whenever A and B are both HIGH as long as C and
D are either LOW or both HIGH. Try to do this without using a truth table. Then check your result
by constructing a truth table from your circuit to see if it agrees with the problem statement.
- There is only 2 possibilities where A=1 & B=1 when C=0,D=0 OR C=1,D=1. They are:
ABCD
1100
1111
all other cases it will be 0.
- Truth table:
A B C D Z
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

K-map:

From K-map, we have: Z=AB(C'D'+CD)


16. Design a logic circuit that will allow input signal A to pass through to the output only when control
input B is LOW while control input C is HIGH; otherwise, the output is LOW.

A=1 only when B=0 AND C=1

A B C OUTPUT(F)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0

From above truth table: F=A'B'C+AB'C


17. Design a logic circuit that controls the passage of a signal A according to the following
requirements:
a. Output X will equal A when control inputs B and C are the same.
b. X will remain HIGH when B and C are different.

Truth Table

A B C Y
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

X(A, B, C) = ∑ 𝑚(1,2,4,5,6,7)

X = A + 𝐵̅𝐶 + 𝐶̅ 𝐵
= A+ B⊕C
a. In case B=C: P= B⊕C = 0 and X=A+0=A
b. In case B≠C: P= B⊕C = 1 and X=A+1=1

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