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Lebanese University Date: February 2023 Semester: 2

ISSAE - Cnam Lebanon Duration: 120 minutes Year: 2022-2023
Lebanon Center associated with Cnam Paris Topic coordinated by: Rachid Aoun

Exam language: French

EU Code: UTC502
This subject contains: 6 pages
Course title: Fundamentals of Operating Systems

Type of exam : Semester Partiel Final Catch-up

Annual E1 E'1 E2 E'2

Authorized documents All None Other specify ………………………………………….)

Special instructions: All exercises are compulsory

Calculator : None Programmable Not programmable

Centers concerned Beirut Baalbeck Baaklin Bickfaya Nahr Ibrahim Chtoura Tripoli

Exercise 1 Question Scale Duration (minutes) 15

- 2.5
To 3 18
2
b 1 6

To 2 12
3
b 2 12

To 1.5 9

b 0.5 3
4
vs 0.5 3

d 0.5 3

To 0.5 3

5 b 1.5 9

vs 0.5 3

6 - 22 12

7 - 12

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EXERCISE 1 – Main memory management (2.5 marks)

Consider a system that uses allocation by variable partitions. We consider at time t the
following state of the central memory. (The gray partitions are free partitions):

Use the Best Fit choice in order to represent the evolution of the central memory according
to the arrival of the following successive events:
ÿ Arrival of program F (8 K) ÿ
Departure of program C ÿ Arrival of
program G (20k) ÿ Departure of
program E ÿ Arrival of program H
(12k)
EXERCISE 2 – Scheduling of processes (4 dots)

That is 4 processes P1, P2, P3 and P4 using independent input/output units.

P1 P2 P3 P4
Calculation 2 ms Calculation 2 ms Calculation 2 ms Calculation 6 ms
I/O 6ms I/O 6ms I/O 8ms I/O 2ms
Calculation 2 ms Calculation 6 ms Calculation 4 ms Calculation 4ms
I/O 4ms I/O 2ms I/O 6ms I/O 1ms
Calculation 4ms Calculation 1 ms Calculation 1 ms
I/O 1ms I/O 1ms I/O 2ms

a) On the chronogram below represent the evolution of these 4 processes, while

indicating their ready, blocked and elected states, in each of the following
algorithms:
• By preemptive priority (with priority (p2) > priority (p3) > priority (p1) >
priority (p4))
• By turnstile initial order p1, p2, p3 then p4 (with a quantum Q=2ms).
The process leaving the elected state places itself in the queue at the end of
the list.
b) In each of the algorithms, calculate the average waiting time of each
process.

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Preemptive
Process P1
Elected

Ready

Blocked
P2 process
Elected

Ready

Blocked
P3 process
Elected

Ready

Blocked
P4 process
Elected

Ready

Blocked

Turnstile
Process P1
Elected

Ready

Blocked
P2 process
Elected

Ready

Blocked
P3 process
Elected

Ready

Blocked
P4 process
Elected

Ready

Blocked

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EXERCISE 3: Segmentation and pagination (4 dots)

We consider a memory for which the central memory cells are 2 KB.
The main memory has a total of 30 spaces numbered from 1 to 30 for the user space.
In this context, we consider four processes A, B, C and D.
Process A: its address space is segmented and paginated composed of three
segments AS1, AS2 and AS3, each divided into two pages.
Process B: its address space is made up of 2 segments BS1 and BS2, one made up
of one page and the second made up of three pages.
Process C: its address space is made up of a CS1 segment of 2 pages.
Process D: its address space is made up of three segments DS1, DS2 and DS3.
DS1 is made up of two pages, DS2 and DS3 are made up of three pages each.
For process A, only page 1 of segment AS1, pages 1 and 2 of segment AS2 are
loaded in central memory respectively in boxes 2, 8, 12.

For process B, page 1 of segment BS1 and page 1 and 3 of BS2 are loaded into
central memory in boxes 5, 6, 14 respectively.
For process C, only page 2 of segment CS1 is loaded into central memory in box 18.

For process D, page 1 of segment DS1, pages 2 and 3 of segment DS2 are loaded in
boxes 9, 10 and 17.
a) Represent on a drawing the structures allocated for this type of memory
allocation and the central memory corresponding to the allocation described. b)
The 2 processes A and B are described by a control block which also contains the
following information:

• For process A, ordinal counter CO = (AS2, P2, displacement 16), page

table address = 128; • For process B, ordinal counter CO = (BS2, P1,
displacement
512), page table address = 256;
ÿ Process A becomes active. What value does the PTBR register contain?
Which physical address corresponds to the virtual address of the executed
instruction?
ÿ Now process A is preempted and process B is elected. Briefly describe the
context switching operation that takes place, in particular by giving the new
values of the CO and PTBR registers.

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ÿ Each page table entry contains a bit field to specify the access rights
associated with a page. This field is made up of three bits x, r, w with the
following meaning:
x: 0 no execute permission on page, 1 execute permission granted r:
0 no read permission on page, 1 read permission granted w: 0 no
write permission on page, 1 write permission granted This "right" field
to the value 011 for page P1 of segment AS1 of process A. Process A
executes the instruction STORE R1 (AS1, P1, move 128) which performs
the writing of the contents of the processor register R1 to the address
(AS1, P1, displacement 128). What is going on ?

EXERCISE 4: Memory management (3 points)

Consider a paged segmentation memory system i.e. each segment is divided into
pages. This memory includes a large number of segments so that the segment
table must itself be paged. The logical address will have the following form :

Moving in the
Descriptor table page Moving in the
descriptor table Segment page number
number segment page
page

Segment number Movement in the segment The logical

address will be made up of several fields. Our memory has the following
characteristics:
• virtual addresses of length 36 bits, • page
size = 4 KB, • page table entry = 64 bits, (a
page table of a segment occupies at least
maximum one page),
• segment table entry = 128 bits, a) Give
the model of the logical address which corresponds to this system by specifying
the number of bits of each field of this address.
b) What is the maximum number of
segments. c) What is the maximum size of a
segment. d) What is the size of the entire memory.
EXERCISE 5: File Management System (2.5 marks)
A 16 GB Unix file, written in disk blocks of 4 Kbytes. Knowing that a block number
occupies 2 bytes.
a) What is the number of data blocks in the file? b)
What is the total number of blocks in the file (data and index) ?

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c) Give the total number of disk accesses necessary, with or without management of
caching mechanism.

EXERCISE 6: Synchronization between processes (2 points)

We consider three processes P1, P2, P3 whose characteristics are as follows

Priority (lower value = higher priority)

Arrival date
Execution time

P1 0 8 units 3

P2 3 7 units 1

P3 5 9 units 2

The three processes are scheduled according to a policy of preemptive priorities.

It is assumed that the 3 processes use the same critical resource R.
The process steps are as follows:

P1 P2 P3
Calculation during 1 unit Calculation during 1 unit Calculation during 4 units
Take(R) Take(R) Take(R)
Use R for 7 units Use R for 5 units Use R for 5 units
Render (R) Render (R) Render (R)
Calculation during 1 unit

Build the execution schedule of the three processes taking into account the sharing of the R resource.

Exercise 7: Deadlock (2 points)

On a computer, 8 processes ranging from P1 to P8 have access to 6 exclusive access resources ranging from
R1 to R6 as follows:

• Process P1 holds R2 and requests R3. • Process P2

holds R5 and requests R6. • Process P3 holds R4 and
requests R5. • Process P4 does not hold any resources
but requests R5. • Process P5 holds R1 and requests R6. • Process P6 holds R3
and requests R4 • Process P7 holds R6 • Process P8 does not hold any resources
but requests R3

After reading how resources are held or requested, is there a risk of deadlock? If so, what are the processes
involved?

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