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A 32 GHZ 20 Dbm-Transformer-Based Doherty Power Amplifier For Multi-Gb/S 5G Applications in 28 NM Bulk Cmos

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RSUIF-12

A 32 GHz 20 dBm-PSAT Transformer-based Doherty Power


Amplifier for multi-Gb/s 5G Applications in 28 nm Bulk CMOS
Paramartha Indirayanti1 , Patrick Reynaert 1 ,
1
KU Leuven ESAT/MICAS, Kasteelpark Arenberg 10, 3001 Heverlee, Belgium
paramartha.indirayanti, patrick.reynaert@esat.kuleuven.be

Abstract — This paper presents a 32 GHz IMAIN MAIN


M

transformer-based Doherty power amplifier (PA) in a MAIN (AB)


VDD
+

28 nm bulk CMOS process. There are two techniques PIN/2 2X vMAIN


-
proposed: linearization by means of AM-PM and AM-AM +
VOUT
IAUX (1- )M
compensation of the class AB and the class C amplifiers; and AUX
-
AUXILIARY (C) ZLoad
parallel-series-parallel power power combiner, wherein a VDD
+

current-mode parallel combiner complements the Doherty’s PIN/2 2X vAUX


-
voltage-mode series combiner to boost the output power.
(b) Simplified output stage schematic.
A saturated output power (PSAT ) of 19.8 dBm and an
OP1dB of 16 dBm are accomplished from 1V supply while vOUT
2
supporting 15 Gb/s 64-QAM amplification at 11.7 dBm
average output power. The chip achieves 21% PAE at PSAT vAUX vMAIN
and occupies 0.59 mm2 active area.
Index Terms — CMOS, transformer power combiner,
AM-PM distortion, 5G, Doherty power amplifier 1

2 (c) Output polar plot.


I. I NTRODUCTION
OP1dB OP1dB MAIN
The massive growth of wireless data traffic has paved Class AB Doherty
Pout [dBm]
(Class AB)
the way towards the 5G standard, targeting up to 10 Gb/s Features :
Gain
AUXILIARY compression
data rate[1]. To meet this requirement, mm-wave operation 1. Power savingà
(Class C)
2. Linearization:
is inevitable given the abundance of bandwidth in the - AM-PM compensation Gain expansion
- OP1dB extension
prospective bands of 27.5-29.5 GHz and 31.8-33.4 GHz
[2]. To pack more information, higher order QAM (a) Conceptualization and features. (d) Bias setting.

and OFDM-like modulation schemes are adopted. The


resulting high Peak-to-Average Power Ratio (PAPR) is Fig. 1. Transistor-level simulation results illustrating the
detrimental to the power amplifier (PA), forcing a back-off proposed transformer-based Doherty open loop linearization. The
component values are reported in Fig. 2.
level up to 8 dB to ensure linear amplification. This
motivates efficiency enhancement techniques at output
power back-off, particularly the Doherty PA.
amplifiers; and 2) parallel-series-parallel power combining.
The implementation of mm-wave Doherty PAs in
Thanks to the proposed techniques, the amplification of
CMOS faces several challenges: 1) in the conventional
a 64-QAM modulated signal greater than 10 Gb/s data
Doherty PA, the narrowband λ/4 transmission line phase
rate can be achieved with saturated output power (PSAT )
shifter and impedance inverter are not suitable for
towards 20 dBm.
multi-GHz-wide applications [3], [4]; 2) the gain of
class-C amplifier is too low, typically 10 dB lower than
that of class-AB. In this regard, adaptive biasing has been II. AM-PM COMPENSATION IN T RANSFORMER - BASED
proposed in the literature to bridge the gain gap[5], [6]. D OHERTY PA
Nevertheless, the bandwidth does not reach GHz-wide as
demonstrated in the modulated signal measurement results The proposed phase compensation is based on the
[6]. vector addition between the main and the auxiliary
To address the challenges above, this paper presents currents as shown in Fig.1, whose static vector
a 32 GHz transformer-based Doherty PA in a 28 nm representation are IM AIN (Pout )6 φM AIN (Pout ) and
bulk CMOS process. We propose two key techniques: 1) IAU X (Pout )6 φAU X (Pout ), respectively. For brevity, the
wideband linearization by AM-PM compensation of the power dependency is not explicitly written, simplifying
Doherty PA’s main (class AB) and auxiliary (class C) the notations to IM AIN 6 φM AIN and IAU X 6 φAU X .

978-1-5090-4626-3/17/$31.00 © 2017 IEEE 45 2017 IEEE Radio Frequency Integrated Circuits Symposium
- PA UNIT CELL
2
+

X
Iout- Iout+ 1.17 mm
VBIAS,MAIN CN CN
- +
1
VBIAS,DRIV MDRV L2 + 2x-MAIN Vin+ Vin-

MIN AB MOUT CN=37.4 fF M M


1 L1 + L2 WM=1.2 m x 36 x 3
- VDD - +

L1 AB MDRV
VBIAS,MAIN VDD
X= class of operation
720µm
``

- + L2 + -
``

G G
L2 AB 1 AUX
- + ``

IN
``

S VBIAS,AUX2 OUT S
DRIVER
VBIAS,DRIV MDRV L2 +2x AUX

1.53 mm
-

820µm
``

MOUT G MAIN
``

G MIN IN
L1 L2 C OUT
+ - VDD - +
VBIAS,AUX2 VDD
L1 AB MDRV L2 + -
+- MAIN
L2 C DRIVER
- +
PARALLEL SERIES PARALLEL
AUX
2
85 m VDD MAIN 10µm Cross section
VDD MAIN G S G
VDD AUX AP SUPPLY/PAD
VDD AUX
M9 PRIMARY
154 m
54 m
M8 SECONDARY
50 m +- +- +- +- -+ -+ -+ -+
154 m AUX MAIN MAIN AUX POWER COMBINER

Fig. 2. Schematic of the proposed 32 GHz transformer-based Fig. 3. Die photo of the transformer-based Doherty PA.
Doherty PA.

combiner, an extra current-based parallel power combiner


Hence, referring to the polar plot in Fig.1.c: is inserted, which sums up the output power of
(αIM AIN 6 φM AIN + (1 − α)IAU X 6 φAU X ) two identical unit cells at both main and auxiliary.
Vout = jωc M ZS Consequently, the output impedances seen at the drains
1 + ZLoad
are doubled while favorably matched with more efficient
(1)
smaller unit cells. The resulting high impedance nodes
where M , ωc , α, ZS , and ZLoad are the mutual inductance, obviate the need of large impedance transformations,
the carrier frequency, the main-to-total winding ratio, the which would otherwise be lossy and bandwidth limiting.
input impedance of the secondary windings (ZS = Z22 = Based on this scheme, the 50 Ω load (100 Ω seen at the
RS + jωc Ls ), and the load impedance, respectively. Given output parallel combiner) is transformed to approximately
6 Vin = 0◦ , the AM-PM distortion is then the normalized (35+j37.5) Ω at the output of each unit cell.
phase of the total output voltage, i.e. 6 Vout (Pout ). For the input and the interstage matching network,
By setting the gate bias according to the C-V profile in the output impedance of the preceding stage is typically
Fig.1.d, the phase compensation is achieved. The main’s higher than the input impedance of the subsequent stage.
gain compression is counteracted by the auxiliary’s gain Hence, series power dividers are employed together with
expansion. Although the peak power gain of the auxiliary differential series tuning inductors. Meander structures for
amplifier is much lower than the main, the rapid gain L1 and L2 are utilized to achieve high self inductance
expansion of the former sufficiently compensates the gain (135pH) with Q greater than 25 over 60 GHz bandwidth.
compression of the latter, thereby extending the output
1dB compression point (OP1dB). In this manner, the IV. M EASUREMENT RESULTS
linear power combining by transformers allows wide The 32 GHz transformer-based Doherty prototype is
bandwidth and favorable phase compensation compared to fabricated in a 28 nm bulk CMOS process. The die photo
the conventional transmission line-based Doherty [3]. is shown in Fig.3. The active area is only 0.59 mm2 out
of a total area of 1.79 mm2 . All of the measurements are
III. C IRCUIT I MPLEMENTATION performed with a pair of 150 µm-pitch G-S-G probes.
Fig.2 shows the schematic of the proposed The CW (continuous wave) measurements are shown
32 GHz transformer-based Doherty PA. A hierarchical at 32 GHz in Fig.4. The PSAT is 19.8 dBm and the
divide-and-conquer approach is adopted in the floorplan, OP1dB is 16 dBm from 1V supply. The PAE at PSAT is
splitting the PA into small common source-neutralized 21% whereas at OP1dB, the PAE is 12.8%. The linearized
unit cells in regular fashion. Doherty operation is demonstrated from the DC power
To achieve output power towards 20 dBm over 2 GHz profile and the AM-PM performance. The auxiliary bias
bandwidth, particularly in the orientation-constrained point is optimized such that the AM-PM distortion is only
28 nm CMOS technology, this work features a 1.8◦ as shown in Fig.4b, which is better than [3] and on
parallel-series-parallel power combining scheme at the par with the typical value of class A/AB amplifier designs,
output. At the input of the Doherty series transformer yet more power efficient.

46
25 30
20

OP1dB 10

S-parameter [dB]
0
20 20
-10
Gain [dB]

PAE [%]
S21
-20 S11
-30 S22
15 10 S12
-40
-50
-60
10 0 20 24 28 32 36 40
10 12 14 16 18 20
Pout [dBm] Frequency [GHz]
(a) Measured Gain and PAE vs Pout at 32 GHz. (a) Measured S-parameter over frequency.

22.5 22.5
PAE Psat
OP1dB
0 20 20

Output Power [dBm]


AM PM [ °]

PAE [%]
-2 17.5 17.5

-4 15 15

-6 12.5 12.5

-8 10 10
10 12 14 16 18 20 26 28 30 32 34
Pout [dBm] Frequency [GHz]

(b) Measured AM-PM distortion vs Pout at 32 GHz. (b) Measured CW frequency response.
Fig. 5. Frequency response.
180

160

140
achieved at an average power of 12.15 dBm. These results
120
are achieved thanks to the proposed AM-PM compensation
PDC [mW]

100
technique. The cancellation scheme is open-loop, resulting
80
PBuffer in wideband linear operation with a modulation bandwidth
60
PMain
40
measured up to 2.975 GHz.
PAux
20 Table I compares this work with other state-of-the-art
10 12 14 16 18 20
Pout [dBm] mm-wave PAs. Thanks to the proposed techniques, the
(c) Measured DC Power consumption vs Pout at 32 GHz. state-of-art output power and data rate at the 32 GHz
Fig. 4. Large signal CW measurement results at 32 GHz. band in 28 nm bulk CMOS technology are achieved.
The wideband operation demonstrates the effectiveness of
the proposed open-loop linearization technique, solving
the bandwidth limitation of the adaptive-bias assisted
Fig.5a reports the measured S-parameter, showing a
mm-wave Doherty PA.
peak gain of 22 dB at 32 GHz and a -3-dB bandwidth
of 6 GHz. The amplifier is unconditionally stable. Fig.5b V. C ONCLUSION
demonstrates less than 1 dB variation of OP1dB and PSAT A 32 GHz transformer-based Doherty PA is presented
between 28 GHz and 33 GHz. for 5G. The design is fabricated in a 28 nm bulk CMOS
Measurements with modulated signals are performed technology, occupying 0.59 mm2 active area. Two key
to demonstrate multi-Gb/s data rate amplification. The techniques are proposed: 1) wideband linearizaton by
modulated signal is generated by a Keysight M8195A means of main-auxiliary AM-PM compensation; and 2)
AWG and upconverted to 31 GHz by a Semic RFQ 7242 parallel-series-parallel power combining. Thanks to the
mixer with LO from Keysight E8257D. The PA output is proposed techniques, the transformer-based Doherty PA
directly digitized at mm-wave by a Keysight DSO7634A achieves 19.8 dBm PSAT and the state-of-art amplification
oscilloscope and demodulated by VSA software. Single of 64-QAM signal with a data rate of 15 Gb/s.
carrier 64-QAM and 16-QAM modulated signals are
generated with root-raised cosine filter α = 0.35. When ACKNOWLEDGMENT
a 15 Gb/s 64-QAM signal is applied, the resulting EVM This work is supported by the European Commission
is -25 dB at an average power of 11.7 dBm as shown in in the framework of the H2020-ICT-2014-2 project
Fig.6. With 10 Gb/s 16-QAM input, an EVM of -21.6 dB is Flex5Gware (Grant agreement no. 671563).

47
TABLE I
C OMPARISON OF STATE - OF - THE - ART CMOS MM - WAVE PA S .
Specification This Work [7] [8] [9] [6] [4]
CMOS technology 28nm bulk 28nm bulk 40nm bulk 40nm bulk 40nm bulk 45nm SOI
Supply voltage (V) 1.0 1.0 1.15 1.8 1.8 1.5 2.5 1.2
Frequency (GHz) 32 30 73 63 72 42
PSAT (dBm) 19.8 14 15.3 22.6 16.4 21 18
OP1dB (dBm) 16 13.2 14.3 18.9 13.9 19.2 13∗
Gain (dB) 22 15.7 16.3 25.3 22.4 18.5 8
P AEmax (%) 21 35.5 36.6 19.3 23 13.6 20
P AEOP 1dB (%) 12.8 34.3 35.8 12 18.9 12.4 21
Modulation scheme 64-QAM 64-QAM 64-QAM 64-QAM 64-QAM N.A.
OFDM
Max. data rate (Gb/s) 15 1.5 3.75 6 0.6 N.A.
EVM @max data rate (dB)∗∗ -25.0 -25# -24.2 -17.5# -25.6 N.A.
Mod BW (GHz) 2.975 0.250 0.625## 1## 0.1## N.A.
Pout,avg@mod (dBm) 11.7 4.2 5.3 12.2 7 15.9 N.A.
PAE@mod (%) 5.75 9 9.6 N.A. N.A. 7.2 N.A.
Active area (mm2 ) 0.59 0.16 0.29 0.0812 0.19 0.45
Topology Transformer- 2-stage CS 2-stage 3-stage Transfor- Active
based with Ls 4-way 2-way mer-based phase shift
Doherty degeneration neutralized class AB Doherty with Doherty
linearization cascode push-pull adaptive bias
∗ graphically estimated ∗∗ normalized w.r.t peak constellation power
# normalized w.r.t average power ## theoretically estimated from reported data rate

R EFERENCES
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[Gb/s]
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-25.0 -21.6
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July 2016.

Fig. 6. 64-QAM and 16-QAM modulated signal measurement


results at fc =31 GHz.

48

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