Description Features: The Future of Analog IC Technology
Description Features: The Future of Analog IC Technology
Description Features: The Future of Analog IC Technology
DESCRIPTION FEATURES
The MP2639A is a highly integrated, flexible, 4.0V to 5.75V Input Voltage Range
switch-mode, battery-charging management Charge 2-Cell Batteries with 5V Input
device for 2-cell series Li-ion and Li-polymer USB-Compliant Charger
batteries used in a wide range of portable Integrates Input Current-Based and Input
applications. Voltage-Based Power Management
The MP2639A is able to charge a 2-cell battery Functions
from a 5V adapter or USB input. The MP2639A Programmable Input Current and Input
can work in three modes: charge mode, Voltage Limit
discharge mode, and sleep mode. Up to 2.5A Programmable Charge Current
for 2-Cell Applications
In 2-cell applications, the 5V input charges the
8.4V Charge Voltage with 0.5% Accuracy
2-cell battery via the MP2639A operating in
Cell Balance with 200mA current
step-up mode. When the 5V input is absent, the
2-cell battery voltage is discharged to the 5V Up to 5.0A Programmable Discharge
output via the MP2639A working in step-down Current
mode. Negative Temperature Coefficient Pin for
Temperature Monitoring
For the charging function, the MP2639A detects No Load Shutdown and Push Button Turn-
the battery voltage automatically and charges On in Discharge Mode
the battery in three phases: trickle current, Programmable Timer Back-Up Protection
constant current, and constant voltage. Other Discharge Mode Load Trace Compensation
features include charge termination and auto- Thermal Regulation and Thermal Shutdown
recharge.
Internal Battery Reverse Leakage Blocking
To guarantee safe operation, the MP2639A Integrated Short-Circuit Protection (SCP) for
limits the die temperature to a preset value of Both Charge and Discharge Mode
120°C. Other safety features include input over- Four LED Battery Level and Status
voltage protection (OVP), battery over-voltage Indicators
protection (OVP), thermal shutdown, battery Available in a QFN-26 (4mmx4mm)
temperature monitoring, and a programmable Package
timer to prevent prolonged charging of a dead
battery. APPLICATIONS
The MP2639A is available in a QFN-26 Power Station Applications
(4mmx4mm) package. Power Bank Applications for Smart Phones,
Tablets, and Other Portable Devices
Mobile Internet Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS” and “The Future of Analog IC Technology” are
registered trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
2-Cell Application – Charge Mode
R2 R1 VL L1
FB Q1 BST SW LX QRB
VH
5V Input
VBATT
VL
CVH
MID Q2
Battery R3 CVL
ACOK
MID NTC VLIM
VNTC VCC
PB MP2639A
MODE OLIM
IB
ILIM
LED1
ISET
LED2
TMR
LED3
LED4
CTMR RISET RILIM ROLIM CVCC R4
CHGOK
AGND PGND
L
FB Q1 BST SW
X QRB
5V Output
VH
VBATT
CV
VL
H MID Q2
Battery R3 CVL
ACOK
MID NTC VLI
M
VNTC VCC
PB MP2639A OLI
MOD
E M
IB ILIM
LED
1
LED ISET
2
LED TMR
3
LED
4 CTMR RISET RIILIM ROLIM CVCC R4
CHGOK
AGND PGND
ORDERING INFORMATION
Part Number* Package Top Marking
MP2639AGR QFN-26 (4mmx4mm) See Below
* For Tape & Reel, add suffix –Z (e.g. MP2639AGR–Z)
TOP MARKING
PACKAGE REFERENCE
TOP VIEW
QFN-26 (4mmx4mm)
ELECTRICAL CHARACTERISTICS
VIN = VL = 5V, TA = 25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
DC/DC Parameter
LV side input over-voltage VL rising until the switching
5.75 V
threshold is off
VLOVP
LV side input over-voltage
200 mV
threshold hysteresis
MODE = high, VH = 7.6V 4.4 4.5 4.6 V
VCC LDO output VCC MODE = low, VH = 0V,
4.5 V
VL = 5V
VL rising 3.9
Input power good threshold VUVLO V
VL falling 3.6
High-side NMOS on TA = 25°C 19
Q1_ON mΩ
resistance TA = -40°C to +85°C 19 29
TA = 25°C 24
Low-side NMOS on resistance Q2_ON mΩ
TA = -40°C to +85°C 24 36
Reverse blocking NMOS on TA = 25°C 10
QBR_ON mΩ
resistance TA = -40°C to +125°C 10 15
Peak current limit for high-side
Step-down mode 6 8 10 A
NMOS
Peak current limit for low-side Step-up CC mode 7 9 A
NMOS Step-up TC mode 3 4 A
Operating frequency FSW 1300 kHz
Charging Operation
Battery float, charging is
Input quiescent current IIN 2.5 mA
enabled
Trickle charge threshold VBATT_TC VBATT rising 5.9 V
Trickle charge threshold
VBATT falling 240 mV
hysteresis
Trickle input current ITC 300 mA
RISET = 215kΩ 794 992 1191 mA
Constant fast charge current ICC
RISET = 86.6kΩ 2.2 2.46 2.7 A
As the percentage of ICC 2.5 10 17.5 %
Termination charge current IBF
If 10% * ICC < 167mA 38 150 mA
Input voltage clamp reference VIN_ClAMP 1.18 1.2 1.22 V
RILIM = 475kΩ 400 449 500 mA
Input current limit IIN_LMT RILIM = 261kΩ 720 817 900 mA
RILIM = 78.7kΩ 2.56 2.71 3 A
Termination charge voltage VBATT_FULL 8.35 8.38 8.41 V
Auto-recharge threshold 8.00 V
As the percentage of
Battery over-voltage threshold VBATT_OV 101 103.3 105 %
VBATT_FULL
NOTE:
5) Guaranteed by design.
CC Charge CV Charge
Steady State Steady State
VBATT = 6.6V, RILIM = 73.2kΩ, VBATT = 8.4V, RILIM = 73.2kΩ,
RISET = 86.6kΩ RISET = 86.6kΩ
CH3: VBATT CH3: VBATT
2V/div. 2V/div.
CH1: VSW CH2: IL
5V/div. 1A/div.
CH2: IL CH4: IBATT
1A/div. 500mA/div.
CH4: IBATT CH1: VSW
1A/div. 5V/div.
1µs/div. 1µs/div.
2s/div. 2s/div.
400µs/div. 400µs/div.
PIN FUNCTIONS
Pin # Name Type Description
1 VL Power Low-voltage terminal. Attach a 5V input to VL.
2 LX Power Connection node between the induction and internal block switch.
3 VH Power High-voltage terminal. Attach a 2-cell battery to VH.
4 SW Power Switching node.
5 PGND Power Power ground. Connect the exposed pad and GND to the same ground plane.
6 BST Power Bootstrap. Connect a 100 - 500nF BST capacitor between the BST and SW node.
-----
Push button input. Connect a push button from PB to AGND pulled up internally by
-----
----- a resistor. When PB is pushed for less than 2.5s, the discharge function is enabled
7 PB I -----
and latched when MODE is high. If discharging is enabled, push PB for more than
2.5s to disable the discharge. Otherwise, discharging remains, and LED1-4 are
enabled for 5s.
Charge or discharge mode selection. Pull MODE to low logic to make the
8 MODE I MP2639A work in charge mode. Pull MODE to logic high to make the MP2639A
work in discharge mode.
Internal circuit power supply. Bypass VCC to AGND with a 1μF ceramic
VCC I/O
9 capacitor. VCC cannot float or carry an external load higher than 50mA.
10 AGND I/O Analog ground.
Oscillator period timer. Connect a timing capacitor between TMR and AGND to
11 TMR I
set the oscillator period. Short TMR to AGND to disable the timer function.
Middle point of the 2-cell battery. MID is used to detect the voltage of each cell in
12 MID I
a 2-cell application. Connect MID to GND if it is not being used.
Fuel gauge indication. LED1 works with LED2, LED3, and LED4 to achieve the
13 LED1 O
voltage-based fuel gauge.
Fuel gauge indication. LED2 works with LED1, LED3, and LED4 to achieve the
14 LED2 O
voltage-based fuel gauge.
Fuel gauge indication. LED3 works with LED1, LED2, and LED4 to achieve the
15 LED3 O
voltage-based fuel gauge.
Fuel gauge indication. LED4 works with LED1, LED2, and LED3 to achieve the
16 LED4 O
voltage-based fuel gauge.
17 FB I Voltage feedback input in discharge mode.
18 VLIM I Input voltage limit setting in charge mode.
Pull-up bias voltage of both the NTC resistive dividers. VNTC is connected to
19 VNTC O VCC by an internal switch, which is turned on only in charge mode. Do not connect
any capacitors to VNTC.
20 NTC I Negative temperature coefficient (NTC) thermistor.
25
----------------
O Valid input supply indicator. ACOK is an open-drain output. ACOK is pulled low
ACOK
when the input voltage is recognized as a good source.
------------- -------------
-------------
26 O Charging completion indicator. CHG at logic low indicates charge mode. CHG
CHG
becomes an open drain once the charging has completed or is suspended.
BLOCK DIAGRAM
FLOW CHART
Yes
No
Yes
VH>VL-114mV?
Yes
COMP>V(ITC)?
Yes
Yes
When VCOOL < VNTC < VCOLD, the charging Input Voltage-Based and Input Current-
current is reduced to half of the programmed Based Power Management
charge current (see Figure 7). To meet the USB maximum current limit
Note: VNTC is the ratio of the voltage at NTC pin specification and avoid overloading the adapter,
and the voltage at VNTC pin. the MP2639A features both input current- and
input voltage-based power management by
Maximum Charge Current 1C monitoring the input current and input voltage
continuously. The total input current limit can be
0.5C programmed to prevent the input source from
overloading. When the input current reaches its
limit, the charge current tapers off to keep the
input current from increasing further. The input
Maximum Charge Voltage : 4.25V
(4.2V Typical)
current limit can be calculated with Equation (6):
4.15V Maximum
640(k)
4.10V Maximum IILIM (A)
3 RILIM (6)
If the preset input current limit is higher than the
Cold Cool Normal Warm Hot rating at the adapter, the back-up input voltage-
T1 T2 T3 T4 T5 based power management also works to
(0DegC) (10DegC) (45DegC) (50 DegC) (60DegC) prevent the input source from being overloaded.
When the input voltage falls below the input
Figure 7: JEITA-Compatible NTC Window
voltage limit due to an overload, the charge
VNTC Output current is reduced to keep the input voltage
VNTC is an input pin used to pull up both the from dropping further.
internal and external resistor dividers to the The input voltage clamp threshold can be
same point (see Figure 8). VNTC is connected programmed by VLIM. The internal reference of
to VCC via an internal switch. In charging mode, the input voltage loop is 1.2V, so the input
the switch is turned on, and VNTC is connected voltage clamp limit can be calculated with
to VCC. In discharge mode, the switch is off, Equation (7):
and VNTC is bridged off from VCC.
R3 R4
Charge/ VIN _ REG 1.2V
Discharge? R4 (7)
-----
DISCHARGE MODE 2) During t0, PB is pulled low, and the 2.5s
-----
Discharge Control timer is reset. PB is released to high before
When MODE is configured high, discharge the 2.5s timer expires, so a short push is
mode is enabled. However, discharging can detected. PBDIS remains high, and
only be enabled or disabled when the push discharging continues.
-----
button pin (PB ) is configured properly. -----
3) During t1, PB is pulled low again, and the
----- -----
A short push is defined as PB being pulled low 2.5s timer is reset. PB remains low until the
-----
for less than 2.5s. A long push is defined as PB 2.5s timer expires, so a long push is
being pulled low for longer than 2.5s. detected. PBDIS is pulled low, and
discharging ceased. Then PBDIS rises high
In the MP2639A, discharging is enabled only -----
once PB goes high.
when MODE is high and a short push is
detected. Discharging is disabled once MODE 4) At the moment of t2, another long push is
is pulled low or a long push is detected. detected. Discharging is still disabled.
Figure 9 shows the steps below. 5) At the moment of t3, a short push is
detected, and PDBIS remains high.
1) Before t0, MODE is high, and discharging
Discharging is enabled.
has already been enabled. PBDIS is the
enable signal of the discharging. If PBDIS is
high, discharging is enabled. If PBDIS is low,
discharging is disabled.
-----
Since the MP2639A is in sleep mode, if PB is Output Over-Current Limit (OCL)
pulled down to AGND for less than 2.5s (short The MP2639A features an output over-current
push), the IC enters discharge mode, and the limit (OCL), which can be programmed by the
LEDs display the battery capacity. After 5s, the resistor connected from OLIM to AGND. When
LED pins switch to open drain automatically to the output current flowing out from the VL node
minimize the battery quiescent current. For the exceeds the output over-current limit, the
LED to display the battery capacity, short push MP2639A regulates the duty cycle to maintain
-----
PB . the output current at this limit, so the output
voltage drops accordingly. The output current
No-Load Automatic Shutdown limit can be set using Equation (8):
In discharge mode, the MP2639A monitors the
640(k)
discharge current continuously. When the IOLIM (A)
discharge current (IBATT) is lower than 50mA, 3 ROLIM (8)
discharging can be shut down after 20s Output Short-Circuit Protection (SCP)
automatically (see Figure 10).
The MP2639A monitors the VL voltage
continuously. If VL drops below 3.9V, an event
EN DSG of the output short circuit is detected. The
MP2639A works in hiccup mode with 1.2ms
intervals, and the peak current limit of the high-
No side switch is cut by half (see Figure 11).
SS Done?
Yes
No
Yes No
Yes
No Load
Shutdown
No
-------------
2-Cell Discharge LED1 LED2 LED3 LED4 CHG
8V<VBATT On On On On Off
7.6V<VBATT<8V On On On Off Off
7.2V<VBATT<7.6V On On Off Off Off
6V<VBATT<7.2V On Off Off Off Off
Blinking
VBATT<6V Off Off Off Off
at 1Hz
During discharge mode, to minimize the power
consumption of the gauge indication, the
indication control is designed in the MP2639A
----- -----
achieved by PB . When PB is short pushed,
the gauge indication is enabled and disabled
after 5s automatically.
RLoad
R1
FB
R TRACE2
R2
R TRAC E = R TRAC E1 +R TRACE2
IOUT (Real Output Current)
Sensing
Gain K SNS
V IOUT (Final Voltage Signal) COMP
10M
10pF
Rx
Setting the Input Voltage Regulation in The IC implements internal line drop
Charge Mode compensation by feeding the output current to
the top feedback resistance (R1). The selection
In charge mode, connect a resistor divider from
of R1 must satisfy Equation (24):
VL to AGND tapped to VLIM to program the
input voltage regulation using Equation (20): RTRACE Rx
R1 (24)
R3 R4 KSNS
VINLMT 1.2V (V) (20)
R4 Where Rx is 150kΩ, KSNS is 0.3, and RTRACE is
With the given R4, R3 can be calculated with the line resistance of the trace from the output
Equation (21): of the IC to the load of the system.
VINLMT 1.2V
R3 R4(V) (21)
1.2V
IVH(MAX) is the battery current (2.5A), and η is the Suppose that the maximum VL ripple must not
efficiency. exceed 1% (e.g.: 0.5%). When VVH_MAX is 8.4V,
Under most application conditions, the charge VVL is 5V, L is 2.2µH, fSW is 1200kHz, and
current is limited at the input current limit, so ∆rVL_AX is 0.5%, then CVL is 3.2µF.
IVL(MAX) is 3A, typically.
One 4.7µF ceramic capacitor with X7R
In the worst-case scenario with a 8.4V battery dielectrics is sufficient.
voltage, a 30% inductor current ripple, and a Selecting the VH Capacitor (CVH)
typical input voltage (VVL = 5V), the inductance
is calculated as 1.9µH. The 2-cell battery is connected to the VH port,
which is the output of the boost during charge
When the MP2639A works in discharge mode mode and the input of the buck converter during
(as a buck converter), estimate the required discharge mode.
inductance with Equation (30):
In discharge mode, the capacitor CVH acts as
V VVL VVL the input capacitor of the buck converter. The
L VH (30)
IL _ MAX VVH fSW input current ripple can be calculated with
Equation (33):
Where VVH is the output voltage, VIN is the input
voltage, fSW is the switching frequency, and VVL (VVH _ MAX VVL )
IRMS _ MAX IVH _ MAX (33)
∆IL_MAX is the maximum peak-to-peak inductor VVH _ MAX
current (usually 30 - 40% of the discharge
current). In boost mode, the capacitor (CVH) is the output
capacitor of the boost converter. CVH keeps the
With a typical 8.4V input voltage (2-cell battery), VH ripple small (<0.5%) and ensures feedback
a 30% inductor current ripple at the max output loop stability. The VH current ripple is given by
current when VVL is set at the typical 5V value Equation (29).
(VVL = 5V, IVL(max) = 5A), and the inductance is
calculated as 1.2µH. When IVH_MAX is 2.0A, VVL is 5V, and VVH_MAX is
8.4V, the maximum ripple current is 1A. Select
For best results, use an inductor with an
the system capacitors base on the ripple-
inductance of 2.2µH with a DC current rating no
current temperature rise, not to exceed 10°C.
lower than the peak current of the MOSFET.
For best results, use X7R dielectric ceramic
For higher efficiency, minimize the inductor’s
capacitors with low ESR and small temperature
DC resistance.
coefficients. For most applications, place two
Selecting the VL Capacitor (CVL) 22µF capacitors and one 1µF capacitor as
Select the VL capacitor (CVL) based on the close to the IC as possible.
demand of the system current ripple. PCB Layout Guidelines
CVL is the input capacitor of the boost converter Efficient PCB layout is critical for meeting
during charge mode and the output capacitor of specified noise, efficiency, and stability
the buck converter during discharge mode. requirements. For best results, follow the
Calculate its values with Equation (31) and guidelines below.
Equation (32):
1. Route the power stage adjacent to their
VVL 1 VVL / VVH grounds.
rVL (31)
VVL 8 C VL fSW 2 L 2. Minimize the length of high-side switching
node (SW, inductor) trace that carries the
1 VVL / VVH _ MAX high current.
CVL (32)
8 rVL _ MAX fSW 2 L
3. Keep the switching node short and away
from all control signals, especially the
feedback network.
5V Output
VL L1
MID ACOK
MP2639A
AGND PGND
PACKAGE INFORMATION
QFN-26 (4mmx4mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
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