Data Communication and

Networks
for NTA UGC NET

(Computer Science)
 Data Communication and
Computer Network
• Error Detection and Correction
• Flow and Error Control;
• Sliding Window Protocol
Hop

In computer networking, a hop is one

portion of the path between source and
destination.
Data packets pass
through bridges, routers and gateways as
they travel between source and
destination.
Each time packets are passed to the
next network device, a hop occurs.
The hop count refers to the number of
intermediate devices through which data
must pass between source and
destination.
Error Detection and Correction

The extra bits in the code word provide

redundancy that, according to the coding
scheme used, will allow the destination
to use the decoding process to determine
if the communication medium introduced
errors and in some cases correct them so
that the data need not be retransmitted.
Error Detection and Correction

There are two basic strategies for dealing

with errors.
1.Error Detection and Correction Code
This include enough redundant
information along with each block of data
sent to enable the receiver to deduce
what the transmitted character must
have been.
2. Error-detecting Codes.
The other way is to include only enough
redundancy to allow the receiver to
deduce that error has occurred, but not
which error has occurred and the
receiver asks for a retransmission.
Types of errors

Single-bit Error

The term single-bit error means that

only one bit of given data unit (such as a
byte, character, or data unit) is changed
from 1 to 0 or from 0 to 1.
Types of errors
Single-bit Error
The term single-bit error means that
only one bit of given data unit (such as a
byte, character, or data unit) is changed
from 1 to 0 or from 0 to 1.
• Single bit errors are least likely type
of errors in serial data transmission.
• In parallel data transmission
possibility of single bit error is high.

• For example, if 16 wires are used to

send all 16 bits of a word at the same
time and one of the wires is noisy,
one bit is corrupted in each word.
Types of errors

Burst Error
The term burst error means that two or
more bits in the data unit have changed
from 0 to 1 or vice-versa.

Note that burst error doesn’t necessary

means that error occurs in consecutive
bits. The length of the burst error is
measured from the first corrupted bit to
the last corrupted bit. Some bits in
between may not be corrupted.
Types of errors

Burst Error
Burst errors are mostly likely to happen
in serial transmission. The duration of
the noise is normally longer than the
duration of a single bit, which means that
the noise affects data.
Error Detection codes

Basic approach used for error detection

is the use of redundancy, where
additional bits are added to facilitate
detection and correction of errors.
Popular techniques are:

• Simple Parity check

• Two-dimensional Parity check
• Checksum
• Cyclic redundancy check
Simple Parity Checking or One-
dimension Parity Check
In this technique, a redundant bit called
parity bit, is appended to every data unit
so that the number of 1s in the unit
(including the parity) becomes even.
Simple Parity Checking or One-
dimension Parity Check
Blocks of data from the source are
subjected to a check bit or Parity bit
generator form, where a parity of 1 is
added to the block if it contains an odd
number of 1’s (ON bits) and 0 is added if
it contains an even number of 1’s. At the
receiving end the parity bit is computed
from the received data bits and compared
with the received parity bit.
This scheme makes the total number of
1’s even, that is why it is called even
parity checking.
Simple Parity Checking or One-
dimension Parity Check
It is also possible to use odd-parity
checking, where the number of 1’s should
be odd.
Simple Parity Checking or One-
dimension Parity Check
A receiver that has knowledge of the code
word set can detect all single bit errors in
each code word.

However, if two errors occur in the code

word, it becomes another valid member
of the set and the decoder will see only
another valid code word and know
nothing of the error. Thus errors in more
than one bit cannot be detected.
In fact it can be shown that a single parity
check code can detect only odd number
of errors in a code word.
Simple Parity Checking or One-
dimension Parity Check
Q .1. Given code word 1110001010 is to be
transmitted with even parity check bit. The
encoded word to be transmitted for this
code is
UGCNET-June2013-III-55

A. 11100010101
B. 11100010100
C. 1110001010
D. 111000101
Two-dimension Parity Check
Performance can be improved by using
two-dimensional parity check, which
organizes the block of bits in the form of
a table.
Parity check bits are calculated for each
row, which is equivalent to a simple
parity check bit.
Parity check bits are also calculated for
all columns then both are sent along with
the data.
At the receiving end these are compared
with the parity bits calculated on the
received data.
Two-dimension Parity Check
A burst error of more than n bits is also
detected by 2-D Parity check with a high
probability.
There is, however, one pattern of error
that remains elusive. If two bits in one
data unit are damaged and two bits in
exactly same position in another data
unit are also damaged, the 2-D Parity
check checker will not detect an error.
For example, if two data units: 11001100
and 10101100. If first and second from
bits in each of them is changed, making
the data units as 00101110,and
01001110 ,the error cannot be detected
by 2-D Parity check.
Two-dimension Parity Check
A burst error of more than n bits is also
detected by 2-D Parity check with a high
probability.
There is, however, one pattern of error
that remains elusive. If two bits in one
data unit are damaged and two bits in
exactly same position in another data
unit are also damaged, the 2-D Parity
check checker will not detect an error.
For example, if two data units: 11001100
and 10101100. If first and second from
bits in each of them is changed, making
the data units as 00101110,and
01001110 ,the error cannot be detected
by 2-D Parity check.
Two-dimension Parity Check
Two-dimension Parity Check
Two-dimension Parity Check
Checksum
In checksum error detection scheme, the
data is divided into k segments each of m
bits.

In the sender’s end the segments are

added using 1’s complement arithmetic
to get the sum.
The sum is complemented to get the
checksum.
Checksum
At the receiver’s end, all received
segments are added using 1’s
complement arithmetic to get the sum.
The sum is complemented. If the result is
zero, the received data is accepted;
otherwise discarded.

The checksum detects all errors involving

an odd number of bits. It also detects
most errors involving even number of
bits.
Checksum
Cyclic Redundancy Checks (CRC)
This Cyclic Redundancy Check is the
most powerful and easy to implement
technique. Unlike checksum scheme,
which is based on addition, CRC is based
on binary division.

In CRC, a sequence of redundant bits,

called cyclic redundancy check bits, are
appended to the end of data unit so that
the resulting data unit becomes exactly
divisible .
Cyclic Redundancy Checks (CRC)
At the destination, the incoming data
unit is divided by the same number.

If at this step there is no remainder, the

data unit is assumed to be correct and is
therefore accepted.

A remainder indicates that the data unit

has been damaged in transit and
therefore must be rejected
Cyclic Redundancy Checks (CRC)
If a k bit message is to be transmitted,
the transmitter generates an r-bit
sequence, known as Frame Check
Sequence (FCS) so that the (k+r) bits are
actually being transmitted.

Now this r-bit FCS is generated by

dividing the original number, appended
by r zeros, by a predetermined number.
This number, which is (r+1) bit in length,
can also be considered as the coefficients
of a polynomial, called Generator
Polynomial.
The remainder of this division process
generates the r-bit FCS.
Cyclic Redundancy Checks (CRC)
On receiving the packet, the receiver
divides the (k+r) bit frame by the same
predetermined number and if it produces
no remainder, it can be assumed that no
error has occurred during the
transmission.
Cyclic Redundancy Checks (CRC)
Modulo-2 arithmetic is a binary addition
process without any carry over, which is
just the Exclusive-OR operation.

Consider the case where k=1101. Hence

we have to divide 1101000 (i.e. k
appended by 3 zeros) by 1011, which
produces the remainder r=001, so that
the bit frame (k+r) =1101001 is actually
being transmitted through the
communication channel.
Cyclic Redundancy Checks (CRC)
At the receiving end, if the received
number, i.e., 1101001 is divided by the
same generator polynomial 1011 to get
the remainder as 000, it can be assumed
that the data is free of errors.
Cyclic Redundancy Checks (CRC)

UGCNET-Sep2013-III-56
Cyclic Redundancy Checks (CRC)
CRC is a very effective error detection
technique.
: • CRC can detect all single-bit errors
• CRC can detect all double-bit errors
(three 1’s)
• CRC can detect any odd number of
errors (X+1)
• CRC can detect all burst errors of less
than the degree of the polynomial.
• CRC detects most of the larger burst
errors with a high probability.
Error Correcting Codes
Error Correction can be handled in two
ways.
• One is when an error is discovered;
the receiver can have the sender
retransmit the entire data unit. This
is known as backward error
correction.
• In the other, receiver can use an
error-correcting code, which
automatically corrects certain errors.
This is known as forward error
correction.
Single-bit error correction
Limitation:-

Error-correcting codes are more

sophisticated than error detecting codes
and require more redundant bits. The
number of bits required to correct
multiple-bit or burst error is so high that
in most of the cases it is inefficient to do
so. For this reason, most error correction
is limited to one, two or at the most
three-bit errors.
Single-bit error correction -Logic
To calculate the numbers of redundant
bits (r) required to correct d data bits,
(d+r) as the total number of bits, which
are to be transmitted; t
hen r must be able to indicate at least
d+r+1 different values. Of these, one
value means no error, and remaining d+r
values indicate error location of error in
each of d+r locations.
So, d+r+1 states must be distinguishable
by r bits, and r bits can indicates 2r states.

Hence, 2r must be greater than d+r+1.

2r >= d+r+1
Single-bit error correction
For example, if d is 7, then the smallest
value of r that satisfies the above relation
is 4. So the total bits, which are to be
transmitted is 11 bits (d+r = 7+4 =11).
Single-bit error correction
Basic approach for error detection by
using Hamming code is as follows:
• To each group of m information bits k
parity bits are added to form (m+k) bit
code .
• Location of each of the (m+k) digits is
assigned a decimal value.
• The k parity bits are placed in positions
1, 2, …, 2k-1 positions.–K parity checks
are performed on selected digits of each
code word.
• At the receiving end the parity bits are
recalculated. The decimal value of the k
parity bits provides the bit-position in
error, if any.
Single-bit error correction
 Data Link Control
For reliable and efficient data communication a great deal of coordination is necessary
between at least two machines. It is necessary to satisfy the following requirements:

• A fast sender should not overwhelm a slow receiver, which must perform a certain
amount of processing before passing the data on to the higher-level software.

• If error occur during transmission, it is necessary to devise mechanism to correct it .

The most important functions of Data Link layer to satisfy the above requirements are
error control and flow control. Collectively, these functions are known as data link
control.
 Data Link Control
For reliable and efficient data communication a great deal of coordination is necessary
between at least two machines. It is necessary to satisfy the following requirements:

• A fast sender should not overwhelm a slow receiver, which must perform a certain
amount of processing before passing the data on to the higher-level software.

• If error occur during transmission, it is necessary to devise mechanism to correct it .

The most important functions of Data Link layer to satisfy the above requirements are
error control and flow control. Collectively, these functions are known as data link
control.
 Flow Control
Flow control refers to the set of procedures used to restrict the amount of data the
transmitter can send before waiting for acknowledgment.

There are two methods developed for flow control

1.Stop-and-wait and
2.Sliding-window.
Stop-and-wait is also known as Request/reply sometimes. Request/reply (Stop-
and-wait) flow control requires each data packet to be acknowledged by the
remote host before the next packet is sent.

Sliding window algorithms, used by TCP, permit multiple data packets to be in

simultaneous transit, making more efficient use of network bandwidth .
Flow Control and Error Control
Flow Control is a technique so that transmitter and receiver with different speed
characteristics can communicate with each other.

Error Control involves both error detection and error correction .

When an error is detected, the receiver can have the specified frame retransmitted
by the sender. This process is commonly known as Automatic Repeat Request
(ARQ). There exist three popular ARQ techniques.
 Stop-and-Wait ARQ
In Stop-and-Wait ARQ, which is simplest among all protocols, the sender (say
station A) transmits a frame and then waits till it receives positive
acknowledgement (ACK) or negative acknowledgement (NACK) from the receiver
(say station B).

Station B sends an ACK if the frame is received correctly, otherwise it sends NACK.

Station A sends a new frame after receiving ACK; otherwise it retransmits the old
frame, if it receives a NACK.
 Go-back-N ARQ,
The most popular ARQ protocol is the go-back-N ARQ, where the sender sends the
frames continuously without waiting for acknowledgement.

That is why it is also called as continuous ARQ.

As the receiver receives the frames, it keeps on sending ACKs or a NACK, in case a
frame is incorrectly received.

When the sender receives a NACK, it retransmits the frame in error plus all the
succeeding frames , Hence, the name of the protocol is go-back-N ARQ.
 Go-back-N ARQ,
In case there is long delay before sending the NAK, the sender will resend the lost
frame after its timer times out.

If the ACK frame sent by the receiver is lost, the sender resends the frames after
its timer times out.
 Selective-Repetitive ARQ
The selective-repetitive ARQ scheme retransmits only those for which NAKs are
received or for which timer has expired.

This is the most efficient among the ARQ schemes, but the sender must be more
complex so that it can send out-of-order frames.

The receiver also must have storage space to store the post NAK frames and
processing power to reinsert frames in proper sequence