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This is the author's version which has not been fully edited and
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Received XX Month, XXXX; revised XX Month, XXXX; accepted XX Month, XXXX; Date of publication XX Month, XXXX; date of
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Digital Object Identifier 10.1109/OJPEL.2022.0817315

A Two-Stage DC-DC Isolated Converter

for Battery-Charging Applications
NICOLA ZANATTA 1 (Student Member, IEEE), TOMMASO CALDOGNETTO 1 (Senior
Member, IEEE), DAVIDE BIADENE 1 (Member, IEEE), GIORGIO SPIAZZI 2 (Member,
IEEE), AND PAOLO MATTAVELLI 1 (Fellow, IEEE)
1
Department of Management and Engineering, University of Padova, Vicenza, Italy
2
Department of Information Engineering, University of Padova, Padova, Italy
CORRESPONDING AUTHOR: NICOLA ZANATTA (e-mail: nicola.zanatta.2@phd.unipd.it).
This work has been created in the context of the PROGRESSUS project. This project has received funding from the Electronic Components
and Systems for European Leadership Joint Undertaking under grant agreement No 876868. This Joint Undertaking receives support from
the European Unions Horizon 2020 research and innovation program and Germany, Slovakia, Netherlands, Spain, Italy.

ABSTRACT This paper proposes and analyzes a two-stage dc-dc isolated converter for electric vehicle
charging applications, where high efficiency over a wide range of battery voltages is required. The proposed
conversion circuit comprises a first two-output isolation stage with CLLC resonant structure and a second
two-input buck regulator. The transformer of the first stage is designed such that its two output voltages
correspond, ideally, to the minimum and maximum expected voltage to be supplied to the battery. Then,
the second stage combines the voltages provided by the previous isolation stage to regulate the output
voltage of the whole converter. The first stage is always operated at resonance, with the only function
of providing isolation and fixed conversion ratios with minimum losses, whereas the second stage allows
output voltage regulation over a wide range of battery voltages. Overall, it is shown that the solution features
high conversion efficiency over a wide range of output voltages. This paper comprehensively describes
the solution, including modeling, analyses, design considerations for the main circuit components (e.g.,
magnetics, switches), and modulation choices. Experimental results are reported considering a converter
module prototype rated 10 kW, input voltage 800 V, and output range 250 V to 500 V, employing silicon-
carbide and gallium-nitride semiconductors.

INDEX TERMS Battery charger, CLLC, dc-dc converter, dc-transformer (DCX), fast-charging, gallium-
nitride, resonant LLC, post-regulator, silicon-carbide, soft-switching, two-input buck converter.

I. INTRODUCTION easily outperform those based on silicon (Si) in numerous ap-

Electric transportation is gaining ground in many countries plications, thanks to their higher voltage breakdown, higher
due to growing concerns about global greenhouse gas emis- switching speed and lower on-resistance. The design of EV
sions and fossil fuel supply and depletion. These concerns power electronics converters in an example of a modern
have lately propelled the exponential growth of the demand relevant application [4].
for electric vehicles (EVs) [1], [2]. Such a high demand com-
bined with the strive for longer ranges and reduced charging A. CHALLENGES
time is pushing newer generations of EVs that implement DC-DC converters with galvanic isolation are the beating
higher battery capacities and charging rates. Consequently, heart of an effective EV battery charging system [6]–[9].
new EV charging stations are needed to supply more power, Several topologies are highlighted in the literature for their
more quickly than ever before [3]–[5]. merits in terms of efficiency and power density, such as the
Moreover, new wide-bandgap (WBG) semiconductors are dual-active-bridge (DAB) and the resonant converter [5], [7],
setting unprecedented performance levels in terms of power [10]–[14]. The resonant LLC and CLLC converters are com-
density and efficiency. Current WBG devices based on sili- monly adopted in many applications for their simple struc-
con carbide (SiC) or gallium nitride (GaN) power switches ture and efficient power conversion. These converters present

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

the merit of an inherent zero-voltage switching (ZVS) and

zero-current switching (ZCS) operation for primary-side
and secondary-side switches, respectively [12], [15], [16].
In these topologies, output voltage regulation is normally
obtained through frequency modulation. However, perfor-
800V
mance significantly degrades at input or output voltages 500V
voltage
that do not allow near-resonance operation [7], [12], [17], depth of
discharge MV-AC
[18]. Conditions that impede near-resonance operation for 250V
classical LLC and CLLC converters are often encountered
in the considered application in Fig. 1, where battery state of FIGURE 1. EV-charging application.
charge variations due to typical mission profiles may bring
to wide ranges of operating voltages [2], [5], [7], [19], [20].
Table 1 summarizes some relevant converter structures for
EV fast-charging applications. For each approach, the table
B. LITERATURE OVERVIEW
includes the core topology and the related class (Cl.): Cl. 0
Numerous approaches and methods to overcome the lim-
represents classic topologies; Cl. 1 represents topologies with
itations of these frequency-modulated resonant converters
modifications in the primary or secondary-side structures;
are reported in the literature [12], [18], [21]. Herein are
Cl. 2 represents modifications in the resonant tank; Cl. 3
summarized the main relevant methods. Solutions include
represents topologies that adopt additional partial-power pro-
variants in the conversion circuits related to the primary-
cessing stages, and Cl. 4 represents multi-stage topologies.
side [22]–[24] or the secondary-side [25]–[29], the resonant
The table also reports, for each topology: the presence of an
tank [30], [30]–[32], the application of strategies like the
ac front-end (ac-FE) stage, the input voltage of the dc stage
partial-power processing [8], [12], [33]–[41], and the design
vIN and its output voltage vOU T , the rated power POU T ,
of structures using multiple stages of conversion [21], [42]–
the peak efficiency η max , and the number of active switches,
[44]. Converters that adopt reconfigurable structures as de-
diodes, transformers, and inductors used in the dc/dc stage,
scribed, for example, in [20], [22], [26], [28], can obtain
indicated by the symbols S, D, T, and L, respectively.
wide voltage gain, but achieving smooth transitions between
Noticeably, the relevant research on the topic focuses on
the different configurations may be difficult to cope with.
developing high-efficient dc-dc conversion solutions.
Solutions implementing partial-power processing strategies
show potential advantages to accommodate wide operating
voltage ranges and high efficiency, at the cost of a high C. PROPOSED SOLUTION
components number and complex design and modulation Based on the brief literature overview reported above, to
[33], [40]. improve the performance of the LLC resonant dc-dc con-
An effective method to overcome the limitations of the verter in a wide output-voltage range, a two-stage conversion
frequency-modulated LLC converter is to keep working structure in which the second stage performs the post-
the LLC stage at its optimal operating point (i.e., DCX regulation of the output voltage is considered, analyzed,
operation) [15], [16] and employ an additional conversion and experimentally evaluated in this paper. The proposed
stage to regulate the output voltage, which results in multi- structure is displayed in Fig. 2. The post-regulation stage
stage structures [42]–[46]. In these structures, the isolated is directly connected to intermediate dc-links (i.e., V1 and
DCX-LLC resonant converter, widely used in applications V2 ), supplied by an isolation stage based on a resonant
including power supply, energy storage, data centers, and LLC-like structure with two outputs. The principle of the
solid-state transformers, is often employed because it can proposed solution is to operate the first isolation stage at
interface with galvanic isolation two dc buses involving very maximum efficiency, namely, at resonance, and use the
limited power losses [15], [16]. These multi-stage topologies post-regulation stage to perform output voltage regulation,
are favorable to accommodate wide operating voltage ranges with minimum voltage stresses. The parallel structure of the
with very high efficiencies; however, more components are second stage and its operation with limited voltage stresses
required, which might reduce the overall power density. allow low conversion losses over the wide range of output
The integration of power switches in multi-stage structures voltages of the considered battery charging application. The
are studied in several paper to address these disadvantages high overall conversion efficiency over the wide range of
[21], [47]–[49]. The half-bridge LLC converter could be operating voltages is achieved at the cost of a higher number
integrated with a boost structure by sharing the switches of components. The solution is demonstrated with reference
and regulating the voltage via the duty cycle. Compared to a dc-dc conversion module rated 10 kW with a nominal
with two-stage topologies, these can reduce the number of input voltage of 800 V and output voltage ranging from
switching devices. However, using the boost stage for voltage 250 V to 500 V [5]. The input voltage is assumed to be
regulation and the related high conduction losses can affect provided by a front-end three-phase power-factor-correction
efficiency. stage. Noteworthy, the scaling of the conversion module

2 VOLUME ,

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Sa1 Sb1
B. OPERATING PRINCIPLE
twin-bus buck
DB1 The two-output LLC resonant converter is designed for
ir Lr N1 : N2 iLo Lo
Vg
is1 +
a constant voltage conversion ratio, independent from the
SoH
vi V1 vsw Vo actual load. In such an operating condition the LLC behaves
Sa2 Sb2 vC Co1
SoL
as two-output DCX converter and its voltage gains can be
Cr
DB2 defined as follows:
is2 V1 N2
G1 = = = n1
Co2
V2 Vg N1
(1)
V2 N3
: N3 G2 = = = n2
Vg N1
FIGURE 2. Proposed two-stage topology: two-output dc-transformer &
post-regulator. where N1 , N2 , and N3 are the number of turns of the three
windings of the transformer, as indicated in Fig. 2.
The two-input post-regulator, herein referred to as twin-
bus buck (TBB) converter, is highlighted in Fig. 2 while its
and/or the use of multiple modules connected in parallel main waveforms are displayed in Fig. 3. It is based on a two-
may be required for field use, as typically done in actual input buck topology [61], [62], designed to operate in quasi-
implementations. square wave, that is, with a peak-to-peak inductor current
This paper extends the preliminary results presented in ripple higher than twice the average load current. This allows
[50]. In addition to the extended literature review discussed zero-voltage turn-on of both the switches SoH and SoL . The
in this Sect. I, Sect. II includes details on the operating TBB is responsible of the output voltage regulation of the
principle of the converter, with the main relations governing whole converter. The output voltage Vo is a function of the
the design of the proposed solution now highlighted and dis- TBB input voltages V1 and V2 , with V1 > V2 , and the duty
cussed; Sect. III is dedicated to the design of the DCX stage, cycle d of the upper switch SoH :
and it reports further details on the designed transformer;
Sect. IV presents a comparison with other representative Vo = d V1 + (1 − d) V2 (2)
topologies, which are herein also compared in terms of Therefore, the voltage gain of the converter in Fig. 2 results:
losses, including now a loss breakdown analysis for each
Vo
of the solution; extended experimental results are reported G= = d n1 + (1 − d) n2 (3)
in Sect. V considering a converter module prototype rated Vg
10 kW. Finally, Sect. VI concludes the paper. For fixed input voltages V1 and V2 , the minimum and
maximum output voltages can be defined as:
Vomin = dmin V1 + (1 − dmin ) V2
(4)
Vomax = dmax V1 + (1 − dmax ) V2
II. STRUCTURE AND OPERATING PRINCIPLE
A. TWO-STAGE CONVERTER CONFIGURATION
Several configurations of two-stage dc-dc converters exploit- dTs (1 − d)Ts
ing a voltage post-regulator are described in the literature SoH SoL
[39], [59], [60]. As shown in Fig. 2, the proposed two-stage 0 Ts t
V2 vsw (t)
converter consists of a first isolation stage based on an LLC
V1
resonant converter, and a second post-regulator stage based
on a buck converter. Such a post-regulator is responsible of 0 Ts t
the output voltage regulation and it is supplied by means of ILomax
a high-efficiency two-output DCX converter, with secondary iLo (t)
Io
voltages V1 and V2 . From Fig. 2, it is clear that the voltage
stress of the post-regulator, namely, V1 − V2 , is lower that 0
ILomin
Ts t
the output voltage Vo , which consequently allows switching
devices with smaller on-resistance as well as lower switching
losses. iSoH (t)
Io
It is worth remarking that the topology where the two
DCX-LLC outputs are connected in series can also be 0 Ts t
iSoL (t)
considered. This variant will be considered in future inves-
tigations. Preliminary studies, shown as potential advantage
in the transformer design but as disadvantage the additional FIGURE 3. Main waveforms of TBB stage shown in Fig. 2. In order: gate
losses due to the output current passing trough both the two driver signals including dead times, switching node voltage of TBB, Lo
diodes-rectifier bridges. inductor current and SoH , SoL switch currents.

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

TABLE 1. Representative approaches for high-efficiency converters for EV-charging applications.

Cl. Ref. Topology ac-FE vIN vOU T Prated ηmax S/D/T/I∗ Peculiarities
0 [10] HB-CLLC no 500 V 200 - 420 V 1 kW 96.5% 4/0/1/2 Bidirectional operation, limited controllability un-
(0.6 kW, der wide vOU T .
300 V-out)
0 [17] LLC no 380 - 420 V 400 V 6.6 kW 98% (3 kW, 4/4/1/0 High η, wide variation of fsw , narrow vIN , fixed
390 V-in) vOU T , η drops far from resonance.
1 [26] FB/HB- no 400 V 100 - 400 V 2 kW 96.36% 6/4/1/0 Wide controllable vOU T , high η over a wide load
LLC + (0.5 kW, range.
VD 200 V-out)
3 [51] switched no 200 - 400 V 1200 V 4 kW 97.71% 22/0/0/6 Low volume, no galvanic isolation.
tank (4 kW,
350 V-in)
0 [52] phase- no 700 - 800 V 350 - 700 V 20 kW 98.9% 4/4/1/1 High η, hard switching operated.
shift FB (13 kW,
700 V-in,
686 V-out)
0 [53] LLC yes 7 kV 400 V 350 kW 98.6% 6/0/1/1 10 kV SiC devices, 4.16 kV ac grid input, limited
(350 kW, controllability under the wide vOU T .
400 V-out)
3 [38] CLLC + no 750 V 314 - 450 V 18 kW 98.8% 20/0/2/3 High η and power density.
buck (18 kW,
375 V-out)
1 [20] interleaved no 390 V 230 - 440 V 1.3 kW 97.31% 6/6/2/0 Limited vOU T range.
LLC (1.3 kW,
440 V-out)
4 [42] ISOP no 1 - 2 kV 700 V 12 kW 93.7% 5/5/1/1 Modularity, high pre-regulator losses.
boost + (12 kW,
LLC 1.2 kV-in)
1 [24] LLC no 160 - 320 V 400 V 1 kW 95.2% 4/4/2/1 Wide vIN , simple control, fixed vOU T .
(1 kW,
160 V-in)
0 [54] CLLC no 400 V 250 - 450 V 1 kW 97.9% 4/0/1/2 Wide vOU T , low η far from resonance.
(1 kW,
325 V-out)
1 [23] interleaved no 390 V 10 - 420 V 1 kW 98.1% 4/4/2/0 Very wide vOU T .
LLC (0.82 kW,
420 V-out)
1 [27] LLC + no 390 V 250 - 420 V 1.3 kW 93.94% 5/6/1/1 Wide vOU T .
VQ (0.95 kW,
420 V-out)
0 [55] LLC yes 380 - 660 V 200 - 500 V 6.6 kW 98% 8/0/1/1 Bidirectional, low voltage-gain of the dc/dc stage,
(6.6 kW, 220 V ac input.
440 V-out)
2 [30] LLC with no 390 V 126 - 420 V 1 kW 97.18% 8/6/1/1 Smooth transitions without transients.
adj. transf. (0.7 kW,
420 V-out)
0 [4] CLLLC yes 650 - 900 V 214 - 413 V 11 kW 98.75% 8/0/2/2 Bidir., 380 V input PFC for voltage regulation.
(11 kW,
792 V-in,
330 V-out)
1 [56] active no 10 kV 700 V 30 kW 99.1% 10/0/1/1 High η and power density, fixed conversion ratio,
NPC DAB (10 kW, careful layout and integrated modules required.
700 V-out)
4 [44] 3-phase no 850 V 200 - 800 V 12.5 kW 97.72% 20/0/3/4 Ultra wide vOU T for 400 and 800 Vbattery sys-
CLLC + (12.5 kW, tems, low η over the wide range, high component
buck 800 V-out) count.
0 [3] interleaved yes 900 V 200 - 650 V 22 kW 99.51% 6/0/0/6 Very high η, no galvanic isolation, 480 V ac input.
buck (22 kW,
200 V-out)
3 [12] 3-port no 388 - 412 V 250 - 450 V 2.3 kW 98% 8/0/1/1 PPP, with low-voltage devices, and limited overall
CLLC + (2.3 kW, conduction losses, high component count and com-
PPP 450 V-out) plexity.
3 [40] 2-level no 1500 V 630 - 900 V 50 kW NA 14/8/2/4 Modularity, utilization of low voltage semiconduc-
LLC + tors.
PPP
0 [57] buck- yes 150 V 48 - 450 V 1.5 kW 95.6% 6/0/0/2 Bidir., non-isolated, limited η, 85-265 V ac input.
boost (1.5 kW,
110 V-in ac,
250 V-out)
0 [58] phase- yes 400 V 330 V 3.3 kW 97.2% 4/4/1/1 On-board charger, 230 V ac input.
shift FB (3.3 kW,
330 V-out)
0 [29] resonant no 800 V 150 - 500 V, 6.6 kW 98.2% 8/0/1/2 Wide vOU T , reconfigurable rectifier, phase shift
LCL-T 500 - 950 V (6.6 kW, modulation, resonant network for η optimization
580 V-out) during CC charging phase.
4 [21] Buck- no 800 V 250 - 500 V 5 kW 98% (3 kW, 4/4/1/1 Very wide voltage gain (potential), high losses at
Boost + 400 V-out) light-load.
LLC
4 herein CLLC + no 800 V 250 - 500 V 10 kW 98.63% 8/8/1/2 Wide vOU T , simple control, high component
twin-bus (7 kW, count.
buck 500 V-out)
∗
S/D/T/I: number of active switches, diodes, transformers, and inductors, respectively.
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with dmin and dmax the minimum and maximum duty and zero-voltage switching (ZVS) and zero-current switching
cycles of SoH , corresponding to Vomin and Vomax in Table 2, (ZCS) conditions always satisfied [37]. Notably, the DCX
respectively. Their value must guarantee the zero-voltage operation of the LLC does not require an external resonant
switching operation of SoH and SoL at the respective output inductor, because the conversion gain is fixed. An equivalent
voltage levels. Thus the needed input voltages V1 and V2 solution based on a resonant FB-LLC designed to operate
provided by the DCX stage, can be calculated from (4) as: over the same wide range of output voltages is expected
Vomax (1 − dmin ) − Vomin (1 − dmax ) to show higher losses than the LLC in permanent DCX
V1 = conditions, as demonstrated in Sect. IV-B.
dmax − dmin
min max
(5) From (1) and (5) and considering dmin = (1 − dmax ) =
V d − Vomax dmin
V2 = o 5%, the transformer turns ratio can be calculated as n1 =
dmax − dmin N2 /N1 = 0.642 and n2 = N3 /N1 = 0.295 to make the
and the voltage gains (1) of the DCX-LLC can be derived. LLC converter operate at the resonant frequency fs at input
By using (5), the maximum voltage stress of the switches voltage Vg = 800 V and output bus voltages V1 and V2 as
can be computed as: in (5).
Vomax − Vomin
V1 − V2 = (6)
dmax − dmin A. TRANSFORMER DESIGN
which is always lower than the voltage stress of the switches In the design of the main magnetic element, both winding
of a full-power converter that requires a supply voltage and core losses must be considered. The transformer design
higher than the maximum output voltage. In order to min- procedure adopted herein is based on [21], [47], [66].
imize such voltage stress, and the related switching loss, Once the magnetic core is selected, with given magnetic
the duty-cycle excursion dmax − dmin should be maximized; volume Vc , window winding area Wa , core cross-sectional
then, for example, by imposing dmin = (1 − dmax ) = 5%. area Ac , Steinmetz parameters Kc , α and β , and maximum
Consequently, the converter in Fig. 2 with voltage ratings window filling factor ku (typ., assume ku ≤ 40%), it is
Vomax = 2 Vomin = 500 V presents a voltage stress on the possible to calculate the winding losses as:
switching devices of V1 − V2 = 278 V, allowing the use of
devices of low rated-voltages, which typically implies lower P cond = RF (fs )ρw Vw ku J02 (8)
losses [37], [38]. where ρw is the copper resistivity, Vw is the total windings
Once the duty-cycle range of the TBB stage is defined, volume, RF (fs ) = Rac /Rdc is the resistivity factor for the
zero-voltage switching (ZVS) can be achieved with a proper selected litz wire at fundamental frequency fs [66] and J0
selection of the output inductor value and the switching is the current density. The last parameter is calculated as:
frequency, for the whole output voltage range. As shown in P
VA
Fig. 3, the TBB is operated in continuous conduction mode J0 = (9)
Kv fs kf Bmax ku Ap
(CCM) and the inductor current at switching instants can be P
computed as: where V A is the power rating of the transformer, Kv is
V1 − V2 the waveform factor, Bmax is the peak flux density, kf is
ILomax = Io + d (1 − d) core stacking factor, and Ap = Ac Wa is the area product of
2fs Lo
(7) the core.
V1 − V2
ILomin = Io − d (1 − d) The core losses can be estimated using the Steinmetz
2fs Lo
equation:
In order to achieve zero-voltage switching, these current
P core = Vc Kc fsα Bmax
β
(10)
values should satisfy the minimum switched current con-
ditions for ZVS (refer, e.g., to [13], [16], [21], [63]–[65]). where Kc , α and β are the Steinmetz parameters for the
The inductor current value and the switching frequency of considered material, while Vc is the core volume. The total
the TBB stage are key parameters for the converter design transformer dissipated power is then computed as the sum
and operation over the whole range of output voltages and of (8) and (10) and it must be lower than the thermal dissi-
powers. pation capability of the component at the desired operating
temperature, which can be estimated during the design phase.
III. DESIGN OF LLC STAGE OPERATED AS DCX Fig. 4 reports the results of the calculated transformer losses,
The converter structure is shown in Fig. 2. When the LLC showing a total loss of 24 W at nominal conditions, namely,
resonant tank is operated at the resonance frequency, the V1 = 514 V and V2 = 236 V, and Po = 10 kW. According
voltage conversion ratio becomes ideally independent from with Fig. 4, the selected design point is more conservative
the actual load. In other words, the LLC converter maintains in terms of core losses with respect to the optimal point,
a constant voltage conversion ratio and adjusts its current this is due to a trade-off between the desired magnetizing
automatically, according to the load conditions, behaving inductance and the conductor sections.
as a DCX. In this operating condition, the LLC shows its Fig. 5 depicts the winding layout of the designed trans-
maximum efficiency, with a minimum flow of reactive power former of Fig. 6a. The designed transformer presents turns

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

L r1 1 : n 1 L r2
(P cond +P core )min
Design core i s1
cond +P Lr V1
1−d :
P

:d
L r3
P cond i s2 iL o
P core
+
V2
Vo

: n2
FIGURE 4. P -B plot for transformer design at Vo = 400 V and FIGURE 7. Equivalent circuit model for the estimation of resonant
Po = 10 kW. inductance at the primary side of the transformer, namely Lr in Fig. 2.

...
... current to allow ZVS for all the switches of the main
...
... N1 = 24 converter. A classical design for a DCX-LLC with voltage
b = 14mm

... N2 = 15
ratings of Table 2 requires a magnetizing inductance of about
...  
N3 = 7

200 µH (see, for example, [16], [21], [37]). The designed
... litz 420x50µm

... coil former transformer in Fig. 6a achieves the design target, with a
... kapton tape
magnetizing inductance of about 215 µH.
... The capacitive part of the resonant tank can be selected
core PQ65/60 on the basis of the desired resonant frequency (i.e., converter
switching frequency at DCX-LLC operation). The winding
w = 36.4mm
arrangement of the designed transformer in Fig. 4 is shown
FIGURE 5. Winding arrangement at the design point in Fig. 4. in Fig. 5. The interleaving of the primary and secondary-side
windings is an effective solution to limit the leakage induc-
ratio n1 = 0.625 and n2 = 0.292, current density J0 = tance and winding losses [67]. The experimental prototype in
5 A/mm2 , number of turns per winding N1 = 24, N2 = 15, Fig. 6a, which results from the design in Fig. 4 and winding
N3 = 7. arrangement in Fig. 5, presents values of leakage inductances
Lr1 = 795 nH, Lr2 = 445 nH, and Lr3 = 271 nH for the
B. RESONANT TANK DESIGN input, high-voltage, and low-voltage windings, respectively.
For what concerns the design of the resonant Lr Cr tank, The secondary windings leakage inductances Lr2 and Lr3
the transformer leakage inductance can be exploited for affect the overall resonance frequency proportionally to the
the implementation of the inductive part. Given the DCX normalized conduction interval of the respective diode bridge
operation mode of the LLC, low values of Lm can be used, rectifier. In fact, these inductances come into play only when
which is beneficial in terms of transformer design, losses, the corresponding rectifying diodes are conducting, and these
and resonant capacitor voltage stress. With the aimed DCX intervals are related to the duty-cycle of the TBB stage,
operation, the value of the magnetizing inductance Lm is as well as to the load current. The TBB stage imposes a
typically chosen to ensure a sufficiently high magnetizing strict relationship between the average charge transferred
through each output ports of DCX-LLC stage with respect
to the output voltage Vo and current Io . Then, the stage
can be modelled as shown in Fig. 7. The series-equivalent
inductance Lr of the resonant tank referred to the primary
side of Fig. 7 can be calculated as:
d2 Lr2 + (1 − d)2 Lr3
Lr = Lr1 + (11)
[n1 d + n2 (1 − d)]2
which is a function of the converter operating point, ac-
cording to (2). The validity of (11) is shown in Sect. IV
referring to a specific operating point. In order to remove
the dependence of the resonance frequency from the load,
(a) (b)
two additional resonant capacitors are connected in series
with the two output ports of the transformer, as shown
FIGURE 6. (a) Transformer prototype, and (b) thermography at the design
point in Fig. 4, namely, Vo = 400 V, Po = 10 kW, natural convection in Fig. 8. At resonance, the capacitive part of each of the
conditions. series-resonant impedances Lri Cri cancels out with the

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TABLE 2. Converter parameters.

Sa1 Sb1
2X twin-bus buck
DB1
ir Lr1 N1 : N2 Lr2 iLo Lo Parameter Symbol Value
Vg
is1 +
SoH
vi V1 vsw Vo Input voltage Vg 800 V
Sa2 Sb2 vC vC2 Co1
SoL
Output voltage Vo 250 - 500 V
C r1 C r2
Lr3 DB2 Nominal output voltage Vonom 400 V
is2 Maximum output current Iomax 25 A
V2 Nominal power Ponom 10 kW
vC3 Co2

: N3 C r3
Switching freq. of CLLC fs 200 kHz
Switching freq. of TBB fs o 50 - 400 kHz
FIGURE 8. Overall circuit schematic of the solution described herein,
composed of a DCX-CLLC stage plus two interleaved twin-bus buck Turns ratio N2 /N1 n1 0.625 -
stages.
Turns ratio N3 /N1 n2 0.292 -
Intermediate bus V1 V1 500 V
corresponding inductive part. Cr1 = 796 nF, Cr2 = 1.42 µF Intermediate bus V2 V2 234 V
and Cr3 = 2.34 µF are then calculated as proper values for Magnetizing inductance Lm 215 µH
the resonant capacitances in order to achieve a continuous Lr1 795 nH
resonant current operation, where the resonant frequency of Leakage inductances Lr2 445 nH
the CLLC stage becomes independent from the duty-cycle Lr3 271 nH
and the output current of the TBB stage, as otherwise shown TBB inductor Lo 30 µH
in (11). The proposed post-regulated converter is then shown Transformer Core: PQ65/60, Material: N87
in Fig. 8. Inductor Core: PQ40/40, Material: N97

Cr1 796 nF
IV. SIMULATION RESULTS
Resonant capacitances Cr2 1.42 µF
A. DCX RESONANT CURRENT OPERATION
Cr3 2.34 µF
A converter topology with parameters reported in Table 2
is considered for validation. Based on the considerations Sa1 , Sa2 , Sb1 , Sb2 G3R30MT12K, 1.2 kV SiC MOSFETs
reported in Sect. III, herein are reported the simulation results SoH , SoL LMG3422R030, 600 V GaN FET
focused on demonstrating the continuous resonant current Output Rectifier DB1 UJ3D06560KSD, 650 V SiC diodes
operation of the DCX stage. First, the operation of the Output Rectifier DB2 STTH100W04CW, 400 V Si diodes
converter in Fig. 2 is considered with a single resonant
capacitor Cr and, then, the operation of the proposed
converter in Fig. 8 is considered. Converters in Fig. 2 and presented in [21] (reported in Fig. 10 for reference), and the
Fig. 8 are simulated and the resonant currents are shown solution proposed herein. As discussed in Sect. I, these last
in Fig. 9. Let us consider different operating points at the two multi-stage topologies present higher efficiency than the
maximum output current Io = 25 A and minimum, nominal, classical frequency-modulated LLC converter. The consid-
and maximum output voltage Vo (i.e., 250, 400, 500 V). ered topologies are rated 10 kW and have been carefully
Figs. 9(a)-(c) shows the resonant currents ir , is1 , and is2 , designed in order to optimize their performances. The FB-
and the magnetizing current im of the circuit in Fig. 2 LLC is designed to allow the required output voltage range,
with resonant capacitance Cr = 174 nF. Such a value is while the FB-LLC of the proposed two-stage solution is
designed to have the desired resonance frequency fs , with designed for DCX operation. In principle, the FB-LLC for
Lr = 3.64 µH given by (11) at Vo = 250 V. Indeed, the DCX operation allows lower loss because it does not require
current is2 is resonant only in such an operating point. While, an inductor for accommodating a wide voltage gain range.
Figs. 9(d)-(f) shows the resonant currents considering the Fig. 11 reports and compares the efficiency curves of the
circuit in Fig. 8 with resonant capacitances Cri in Table 2. three topologies for Vo = 250 V, 400 V, and 500 V. The
Simulation results show that the resonance conditions are results are obtained by PLECS models tuned for accurately
satisfied, for the whole wide output voltage range, only in accounting for switching, magnetic, and conduction losses
this later case. Furthermore, conduction losses are minimized [21]. Such models were validated experimentally by means
only if the resonance conditions are satisfied. Based on the of thermal measurements in [21]. The efficiency perfor-
obtained results, the CLLC solution is considered for the mances of the topology in [21] is limited due to the high con-
investigations in the following. duction and switching losses in the pre-regulation stage. The
frequency-modulated FB-LLC converter has low-efficiency
B. PERFORMANCE COMPARISON performances in the minimum output voltage range due to
This section compares three different topologies, namely, the the limited voltage gain and the higher switching frequencies.
classical full-bridge LLC (FB-LLC), the buck-boost LLC Furthermore, the low Q-factor in the light-load region and

VOLUME , 7

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

ir and iLm ir and iLm

12 30
10 ir ir
8 iLm 20 iLm
6
current (A)

current (A)
4 10
2
0 0
-2
-4 -10
-6
-8 -20
-10
-12 -30
is1 and is2 is1 and is2
40 40
30
i s1 30
i s1
i s2 i s2
20 20
current (A)

current (A)
10 10
0 0
-10 -10
-20 -20
-30 -30
-40 -40
11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs) 11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs)

(a) (b)

ir and iLm ir and iLm

14
30 ir 12 ir
iLm 10 iLm
20 8
6
current (A)

current (A)

10 4
2
0 0
-2
-10 -4
-6
-20 -8
-10
-30 -12
-14
is1 and is2 is1 and is2
60 40
i s1 30
i s1
40 i s2 i s2
20
current (A)

current (A)

20 10
0 0
-20 -10
-20
-40 -30
-60 -40
11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs) 11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs)

(c) (d)

ir and iLm ir and iLm

25 30
20 ir ir
15 iLm 20 iLm
10
current (A)

current (A)

10
5
0 0
-5
-10 -10
-15 -20
-20
-25 -30
is1 and is2 is1 and is2
30 40
i s1 30
i s1
20 i s2 i s2
20
current (A)

current (A)

10 10
0 0
-10 -10
-20
-20 -30
-30 -40
11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs) 11 12 13 14 15 16 17 18 19 20 21 22 2 3 time (µs)

(e) (f)

FIGURE 9. Simulation results for LLC with different resonant tank designs, (a)-(c) refer to Fig. 2 and (d)-(f) refer to Fig. 8. (a),(d) Vo = 250 V; (b),(e)
Vo = 400 V; (c),(f) Vo = 500 V. Io = 25 A. Converter parameters are reported in Table 2.

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minimum output voltage pose a lower limit in the transferred

S1 S3 power due to the upper limit in the switching frequency.
ir Lr is irct Io This would require the adoption of dedicated modulation
Vg
provisions in the low-voltage region. An interleaved version
vi Lm Co Vo
S2 S4 vC i
of the proposed topology in [21] has also been considered
m

n:1
for evaluation, providing negligible benefits.
Cr
Fig. 12 shows the loss breakdown of the considered
(a)
topologies for the efficiency comparison in Fig. 11, using the
same methodology. In general, the major loss contribution
SaH SbH
vb Cb comes from the rectification stages; if active rectification
Lb ir Lr
Vg
ib is irct Io is implemented, the performances of all the considered
va vi Lm Co Vo
topologies will improve consequently, at the cost of higher
SaL SbL vC i
m
circuit complexity. Substantial magnetic losses are present in
Cr n:1 the frequency-modulated FB-LLC converter that affect the
(b) efficiency performances.
In summary, the proposed solution in Fig. 8 offers valuable
FIGURE 10. Additional topologies considered for efficiency and loss
comparisions in Sect. IV. (a) FB-LLC, (b) solution in [21]. efficiency improvements, at the cost of a small component in-
crement. The number of semiconductors is doubled and addi-
tional bus capacitances are needed for the proposed structure
99,0 in Fig. 8, as compared to the classical FB-LLC. Nevertheless,
98,5 excellent efficiency performances for the whole wide range
efficiency (%)

98,0 of operation are achieved. The main features of the compared

97,5
97,0 topologies in Fig. 8 and Fig. 10 are summarized in Table 3.
96,5
96,0
V. EXPERIMENTAL RESULTS
95,5
95,0 Fig. 14 displays the experimental prototype implementation
0 2 4 6 8 10 of a module rated 10 kW, with parameters in Table 2, used to
FB-LLC [21] herein power (kW) validate the reported analysis, design choices, and feasibility
(a) of the proposed converter, in Fig. 8. Fig. 15 shows the
measurement and control setup built around the proposed
99,0 converter in order to collect the experimental results reported
98,5 herein.
efficiency (%)

98,0
97,5 Fig. 13 shows the experimental validation of the consider-
97,0 ations discussed in Sect. IV. In particular, Figs. 13(a), (c), (e)
96,5 show the measured resonant currents at the same operat-
96,0 ing points of the simulated waveforms in Figs. 9(d), (e), (f),
95,5 respectively. It is possible to appreciate that the current
95,0 waveforms are very close to the continuous resonant cur-
0 2 4 6 8 10
FB-LLC [21] herein power (kW) rent operation of the DCX-CLLC. The measured waveform
amplitudes correspond to the expected values. The switch-
(b)
ing frequency is set to fs = 200 kHz and dead-time to
98,5 td = 260 ns. If needed, additional refinements to match the
98,0 true resonance frequency may be performed by adjusting
efficiency (%)

97,5 the values of the resonant capacitors or the used operating

97,0 frequency in the controller [16], [68], [69].
96,5 Figs. 13(a), (b) show the converter waveforms at minimum
96,0 output voltage Vo = 250 V and output current Io = 25 A.
95,5 The duty-cycle of the TBB is set to 7%, and the switching
95,0 frequency to the lower limit of fso = 50 kHz. Such a
0 2 4 6 8 10 lower limit comes from a trade-off between the dc-link
FB-LLC [21] herein power (kW) capacitances and the output voltage ripple. The conversion
(c) efficiency in such an operating point is about 97.6%. For
Vo = 250 V ZVS conditions are not satisfied for average
FIGURE 11. Efficiency comparison: full-bridge LLC, topology in [21], and
solution herein. (a) Vo = 500 V, (b) Vo = 400 V and (c) Vo = 250 V. output currents higher than about 10 A. Remarkably, the
typical charging profile of a battery requires a constant

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

TABLE 3. Compared topologies considerations.

Topology Peak efficiency # Switches / Diodes / Transformers / Inductors Pros vs Cons

FB-LLC 98.5% 4 (4x 1.2 kV SiC MOSFET) / Pros: Low component count; Cons: frequency modula-
(8 kW, 500 V-out)
(Fig. 10a) 4 (4x 650 V SiC Diode) / tion, limited controllability over the wide range, high
1 (150 µH, PQ65/60-N87) / magnetic losses.
2 (2x 16 µH, PQ40/40-N97).
BB-LLC 98.4% 4 (4x 1.2 kV SiC MOSFET) / Pros: very wide voltage gain (potential); Cons: high
(5 kW, 400 V-out)
(Fig. 10b) 4 (4x 650 V SiC Diode) / circulating reactive currents in light-load, higher losses.
1 (150 µH, PQ65/60-N87) /
2 (2x 8 µH, PQ40/40-N97).
CLLC+TBB 98.72% 8 (4x 1.2 kV SiC MOSFET + 4x 600 V GaN FET) / Pros: high efficiency in a wide range, simple control;
(8 kW, 500 V-out)
(Fig. 8) 8 (4x 650 V SiC Diode + 4x 400 V Si Diode) / Cons: high component count.
1 (200 µH, PQ65/60-N87) /
2 (2x 30 µH, PQ40/40-N97).

current mode charging when the battery is discharged (i.e., at maximum output voltage conditions. Such values are very
low battery voltages). In this condition, the charging current close to the estimations performed by the tuned simulation
is maximum and equals to the output current Iomax at the shown in Fig. 11 and previously presented in [50].
nominal output power (see, e.g., [70]), namely, 25 A at
10 kW in the considered case.
VI. CONCLUSIONS
Figs. 13(c), (d) show the converter waveforms at nominal
A two-stage converter, not previously documented for EV
output voltage Vo = 400 V and output current Io = 25 A.
battery charging applications, has been proposed, designed,
The duty cycle of TBB is set to 65% and the switching
and demonstrated in this paper. The conversion structure is
frequency of the TBB is fso = 73 kHz in order to achieve
composed of a DCX-CLLC and a post-regulator and features
ZVS. The conversion efficiency in such a point is about
high efficiency, a wide range of output voltage, and a simple
98.4%.
principle of operation. The DCX-CLLC converter always
Figs. 13(e), (f) show the converter waveforms at maximum
operates at its optimal operating point and the additional
output voltage Vo = 500 V and output current Io = 25 A.
post-regulator based on a two-input buck converter is used
The duty cycle of the TBB is set to 95%, the switching
to regulate the output voltage. In such a post-regulator, the
frequency to the lower limit of fso = 50 kHz. The conversion
stress of the switches is a fraction of the rated voltages.
efficiency in such a point is about 98.5%. For Vo = 500 V,
Hence, the efficiency of the proposed configuration, com-
ZVS conditions are not satisfied for output currents higher
pared with standard dc/dc converters processing full power,
than about 10 A. Remarkably, the loss of ZVS in heavy load
can be improved. The considered topology is presented, sim-
conditions and extreme duty-cycle is the direct consequence
ulation results of a resonant two-output CLLC are reported
of the selected inductance Lo . Indeed, the selected value
and an efficiency performance comparison is included. The
allows to achieve ZVS in light-load conditions and with a
reported analysis and the experimental characterizations and
switching frequency of the TBB limited to fso = 400 kHz.
tests were performed on a 10 kW prototype module based
Some ringing at the commutations of the input full-
on silicon-carbide (SiC) devices and gallium-nitride (GaN)
bridge current is visible in Figs. 13(a), (c), (e). The ringing
devices. Conversion performances covering the whole power
appears during the dead-times and is generated by resonances
and voltage ranges have been reported experimentally, show-
between the transformer leakage inductances and the devices
ing high efficiency over a wide range of operating conditions,
output capacitances. These resonances may bring partial
recording a peak efficiency of 98.63% at 500 V output
ZVS and ZCS conditions and eventually cause increased
voltage and 7 kW transferred power. In final applications,
switching losses. This aspect is investigated in [16], which
series or parallel connections of multiple modules can be
also proposes a method to reduce the related switching loss
considered for scaling the voltage or current ratings of the
based on switching frequency and dead-time perturbations.
final implementation, thanks to the isolated output. Future
Finally, Fig. 16 shows the converter efficiency measured
studies may include on-line controllers for optimal converter
at the minimum, nominal, and maximum output voltage.
modulation and procedures for the optimal design of the
Efficiency measurements were performed by means of a
components of the converter, like the output TBB inductors.
Keysight PA2203A power analyzer. The measured peak
efficiency at minimum output voltage is 97.8%, while at
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content may change prior to final publication. Citation information: DOI 10.1109/OJPEL.2023.3271227

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Zanatta et al.: A Two-Stage DC-DC Isolated Converter for Battery-Charging Applications

vi (200 V/div)

is2 (10 A/div)

ir (5 A/div) fso = 50 kHz
vsw (100 V/div)
is1 (5 A/div)
iLo (4 A/div)

[1 µs/div] [5 µs/div]

(a) (b)

vi (200 V/div)
fso = 73 kHz
is2 (4 A/div)
ir (5 A/div)
vsw (100 V/div) iLo (4 A/div)
is1 (10 A/div)

[1 µs/div] [4 µs/div]

(c) (d)

vi (200 V/div)
is1 (10 A/div)
ir (5 A/div)
is2 (5 A/div)

vsw (100 V/div)

iLo (2 A/div)
fso = 50 kHz

[1 µs/div] [5 µs/div]

(e) (f)

FIGURE 13. Experimental results of the proposed converter in Fig. 8 at Io = 25 A. (a),(b) Vo = 250 V; (c),(d) Vo = 400 V; (e),(f) Vo = 500 V.
(a), (c), (e) are the experimental validations of the simulations in Figs. 9(d), (e), (f), respectively.

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 This article has been accepted for publication in IEEE Open Journal of Power Electronics. This is the author's version which has not been fully edited and
content may change prior to final publication. Citation information: DOI 10.1109/OJPEL.2023.3271227

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14 VOLUME ,

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 This article has been accepted for publication in IEEE Open Journal of Power Electronics. This is the author's version which has not been fully edited and
content may change prior to final publication. Citation information: DOI 10.1109/OJPEL.2023.3271227

TOMMASO CALDOGNETTO (Senior Member,

IEEE) received the M.S. (Hons.) degree in elec-
tronic engineering and the Ph.D. degree in infor-
mation engineering from the University of Padova,
Padova, Italy, in 2012 and 2016, respectively. He is
currently an Assistant Professor with the Depart-
ment of Management and Engineering, University
of Padova, Vicenza, Italy. His research interests in-
clude the control of grid-tied converters, microgrid
architectures, converters for dc nanogrids, and real-
time simulation for power electronics applications.

DAVIDE BIADENE (Member, IEEE) received the

M.S. degree in electronic engineering and the
Ph.D. degree in information engineering from the
University of Padova, Padova, Italy, in 2014 and
2017, respectively. He is currently a research fel-
low at the Department of Management and Engi-
neering, University of Padova, Vicenza, Italy. From
2017 to 2021 he was with Infineon Technologies
Italia, employed as an R&D test engineer in the au-
tomotive business line team. His current research
interests include dc-dc converters for renewables
and energy storage devices, and artificial intelligence techniques applied to
modeling and controlling of power electronic converters.

GIORGIO SPIAZZI (Member, IEEE) received the

graduate (cum laude) degree in electronic engi-
neering from the University of Padova, Padua,
Italy, in 1988 and the Ph.D. degree in industrial
electronics and informatics from the University of
Padova, in 1993. He is currently working as a
Full Professor with the Department of Information
Engineering (DEI), University of Padova. His main
research interests are in the fields of dc–dc con-
verters for renewable energy sources, highpower-
factor rectifiers, soft-switching techniques, solid-
state lamp ballasts, and electromagnetic compatibility in power electronics.

PAOLO MATTAVELLI (Fellow, IEEE) received

the M.S. (Hons.) and Ph.D. degrees in electri-
cal engineering from the University of Padova,
Padova, Italy, in 1992 and 1995, respectively.
From 1995 to 2001, he was a Researcher with
the University of Padova. From 2001 to 2005, he
was an Associate Professor with the University
of Udine, Udine, Italy, where he led the Power
Electronics Laboratory. In 2005, he joined the
University of Padova, Vicenza, Italy, with the same
duties. From 2010 to 2012, he was with the Center
for Power Electronics Systems, Virginia Tech, Blacksburg, VA, USA. He is
currently a Professor with the University of Padova, Vicenza. His current
Google Scholar H-index is 82. He has been leading several industrial and
government projects in his research fields. His research interests include
analysis, modeling, and analog and digital control of power converters,
grid-connected converters for renewable energy systems and microgrids, and
high-temperature and high-power-density power electronics. Dr. Mattavelli
was an Associate Editor for IEEE Transactions on Power Electronics, from
2003 to 2012. From 2005 to 2010, he was the Industrial Power Converter
Committee Technical Review Chair for IEEE Transactions on Industry
Applications. For terms 2003–2006, 2006–2009, and 2013–2015, he was
a Member-at-Large of the IEEE Power Electronics Society’s Administrative
Committee. He received the Prize Paper Award in IEEE Transactions on
Power Electronics in 2005, 2006, 2011, and 2012 and the second Prize
Paper Award at the IEEE Industry Application Annual Meeting in 2007. He
is the Co-Editor-in-Chief for IEEE Transactions on Power Electronics.

VOLUME , 15

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