Complete Power Electronics

EE 305 POWER ELECTRONICS
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By
SHELMA GEORGE
Assistant professor
Department of Electrical and Electronics Engineering
Vimal Jyothi Engineering College
1 EE 305 Power Electronics 8/21/2017

Course objectives
 To get an overview of different types of power semiconductor
devices and their switching characteristics
 To study the operation and characteristics of various types of
power electronic converters
Expected outcomes
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The students who successfully complete this course will be able to:
 Choose appropriate power semiconductor device in converter
circuits and develop their triggering circuits.
 Analyze various types of power electronic converters and apply
different switching techniques.
 Select appropriate power converter for specific applications.
 Interpret and use datasheets of power semiconductor devices for
design.
Introduction to Power Electronics
 Very interesting, important and relatively one of the easiest
subject
 Basic requirements – KCL, KVL, behavior of L and C in both ac
and dc
 Should have a basic knowledge in
 Circuit theory
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 Power semiconductor devices – both analog and digital
 Machines
 Power system
 Control theory
 Microprocessor and micro controller
• Multi-disciplinary in nature – need knowledge in all branches of
electrical engineering
 “ two technologies will dominate in future – one is computer,
providing intelligence and the other is power electronics, the
means to do it
Energy scenario
 87% - of total energy from burning the fossil fuel
 6% - nuclear
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 Remaining from renewable sources
Expected years of completion
 Natural uranium – 50 years
 Oil – 100 years
 Natural gas - 150 years
 Coal – 200 years
 Neither of us live till that end to see this figure correct or not
 But we have one responsibility to extend this period
 How do we do this?
 Use it very efficiently
 Improving the converting efficiency
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 Increase the % of Energy produced from renewable
 If we are depending on non-renewable sources, then the side
effects are
 Nuclear power plant – waste handling, safety
 Burning fossil fuel – CO2, Ozone, CO, NO2 etc
 Coal burning – fly ash, global warming etc…

 Every year mount Everest height is decreasing by 10 cm –
due to global warming
 Major cause of urban pollution – IC engine vehicle
 Bulk of the electric power is consumed by electric motor
 Major load
1.
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Induction machine driving – fan type load
Induction machine driving – pump type load
2. Lighting
 If saving power in above two, we can save lots of energy

 Fan regulator
 Big size
 If we keep in low speed for long time heating will occur
 Consist of opening at two ends, because resistor is placed
inside
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 Smooth variation , Doing same function
 Just one knob outside , So small
 Moulded inside the switch board
 Heat dissipation negligibly small, otherwise wants to build
outside
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 Massie regulator to small, elegant regulator
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 Dc regulator
 Heat sink build outside
 Heavy
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 Power supply in computer
 Can carry safely
 Low weight
 No heat sink outside
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 Only input ac supply and
output cables

 Instead of transmitting ac voltage, is it possible to convert ac
to dc at the generating station and transmit dc and at
receiving end inverter operation, since we require ac power?
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 Lighting
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 Future trend
 Distributed power generation
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 Power electronics – Is the technology associated with efficient
conversion and control of electric power by power semiconductor
devices
 Goal of power electronics – To control the flow of energy from
electric source to electric load
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 Why power electronics is so popular?
 Enabling technology for distributed power generation
 Success of any technology lies in following
1. Should be highly efficient
2. Should be reliable
3. The size, weight and cost should be low

 Efficiency high means
 Heat sink requirement low
 Packaging density increases
 Size comes down
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Power electronics
 Power Electronics is the art of converting electrical energy from
one form to another in an efficient, clean, compact, and robust
manner for convenient utilization.
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Block diagram of a typical power electronic converter

Power Electronics involves the study of
 Power semiconductor devices - their physics, characteristics,
drive requirements and their protection for optimum utilization
of their capacities,
 Power converter topologies involving them,
 Control strategies of the converters,
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 Digital, analogue and microelectronics involved,
 Capacitive and magnetic energy storage elements,
 Rotating and static electrical devices,
 Quality of waveforms generated,
 Electro Magnetic and Radio Frequency Interference,

How is Power electronics distinct from
linear electronics?
 It is not primarily in their power handling capacities.
 In Power Electronics all devices are operated in the switching
mode - either 'FULLY-ON' or 'FULLY-OFF' states.
 The linear amplifier concentrates on fidelity in signal
amplification, requiring transistors to operate strictly in the
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linear (active) zone, Saturation and cutoff zones

Linear operation Switching operation
 Active zone selected:  Active zone avoided : High losses,
 Good linearity between encountered only during
input/output transients
 Saturation & cut-off zones  Saturation & cut-off (negative
avoided: poor linearity bias) zones selected: low losses
 Transistor biased to operate  No concept of quiescent point
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around quiescent point
Common emitter, Common
collector, common base modes
 Transistor driven directly at base
- emitter and load either on
collector or emitter
 Output transistor barely protected  Switching-Aid-Network (SAN)
and other protection to main
 Utilization of transistor rating of transistor
secondary importance
 Utilization of transistor rating
optimized

Power semiconductor device history
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Module I
SCR-Structure, static characteristics & switching (turn-on &

turn-off) characteristics - di/dt & dv/dt protection – turn-
on methods of SCR - two transistor analogy - series and
parallel connection of SCRs
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Structure and principle of operation of power diode, TRIAC,
GTO, Power MOSFET & IGBT – Comparison

SCR (Silicon Controlled Rectifier)
 Four layer, three junction, p-n-p-n semiconductor switching
device
 Basically a thyristor consist of 4 layers of alternate p-type and
n-type silicon semiconductors forming three junctions J1, J2
and J3
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 Gate terminal is usually kept near the cathode terminal
 The terminal connected to outer p region is called the anode
 The terminal connected to outer n region is called the cathode
 And that connected to inner p region is called gate
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 For large current applications thyristors need better cooling, this
is achieved to great extent by mounting them onto heat sinks
 SCRs of voltage rating 10kV and an r.m.s current rating of 3000
A with corresponding power handling capacity of 30MW are now
available
 Such a high power thyristor can be switched on by a low voltage
supply of about 1 A and 10W

 An SCR is so called because silicon is used for its
construction and its operation as a rectifier can be controlled
 Like the diode SCR is a unidirectional device, that blocks the
current flow from cathode to anode
 Unlike the diode, a thyristor also blocks the current flow
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from anode to cathode until it is triggered into conduction by
a proper gate signal between gate and cathode terminal

SCR – Static V-I Characteristics
 An elementary circuit diagram for obtaining static V-I
characteristics of a thyristor is shown below
 The anode and cathode are connected to main source
through load
 The gate and cathode are fed from a source of Es which
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provides +ve gate current from gate to cathode

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 The characteristics reveals that a thyristor has three basic
modes of operation
Reverse blocking mode
Forward blocking mode (off state)
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Forward conduction mode (on state)

Reverse blocking mode
 When cathode is made +ve w.r.t anode with switch S open
thyristor is reverse biased
 Junction J1 and J3 are seen to be reverse biased
 A small leakage current of the order of a few milli-amperes flows
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 This is reverse blocking mode, called the off state of a thyristor
 If the reverse voltage is increased, then at a critical breakdown
level, called reverse breakdown voltage VBR, an avalanche occur at
J1 and J3
 Reverse current increases rapidly

Forward blocking mode
 When anode is +ve w.r.t cathode, with gate circuit open,
thyristor is said to be forward biased
 J1 and J3 are forward biased
 J2 is reverse biased
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 In this mode, a small current called forward leakage current
flows
 As the forward leakage current is small, SCR offer a high
impedance
 Therefore a thyristor can be treated as an open switch even in
the forward blocking mode
Forward conduction mode
 When anode to cathode forward voltage is increased with gate
circuit open, reverse biased junction J2 will have an avalanche
breakdown at a voltage called forward break-over voltage VBO
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 After this breakdown thyristor gets turned on with point M at
once shifting to N and then to a point where between N and K
 Here NK represents the forward conduction mode
 A thyristor can be brought from forward blocking mode to
forward conduction mode by turning on by applying
1) A positive gate pulse between gate and cathode
2) A forward break-over voltage across anode and cathode
SCR – Switching Characteristics
 During turn on and turn off process a thyrisor is subjected

to different voltages across it and different currents through
it
 The time variation of a voltage across a thyristor and the
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current through it during turn on and turn off process gives
the dynamic or switching characteristics of a thyristor

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Switching characteristics during turn on
 A forward biased thyristor is usually turned on by applying a +ve
gate voltage between gate and cathode
 There is however a transition time form forward off state to
forward on state
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 This transition time is called thyristor turn on time
 Is defined as the time during which it changes from forward
blocking state to final on state
 The turn on time can be divide into three intervals
Delay time td
Rise time tr
Spread time tp
Delay time td
 Measured from the instant at which gate current reaches
0.9Ig to the instant at which anode current reaches 0.1Ia
 Ig and Ia are the final values of gate and anode currents
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 It can also be defined as the time during which anode voltage
falls fromVa to 0.9Va
 Va is the initial value of anode voltage
 Another way of defining is the time during which anode
current rises from forward leakage current to 0.1Ia, where Ia
is the final value of anode current

 With the thyristor initially in the forward blocking state the anode
voltage is OA and anode current is small leakage current
 Initiation of turn on process is indicated by a rise in anode current
from small leakage current and a fall in anode cathode voltage
from forward blocking voltage OA
 As gate current begins to flow from gate to cathode with the
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application of gate signal, the gate current has non-uniform
distribution of current density over cathode surface due to the p
layer
 During delay time anode current flows in a narrow region near
the gate where gate current density is the highest
 The delay time can be reduced by applying high gate current and
more forward voltage between anode and cathode
 The delay time is fraction of microsecond
Rise time
 Is the time taken by the anode current to rise form 0.1Ia to
0.9Ia
 Time required for the forward blocking off state voltage to
fall from 0.9 to 0.1 of its initial value
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 Rise time is inversely proportional to the magnitude of gate
current and its build up rate
 Rise time can be reduced if high and steep current pulses are
applied to the gate
 The main factor determining the tr is the nature of anode
circuit
 During rise time turn on losses in the thyristor are the
highest due to high anode voltage and large anode current
occurring together in the thyristor
 As these losses occur only over a small conducting region,
local hot spot may be formed
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 And the device may be damaged

Spread time
 Time taken by the anode current to rise from 0.9Ia to Ia
 Time for the forward blocking voltage to fall from 0.1 of its
initial value of its on state voltage drop (1 to 1.5 V)
 During this time conduction spreads over entire cross section
of the cathode of SCR
 After the spread time anode current attains steady state value
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and the voltage drop across SCR is equal to the on state
voltage drop of the order of 1 to 1.5V
 Total turn on time of an SCR is equal to the sum of delay
time, rise time and spread time
 Manufactures usually specify the rise time which is of the
order of 1 to 4μ sec
 Total turn on time depends on the anode circuit parameters
and gate signal wave-shapes
EE 305 Power Electronics
40 8/21/2017
Switching characteristics during Turn off
 Turn off means that it has changed from on to off state and is
capable of blocking the forward voltage
 This dynamic process of SCR from conduction state to
forward blocking state is called commutation process or turn
off process TRACE KTU
 Once the thyristor is on, gate loses control
 The SCR can be turned off by reducing the anode current
below holding current
 The turn of time tq of a thyristor is defined as the time
between the instant anode current become zero and the
instant SCR regains forward blocking capability
 During time tq, all the excess carriers from the four layers of
SCR must be removed
 This removal of excess carriers consisting of sweeping out of
holes from outer p layer and electrons from outer n layer
The carriers around junction J2 can be removed only by

recombination TRACE KTU
 The turn off time is divided into two interval
1) Reverse recovery time trr
2) Gate recovery time tgr
 tq=trr+tgr

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Reverse recovery time
 At instant t1, anode current becomes zero
 After t1, anode current build up in the reverse direction
 The reason for the reversal of anode current after t1 is due to the
presence of carriers stored in the four layers
 The reverse recovery current removes excess carriers from the
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end junction J1 and J3 between the instant t1 and t3
 In other words, reverse recovery current flows due to the
sweeping out of holes from top p layer and electrons from bottom
n layer
 At instant t2, when about 60% of the stored charges are removed
from the outer two layers carrier density across J1 and J3 begins
to decrease and with this reverse recovery current also starts
decaying
 The reverse current decay is fast in the beginning but gradual
thereafter
 The fast decay of the recovery current causes a reverse
voltage across the device due to the circuit inductance
This reverse voltage surge may cause damage to the device


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In practice this avoided by using protective RC element
across SCR
 At instant t3, when reverse recovery current has fallen nearly
to zero, end junction J1 and J3 recover and SCR is able to
block the reverse voltage

Gate recovery time
 At the end of reverse recovery period (t1-t3), the middle junction
J2 still has trapped charges therefore, the thyristor is not able to
block the forward voltage at t3
 The trapped charges around J2 cannot flow to the external circuit
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 Therefore this charges must decay only by recombination
 This recombination is possible if a reverse voltage is maintained
across SCR
 The rate of recombination of charges is independent of the
external circuit parameter
 The time for recombination of charges between t3 and t4 is called
gate recovery time tgr

 At instant t4, junction J2 recovers and the forward voltage
can be reapplied between anode and cathode
 The turn off time provided to a thyristor by the practical
circuit is called circuit turn off time tc
Is defined as the time between the instant anode current
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become zero and the instant reverse voltage due to practical
circuit reaches zero
 tc must be greater than tq for reliable turn off
 Otherwise the device may turn on at undesired instant,
process called commutation failure

Thyristor protection
 Reliable operation of a thyristor demands that its specified
ratings are not exceeded
 In practice, a thyristor may be subjected to overvoltage or
over-currents
During SCR turn on, di/dt may be prohibitively large


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There may be false triggering of SCR by high value of dv/dt
 A thyristor must be protected against all such abnormal
conditions for satisfactory and reliable operation of SCR
circuit and the equipment

di/dt protection
 When a thyristor is forward biased and is turned on by a gate
pulse, conduction of anode current begins in the immediate
neighborhood of the gate cathode junction
 Thereafter the current spread across the whole area of the
junction
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 The thyristor design permit the spread of conduction to the whole
junction area as rapidly as possible
 However if the rate of rise of anode current i.e., di/dt is large as
compared to the spread velocity of carriers, local hot spot will be
formed near the gate junction
 This localized heating may destroy the thyristor
 Therefore the rate of rise of anode current at the time of turn on
must be kept below the specified limiting value
 The value of di/dt can be maintained below acceptable limit
by using a small inductor called, di/dt inductor in series with
the anode circuit
 Typical di/dt limit values of SCR are 20 – 500 A/ μ sec
 Local hot spot heating can also be avoided by ensuring that

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the conduction spreads to the whole area as early as possible
This can be achieved by applying agate current nearer to the
maximum specified gate current
 di/dt=Vs/Ls
 Ls – series inductance
including stray inductance

dv/dt protection
 If rate of rise of suddenly applied voltage across thyristor is high,
the device may get turned on
 Such phenomena of turning on a thyristor is called dv/dt turn on
 And this must be avoided as it leads to false operation of the
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thyristor circuit
 For controllable operation of the thyristor, the rate of rise of
anode to cathode voltage dVa/dt must be kept below the specified
limit
 Typical value of dv/dt are 20 – 500V / μ sec
 False turn on of a thyristor by large dv/dt can be prevented by
using a snubber circuit in parallel with the device

Snubber circuit
 Consist of a series combination of resistance Rs and capacitance Cs
in parallel with the thyristor
 Cs in parallel with the device is sufficient to prevent unwanted
dv/dt triggering of the SCR
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 When switch S is closed, a sudden voltage appear across the circuit
 Capacitor Cs behaves like a short circuit, therefore voltage across
SCR is zero
 With the passage of time voltage across Cs builds up at a slow rate
such that dv/dt across Cs and therefore across SCR is less than the
specified maximum dv/dt rating of the device

Snubber circuit
 When the SCR is turned on capacitor discharges through the
SCR and sends a current equal to Vs/ (resistance of the path
formed by Cs and SCR)
 As this resistance is quite low, the turn di/dt will tend to be
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excessive and as a result SCR may be destroyed
 In order to limit the magnitude of discharge current a
resistance Rs is inserted in series with Cs
 The value of snubber circuit constant τ=RsCs can be
determined from for a known value of dv/dt

Snubber circuit
 The value of Rs is found from
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 The discharging current

Turn on methods of SCR
 With anode +ve w.r.t cathode, a thyristor can be turned on
by any one of the following techniques
Forward voltage triggering
Gate triggering
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dv/dt triggering
Temperature triggering
Light triggering

Forward voltage triggering
 When forward voltage applied between anode and cathode
with gate circuit open, junction J2 is reverse biased
 As a result depletion layer formed across J2
 The width of this layer decreases with an increase in anode -
cathode voltage TRACE KTU
 If forward voltage across anode-cathode is gradually
increased, a stage come when depletion layer across j2
vanishes
 At this moment reverse biased junction J2 is said to have
avalanche breakdown and the voltage at which this occur is
called forward break-over voltage
 The name forward break-over voltage is given because at this
voltage VBO v-i characteristics break-over and shift to its on state
position with brek-over current IBO
 At this voltage, thyristor changes from off state (high voltage with
low leakage current) to on state characterized by low voltage
across thyristor with large forward current
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As other junction J1, J3 are already forward biased, breakdown of
junction J2 allows free movement of carriers across three
junctions and as a result large forward anode current flows
 This forward current is limited by load impedance
 In practice the transition from off state to on state obtained by
exceedingVBO is never employed as it may destroy the device

Gate triggering
 Turning on thyristor by gate triggering is simple, reliable and
efficient
 It is therefore the most usual method of firing the forward
biased SCR
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 A thyristor with forward break-over voltage (say 800 V)
higher than the normal voltage (say 400V) is chosen
 This means that thyristor will remain in forward blocking
state with normal working voltage across anode and cathode
and with gate open
 However when turn of a thyristor required, a +ve gate
voltage between gate and cathode is applied
 The forward voltage at which the device switches to on state
depends on the magnitude of gate current
 Higher is the gate current lower is the forward break-over voltage
 When +ve gate current is applied, gate p layer is flooded with
electrons from the cathode

gate p layer TRACE KTU
This is because cathode n layer is heavily doped as compared to
 As the thyristor is forward biased, some of these electrons reaches

junction J2
 As a result width of the depletion layer near junction J2 is reduced
 This cause the junction J2 to break down at an applied voltage
lower than the forward break-over voltage VBO

 If magnitude of gate current is increased, more electrons
would reach junction J2, as a consequence thyristor would
get turned on at a much lower forward applied voltage
 For Ig=0, forward break-over voltage is VBO
 For Ig1,V1<VBO
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 For Ig2>Ig1,V2<V1

 Once the SCR is conducting a forward current, reverse biased
junction J2 no longer exist
 No gate current is required for the device to remains in on state
 Therefore if the gate current is removed, the conduction of
current from anode to cathode is unaffected
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However if the gate current reduced to zero before rising the
anode current attains a value, called latching current the device
will turn off again
 The latching current may be defined as the minimum value of anode
current which it must attain during turn on process to maintain
conduction when gate signal is removed

 Once the thyristor is conducting, gate loses control
 The thyristor can be turned off only if the forward current
falls below a low level current called holding current
 The holding current may be defined as the minimum value of anode
current below which it must fall for turning off the thyristor


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The latching current is higher than holding current
The latching current is associated with the turn on process
and holding current with turn off process
 Usually latching current is 2 to 3 times the holding current
 In industrial applications, holding current (typically 10 m A)
is almost taken as zero

dv/dt triggering
 With forward voltage across anode and cathode, the two outer
junctions J1 and J3 are forward biased and inner junction J2 is
reverse biased
 This reverse biased junction J2 has the characteristics of a
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capacitor due to charges existing across the junction
 In other words space charge exist in the depletion region near
junction J2 and therefore junction J2 behaves like a capacitance
 If forward voltage is suddenly applied, a charging current through
junction capacitance Cj may turn on the SCR
 Almost the entire suddenly applied forward voltage Va appears
across junction J2 the charging current ic

 As the junction capacitance is almost constant, dCj/dt is zero

and current ic,
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 If the rise of forward voltage dVa/dt is high, the charging
current ic would be more
 This charging current plays the role of gate current and turn
on the SCR even though gate signal is zero
 Note that even if Va is small, it is the arte of change of Va that
plays the role of turning on the device

Temperature triggering ( thermal triggering)
 During forward blocking, most of the applied voltage appears
across reverse biased junction J2
 This voltage across J2, associated with leakage current, would rise
the temperature of this junction
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 With increase in temperature, width of depletion layer decreases
 This further leads to more leakage current and therefore more
junction temperature
 With this cumulative process at some high temperature, depletion
layer of reverse biased junction vanishes and the device gets turned
on

Light triggering
 For light triggered SCR, a recess is made in the inner p layer
 When this recess is irradiated free charge carriers are
generated just like when gate signal is applied between gate
and cathode
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 The pulse of light of appropriate wavelength is guided by
optical fibers for irradiation
 If the intensity of this light thrown on the recess exceeds a
certain value, forward biased SCR is turned on
Such a thyristor is known as light activated SCR (LASCR)


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LASCR may be triggered with a light source or with a gate
signal
 Sometimes a combination of both may be used
 Light triggered SCR have now been used in high voltage
direct current (HVDC) transmission system

Two transistor analogy
 The principle of thyristor operation can be explained with
the use of its transistor model (or two transistor analogy)
 Two transistor model is obtained by bisecting the two middle
layers along the dotted line, in tow separate halves
 Junction J1-J2 and J2-J3 can be considered to constitute pnp
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and npn transistors separately

 In the off state of a transistor, collector current Ic is related
to emitter current IE as
 Where α is the common base current gain
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 ICBO is the common base leakage current of collector base
junction of a transistor
 For transistor Q1, emitter current IE= anode current Ia and
Ic= collector current Ic1
 Therefore for Q1

 Similarly for transistor Q2
 The sum of two collector current is equal to the external

circuit current Ia entering at anode terminal A
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 When gate current is applied the Ik=Ia+Ig, by substituting
this

 For a silicon transistor, current gain α is very small at low
emitter current
 With an increase in emitter current, α build up rapidly
 With gate Ig=0 and with thyristor forward biased, (α1 + α2)
is very small

more than
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Under this condition forward leakage current some what
flows
 If by some means the emitter current of two component
transistors can be increased so that α1 + α2 approaches
unity
 As per above equation (equation for Ia) Ia tends to become
infinity, thereby turning on the device
 External load limit the value of anode current to a safe limit
 The method of turning on a thyristor is in fact are the
method of making (α1 + α2) to approach unity
 These various mechanism of turning on a thyristor are
(i)Gate triggering
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 With anode +ve w.r.t cathode and with gate current Ig=0
shows that anode current equal to the forward leakage
current is somewhat more than
 Under these condition the device is in the forward blocking
state

 Now a sufficient gate-drive current between gate and cathode
of thyristor or the transistor is applied
 This gate drive current is equal to the base current IB2=Ig and
emitter current Ik of transistor Q2
With the establishment of emitter current Ik of Q2 current

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gain α2 of Q2 increases and base current IB2 causes the
existence of collector current
 This amplified current Ic2 serves as the base current IB1 of
transistor Q1
 With the flow of IB1collector current IC1=β1 IB1=β1β2 Ig of
Q1 comes into existence
 Currents IB1 and IC1 leads to the establishment of emitter current Ia of
Q1 and this cause current gain α1 to rise as desired
 Now current Ig+Ic1 = (1+β1β2)Ig act as the base current of Q2 and
therefore its emitter current Ik=Ic1+Ig rise
 As amplified collector current Ic2 is equal to the base current of Q1,
current gain α1 eventually rises further


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There is thus established a regenerative action internal to the device
This regenerative or positive feedback effect causes α1 + α2 to grow
towards unity
 As a consequence, anode current begins to grow towards a larger value
limited only by load impedance external to the device
 When regeneration has grown sufficiently, gate current can be
withdrawn
 Even after Ig is removed regeneration continues
(ii) forward voltage triggering
 If the forward anode to cathode voltage is increased the collector
to emitter voltages of both the transistors are also increased
 As a result the leakage current at the middle junction J2 of
thyristor increases which is also the collector current of Q2 as
well as Q1 TRACE KTU
 With increase in collector currents Ic1 and Ic2 due to avalanche
effects the emitter currents of the two transistors also increases
causing α1 + α2 to approaches unity
 This leads to the switching action of the device due to regenerative
action

(iii) dv/dt triggering
 The reverse biased junction J2 behaves like a capacitor because of
the space charge present there
 Let the capacitance of the junction be Cj
 For any capacitor, i=C*dv/dt
 In case it is assumed that entire forward voltage Va appears across
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reverse biased junction J2,
 Then charging current across the junction is given by
i=Cj*(dVa/dt)
 This charging or displacement current across junction J2 is
collector current of Q2 and Q1
 Currents Ic2 and Ic1 will induce emitter current in Q2, Q1
 In case rate of rise of anode voltage is large, the emitter current
will be large and as a result α1 + α2 will approaches unity
(iv) temperature triggering
 At high temperature, the forward leakage current across
junction J2 rises
 This leakage current serves as the collector junction current
of the component transistors Q1 and Q2
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 Therefore an increase in leakage current Ic1, Ic2 leads to an
increase in the emitter currents of Q1, Q2
 As a result α1 + α2 approaches unity
 Consequently switching action of thyristor takes place

(v) light triggering
 When light is thrown on silicon, the electron hole pairs
increases
 In the forward biased thyristor, leakage current across
J2increases which eventually increases α1 + α2 to unity
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Series and parallel connection of SCR
 For some industrial applications, the demand for voltage and
current ratings is so high that a single SCR cannot fulfill such
requirements
 In such cases SCRs are connected in series in order to meet the H.V
demand and in parallel to meet the high current demand
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 For series or parallel connected SCR it should be ensure that
each SCR rating is fully utilized and the system operation is
satisfactory
 String efficiency is a term that is used for measuring the
degree of utilization of SCRs in a string

 In practice this ratio is less than one
 For obtaining highest possible string efficiency, the SCRs
connected in series / parallel string must have identical V-I
characteristics
 As SCRs of same ratings and specifications do not have
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identical characteristics, unequal voltage/ current sharing is
bound to occur for all SCRs in a string
 As a consequence string efficiency can never be equal to one
 However unequal voltage/ current sharing by the SCRs in a
string can be minimized to a great extend by using external
equalizing circuits
 Even this equalizing circuits, the efficiency is less than unity
 For a given system if one extra unit is added to the series /
parallel string, the voltage / current shared by each device
would become lower than its normal rating
 The use of voltage / current shared by each device would
become lower than its normal rating
 TRACE KTU
The use of this extra unit will certainly improve the
reliability of the string though at an increased cost
 A measure of the reliability of the string is given by a factor
called DRF – derating factor
 DRF=1- string efficiency

Series operation
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Series operation
 When system voltage is more than the voltage rating of a single
thyristor, SCRs are connected in series in a string
 As stated before, these SCRs should have their V-I characteristics
as close as possible
 Consider 2 SCR with their V-I characteristics
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 For SCR1 leakage resistance is high (=V1/Io)
 For SCR2 it is low (V2/Io)
 For the same leakage current Io in the series connected SCRs,
SCR1 support rated voltage whereas SCR2 support voltage
V2<V1
 Two SCR can support a maximum voltage of V1+V2 and not the
rated blocking voltage 2V1
 The string efficiency for two series connected SCRs
 A uniform voltage distribution in steady state can be achieved by

connecting a suitable resistance across each SCR such that each
parallel combination has the same resistance
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 This will require different values of resistance for each SCR which
is a difficult proposition
 A more practical way of obtaining a reasonably uniform voltage
distribution during steady state working of series connected SCR
is to connect the same value of shunt resistance R across each SCR
 This shunt resistance R is called the static equalizing circuit

 Let there be ns thyristors in the string
 The off state current of thyristor T1 be ID1 and that of other
thyristor are equal such that ID2= ID3=IDn and ID1<ID2
 Because thyristor T1 has the least off state current T1 shares
higher voltage
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 If I1 is the current through the resistor R across T1 and the
current through other resistors are equal so that I2=I3=In
 The off –state current spread is

 The voltage acrossT1 isVD1 = R*I1
 Using Kirchhoff's voltage law
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 Solving above equation for the voltage VD1
 A derating factor that is normally used to increase the reliability of

the string is defined as the

Parallel operation
 When thyristors are connected in parallel, the load current is
not shared equally due to different in their characteristics
 If a thyristor carries more current than that of the others, its
power dissipation increases thereby increasing the junction
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temperature and decreasing the internal resistance
 This in turn increases its current sharing and may damage the
thyristor
 This internal runaway may be avoided by having a common
het sink , so that all units operate at same temperature
 A small resistance may be connected in series with each
thyristor to force equal current sharing
 But there may be considerable power loss in the series
resistance
 A common approach for the current sharing of thyristors is
to use magnetically coupled inductors
 If the current through thyristor T1 increases a voltage of
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opposite polarity can be induced in the winding of thyristor
T2 and the impedance through the path of T2 can be
reduced, thereby increasing the current flow through T2

Power semiconductor diode
 Power semiconductor diode is the “power level” counter part of the
“low power signal diodes”
 These power devices, however, are required to carry up to several KA
of current under forward bias condition and block up to several KV
under reverse biased condition.
 TRACE KTU
That is the construction of power diodes arises from the need to make
them suitable for high-voltage and high-current applications.
 These extreme requirements call for important structural changes in a
power diode which significantly affect their operating characteristics.
 The practical realization and resulting structure of a power diode is
shown

Power semiconductor diode – structure
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Circuit symbol, photograph and cross sectional view of a power
diode

 It consist of heavily doped n+ substrate
 On this substrate, a lightly doped n- layer is epitexially grown
 Now a heavily doped p+ layer is diffused into n- layer to
form the anode of the power diode
 This shows that n- layer is the basic structural feature not

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found in signal diodes
The function of n- layer is to absorb the depletion layer of the
reverse biased p+ n- junction J1
 The breakdown voltage needed in a power diode governs the
thickness of n- layer
 Greater the breakdown voltage, more the n- layer thickness

 The drawback of n- layer is to add significant ohmic
resistance to the diode when it is conducting a forward
current
 This leads to large power dissipation in the diode
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 So proper cooling arrangements in large diode ratings are
essential
 Circuit symbol of a power diode is same as that of a signal
diode

Power semiconductor diode - Chara.
 Power diode is a two terminal, p-n semiconductor device
 The two terminals of diode are called, anode and cathode
 The two important characteristics of diode are
1) DiodeV-I characteristics
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2) Diode reverse recovery characteristics

DiodeV-I characteristics
 When anode is positive w.r.t cathode, diode is said to be
forward biased
 With increase of the source voltage Vs from zero value,
initially diode current is zero
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 From Vs =0 to cut in voltage, the forward diode current is
very small
 Cut in voltage is also known as, threshold voltage or turn on voltage
 Beyond cut in voltage, the diode current rises rapidly and the
diode is said to conduct

 For silicon diode, the cut in voltage is around 0.7 V
 When diode conducts, there is a forward voltage drop of the
order of 0.8 to 1V
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 When cathode is positive w.r.t anode, the diode is said to be
reverse biased
 In the reverse biased condition a small reverse current called
leakage current of the order of microamperes or mill amperes
flows

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The leakage current is almost independent of the magnitude of
reverse voltage until this voltage reaches breakdown voltage
 At this reverse breakdown, voltage remains almost constant but
reverse current becomes quite high, limited only by the external
circuit resistance
 A large reverse breakdown voltage, associated with high reverse
current leads to excessive power loss that may destroy the diode

 This shows that reverse breakdown of a power diode must be
avoided by operating it below the specific peak reverse
repetitive voltage VRRM
 For an ideal diode, the voltage drop across conducting diode
is zero andVRRM is infinite

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Diode manufactures also indicate the value of peak inverse
voltage (PIV) of a diode
 This is the largest reverse voltage to which a diode may be subjected
during its working
 The power diodes are available with forward current rating
of 1A to several thousands of ampere with reverse voltage
rating of 50V to 5000V or more
Diode reverse recovery characteristics
 After the forward diode current decays to zero, the diode
continues to conduct in the reverse direction because of the
presence of stored charges in the depletion region and the
semiconductor layers
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 The reverse current flows for a time called reverse recovery time
trr
 The diode regain its blocking capability until reverse recovery
current decays to zero
 Is defined as the time between the instant forward diode current becomes
zero and the instant reverse recovery current decays to 25% of its reverse
peak value IRM

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Reverse recovery characteristics

 The reverse recovery time is composed of two segments time
ta and tb, i.e. trr=ta+tb
 Time ta is the time between zero crossing of forward current
and peak reverse current IRM
 During ta, charge stored in depletion layer is removed
 TRACE KTU
tb- is measured from the instant of reverse peak value IRM to
the instant when 0.25IRM is reached
 During tb charge from the semiconductor layer is removed
 The shaded area represent the stored charge, or reverse
recovery charge QR which must be removed during the
reverse recovery time trr

 The ratio tb/ta is called the softness factor or S - factor
 Its usual value is unity and this indicate low oscillatory
reverse recovery process
 A diode with S-factor unity is called soft-recovery diode
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 And a diode with S factor <1 is called snappy recovery diode
or fast recovery diode
 The peak inverse current can be expressed as

 If trr=ta

TRACE
With ta=trr, we get
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Power semiconductor diode- Types
General purpose diode
 High reverse recovery time, order of 25 micro sec
 Current rating from 1A to several thousands of ampere
 Voltage rating – 5V to 5kV
 Application – battery charging, electric traction, electroplating,
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welding, UPS etc..
Fast-recovery diode
 Low reverse recovery time of about 5 micro sec
 Application – chopper, commutation circuit, SMPS, induction
heating etc…
 Current rating from 1A to several thousands of ampere
 Voltage rating – 50V to 3kV
Power semiconductor diode- Types
Schottky diode
 Use metal-to-semiconductor junction for rectification
 The metal is usually aluminum
 Low cut in voltage
 Higher reverse leakage current
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 Higher operating frequency
 ReverseVoltage rating – 100V
 Forward current rating – 1A to 300A
 Applications – high frequency instrumentation, switching
power supplies

TRIAC
 An SCR is a unidirectional device an it can conduct from anode to
cathode only and not from cathode to anode
 ATRIAC can conduct in both the directions
 TRIAC – bidirectional thyristor with three terminals
 Extensively used for the control of power in ac circuits (residential
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lamp dimmers, heater control, speed control of small single phase
series and IM)
 The word derived form combing the capital letters from the word
TRIode and AC
 When in operation, a TRIAC is equivalent to two SCRs connected in
anti-parallel
 The circuit symbol and characteristics are shown

TRIAC
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TRIAC
 As TRIAC can conduct in both the direction, the terms anode
and cathode are not applicable to TRIAC
 Its three terminal are usually designated as
MT1 – Main Terminal 1
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MT2 – Main Terminal 2
G - Gate
 Cross sectional view of TRIAC showing
all the layers and junction is shown

TRIAC
 The gate G is near terminal MT1
 The cross hatched strip shows that G is connected to N3 as
well as P2
 MT1 is connected to P2 and N2
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 MT2 is connected to P1 and N4

TRIAC
 Since TRIAC is a bidirectional device and can have its
terminals at various combinations of +ve and –ve voltages,
there are 4 possible electrode potential combinations as given
below
1) MT2 is +ve w.r.t MT1, G +ve w.r.t MT1
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2) MT2 is +ve w.r.t MT1, G -ve w.r.t MT1
3) MT2 is -ve w.r.t MT1, G -ve w.r.t MT1
4) MT2 is -ve w.r.t MT1, G +ve w.r.t MT1
 Trigeering sensitivity is highest – for combination 1 &3
 For bidirectional control and uniform gate trigger – 2 & 3
used
 4 usually avoided
TRIAC
Mode – 1(MT2 is +ve w.r.t MT1, G +ve w.r.t MT1)
 When MT2 is +ve w.r.t MT1 – junction P1N1, P2N2 are
forward biased
 Junction N1P2 reverse biased
 When G is +ve w.r.t MT1-
gate current flows mainly through P2N2
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 When gate current has injected sufficient
charges into P2 layer, reverse biased junction
N1P2 breaks down
 As a result TRIAC starts conducting through -
P1N1P2N2
 TRIAC operates in the first quadrant
TRIAC
Mode – 2 (MT2 is +ve w.r.t MT1, G -ve w.r.t MT1)
 When G is –ve w.r.t MT1, gate current flows through P2N3
 N1P2 – forward biased
 Conduction through – P1N1P2N3
 With the above conduction,
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voltage drop across this path falls
but P2N3 rises towards MT2
 A potential gradient exist across P2
 Left hand region become higher potential
than right hand region
 Current (shown in dotted line) established

TRIAC
 As a result right hand portion P1N1P2N2 begins to conduct
 The device structure P1N1P2N3 regarded as – pilot SCR
 P1N1P2N2- main SCR
 Device with MT2 +ve and G –ve is less sensitive
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 Therefore more gate current is required

TRIAC
Mode 3 (MT2 is -ve w.r.t MT1, G -ve w.r.t MT1)
 N3 act as a remote gate
 Gate current flows from – P2 to N3
 Reverse biased junction – N1P1 is broken
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 Finally P2N1P1N4 is turned on completely
 Operation is in 3rd quadrant
 Device is more sensitive under this condition

TRIAC
Mode 4 (MT2 is -ve w.r.t MT1, G +ve w.r.t MT1)
 Gate current forward biases junction – P2N2
 N2 inject electrons into P2 layer (shown by dotted arrows)
 As a result reverse biased junction
N1P1 breaks down
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 The structure P2N1P1N4 is completely
turned on
 Current after turn on is limited by
external load
 Device is less sensitive
 Operation is in 3rd quadrant

Triggering circuit for TRIAC
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GTO (Gate Turn Off thyristor)
 Conventional thyristirs (CTs) are nearly ideal switches for
their use in power electronic application
 These can be easily turned on by positive gate current
 Once in the on state, gate loses control

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CTs can now be turned off by expensive and bulky
commutation circuitry
 This shortcoming of thyristors limit their use up to about
1KHz applications
 These drawbacks in thyristors has led to the development of
GTOs

GTO
 GTO is a more versatile power semiconductor device
 Like a CT but with added features in it
 Can be easily turned off by a –ve gate pulse of appropriate
amplitude
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 GTO – pnpn device that can be turned on by a +ve
gate current and turned off by a –ve gate current at
its gate cathode terminal
 Self turn off capability of GTO makes it the most
suitable device for inverter and chopper circuit

GTO – Basic Structure
 pn pn three terminal device with Anode (A) cathode (K) and
gate (G)
 Four layers are – p+ n p+ n+
 Anode is made up of n+ type diffused into p+ layer
 anode shorted GTO and buffer layer GTO structure shown
below TRACE KTU

GTO – Turn on process
 Turned on by applying a +ve gate current
 As GTO is forward biased, regeneration process starts as in a
CT
 Current gains, α1, α2 begins to rise
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 When α1 + α2 = 1, saturation level is reached and GTO is
turned on
 The anode current Ia is then limited by load impedance

GTO – Turn off process
 Two transistor model is analyzed for understanding the turn
off process in a GTO
 Ic2 = β2 . IB2
 Ic1 = β1 . IB1


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Ic1 = α1 . IE1
Ic2 = α2 . IE2
 As stated above, for initiating the
turn off process in GTO a –ve
gate current is applied across gate
cathode terminal

 Now KCL at node M gives,
IC1-Ig‟-IB2=0
IB2= IC1-Ig‟= α1 . Ia – Ig’
Ia = IC1+IC2
IC2=Ia-IC1 = (1- α1 ) . Ia
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 When saturation in Q2 has occurred,
IB2= (Ic2/β2)
 For initiating the turn off process,
Q2 must be brought out of saturation
 This can be accomplished only if IB2 is made less than Ic2/β2

 When IB2 < (Ic2/β2), Q2 would shift to active region and
regenerative action would eventually turn off the GTO
 The turn off gain is defined as the ratio of anode current Ia to
gate current Ig‟ needed to turn off the GTO
 Turn – off gain βoff = Ia/ Ig‟ = α2/(α1+α2-1)
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Turn off action of GTO
 Ia=Ik and Ig‟ more than Ik
 When –ve gate current Ig‟ flows between gate – cathode
terminals net base current (IB2- Ig‟) is reversed
 Excess carriers are drawn from base p+ region of Q2 and
collector current IC1 of Q1 is diverted into the external gate
circuit
 This remove base drive of transistor Q2
 This further removes base current IB1 of transistor Q1
 And the GTO is eventually turned off
 Low value of negative gate current requires, low value of α1
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and high value of α2

GTO – Switching performance
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Gate turn On
 Turn on process in a GTO is similar to that of a conventional
SCR
 Turn time is made up of delay time, rise time and spread
time
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 Some manufactures advise that, even after GTO is on, a
continues gate current, called back porch current Igb should
be applied during the entire on period of GTO

Gate turn Off
 Before the initiation of turn-off process, a GTO carries a
steady current Ia
 The turn off time tq is sub divided into three different
periods
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Storage period (ts)
Fall period (tf)
Tail period (tt)
 Initiation of turn off process begins as soon as negative gate
current begins to flow

 During storage period anode current Ia and anode voltage Va
remains constant
 Termination of the storage period indicated by a fall in anode
current and rise in anode voltage
 The interval in which anode current falls rapidly – fall time
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 After tf, anode current and voltage moving towards their
turn off values for a time called tail time

Comparison between GTO and Thyristor
Disadvantages Advantages
 Magnitude of latching and  Faster switching speed
holding current is more  Surge current capability is
 On state voltage drop and comparable with an SCR
associated loss is more  More di/dt rating at turn on
 Triggering
required is highTRACE KTU
gate current  GTO circuit configuration
has low size and weight
 Gate drive circuit losses are  Higher efficiency
more  Reduced acoustical and
 Reverse voltage locking electromagnetic noise due to
capability is less than forward elimination of commutation
voltage blocking capability chokes

Applications of GTO
 High performance drive system such as field oriented control
scheme used in rolling mills, robotics and machine tools
 Traction purpose because of their lighter weight
 Adjustable frequency inverter drives
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 at present GTO with ratings up to 5000 V and 3000 A are
available

GTO-Gate Drive Circuit
A GTO gate drive has to fulfill the following functions.
 Turn the GTO on by means of a high current pulse (IGM)
 Maintain conduction through provision of a continuous gate
current (IG, also known as the “back-porch current”).
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 Turn the GTO off with a high negative gate current pulse.
 Reinforce the blocking state of the device by a negative gate
voltage.

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 The ON and OFF pulses for a GTO is communicated to
individual gate units through fiber optic cables.
 These optical signals are converted to electrical signals by a
optical electrical converter.
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 These electrical signals through the control logic then
produces the ON and OFF signal for the out put stage which
in turn sends positive and negative gate current to the GTO.
 Depending on the requirement the control logic may also
supervise GTO conduction by monitoring the gate-cathode
voltage.
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 Any fault is relayed back via fiber optic cable to the master
control.
 Power supply for the Gate drive units are derived from a
common power supply through a high frequency SMPS
(Blocks A, B & C) arrangement.

 Fig shows the circuit implementation of the output stage.
 The top switch T1 sends positive gate pulse to the GTO gate.
 At the instant of turn on of T1 ,C2 acts almost as a short
circuit and the positive gate current is determined by the
parallel combination of R1 and R2.
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 However, at steady state only R1 determines the gate current
IG.
 The bottom switch T2 is used for biasing the GTO gate
negative with respect to the cathode.
 Since, relatively large negative gate current flows during turn
off, no external resistance is used in series with T2.

 Instead, the ON state resistance of T2 is utilized for this
purpose.
 In practice, a large number of switches are connected in
parallel to obtain the required current rating of T2.
 A low value resistance R3 is connected between gate and the
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cathode terminals of the GTO to ensure minimum forward
blocking voltage.

Power MOSFET
 Metal Oxide Semiconductor Field Effect Transistor
 Recent device developed by combining the areas of field
effect concept and MOS technology
 Three terminal called drain (D), source (S) and gate (G)
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Power MOSFET
 Arrow indicates the direction of electron flow
 MOSFET is a voltage controlled device
 Its operation depends on the flow of majority carriers only,
hence it is a uni-polar device
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 Power MOSFET are now finding increasing applications in
low power high frequency converters
 Power MOSFETs are of two type – n channel enhancement
MOSFET and p channel enhancement MOSFET
 n channel enhancement MOSFET is more common because
of higher mobility of electrons

Power MOSFET
 Structure of n channel MOSFET of low power rating is
shown below
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Power MOSFET
 On p substrate or body two heavily doped n+ region are
diffused
 An insulating layer of silicon dioxide is grown on the surface
 This insulating layer is etched in order to embed metallic
source and drain terminals

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n+ region makes in contact with drain an source terminals
 When gate circuit is open, junction between n+ region
below drain and p substrate is reverse biased by input voltage
VDD
 Therefore no current flows from drain to source and load

Power MOSFET
 When gate is made +ve w.r.t source an electric field is established
 Eventually induced –ve charges in the p substrate below SiO2
layer
 Causing p layer below gate to become induced n layer
 These –ve charges called electrons, from n channel between two
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n+ region and current can flow from drain to source as shown by
the arrow
 If VGS is made more +ve, induced n channel become more deep
and therefore more current flows from D to S
 This shows that drain current ID is enhanced by the gradual
increase of the gate voltage, hence the name enhancement
MOSFET
Power MOSFET
Basic structure of a n channel diffused MOS power MOSFET
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Power MOSFET – Characteristics
 The basic circuit diagram for n channel PMOSFET is shown
below
 The source is taken as common terminal, between input and
output of a MOSFET
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Transfer characteristics
 Variation of drain current ID as a function of gate source
voltage VGS
 Threshold voltage – VGST
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 Minimum +ve voltage between gate and source to induce n
channel
 For voltage belowVGST – device is in off state
 Magnitude ofVGST is of the order of 2 to 3V

Output characteristics
 Variation of drain current ID as a function of drain source
voltage VDS with VGS as a parameter
 For low values of VDS, the graph between ID - VDS is almost
linear
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 This indicates a constant value of on resistance RDS =VDS/ID
 For given VGS if VDS is increased output characteristics is
relatively flat, indicating drain current constant

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Output characteristics
Switching characteristics
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 At turn on, there is an initial delay tdn during which input
capacitances charges to gate threshold voltage VGST
 Here tdn is called – turn on delay time
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 There is further delay called tr – rise time
 Gate voltage rises toVGSP
 A voltage sufficient to drive the MOSFET into on state
 During tr, rain current rises from zero to full on current ID
 Thus total turn on time ton = tdn + tr

 As MOSFET is a majority carrier device, turn off process is
initiated soon after removal of gate voltage at time t1
 Turn off delay time, tdf, is the time during which input
capacitance discharges from overdrive gate voltage V1 toVGSP
The fall time tf, is the time during which input capacitances

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discharges form VGSP to threshold voltage
 During tf, drain current falls from ID to zero
 WhenVGS ≤VGST, PMOSFET turn off is complete

Power MOSFET – Applications
 High frequency switching application
 SMPS and inverter
 Available with 500 V, 140 A ratings
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Power MOSFET – Comparison with BJT
BJT MOSFET
 Bipolar  Uni-polar device
 Input impedance low  High input impedance
 Lower switching losses and
 Higher switching losses
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 Current controlled device
conduction losses
 voltage controlled device
 -ve temperature coefficient  +ve temperature coefficient
 Hot spot and secondary  Secondary breakdown does
breakdown occur in BJT not occur
 High voltage rating, more
 Available with rating up to conduction loss
1200 V, 800 A  500 V, 140 A

PMOSFET- Gate Drive
 MOSFET, being a voltage controlled device, does not require
a continuous gate current to keep it in the ON state.
 However, it is required to charge and discharge the gate-
source and the gate-drain capacitors in each switching
operation.
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 The switching times of a MOSFET essentially depends on the
charging and discharging rate of these capacitors.
 Therefore, if fast charging and discharging of a MOSFET is
desired at fast switching frequency the gate drive power
requirement may become significant.

PMOSFET- Gate Drive
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PMOSFET- Gate Drive
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PMOSFET- Gate Drive
 To turn the MOSFET on the logic level input to the inverting
buffer is set to high state so that transistor Q3 turns off and Q1
turns on.
 The top circuit of Fig (b) shows the equivalent circuit during turn
on.

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To turn off the MOSFET the logic level input is set to low state.
Q3 and Q2 turns on whole Q1 turns off.
 The corresponding equivalent circuit is given by the bottom
circuit of Fig (b)
 The switching time of the MOSFET can be adjusted by choosing a
proper value of RG.
 Reducing RG will incase the switching speed of the MOSFET.

PMOSFET- Gate Drive
 However, caution should be exercised while increasing the switching speed
of the MOSFET in order not to turn on the parasitic BJT in the MOSFET
structure inadvertently.
 Since MOSFET on state resistance has positive temperature coefficient they
can be paralleled without taking any special precaution for equal current
sharing.
 To parallel two MOSFETs the drain and source terminals are connected

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together as shown in Fig(d).
However, small resistances (R) are connected to individual gates before
joining them together.
 This is because the gate inputs are highly capacitive with almost no losses.
Some stray inductance of wiring may however be present.
 This stray inductance and the MOSFET capacitance can give rise to
unwanted high frequency oscillation of the gate voltage that can result in
puncture of the gate qxide layer due to voltage increase during oscillations.
 This is avoided by the damping resistance R.
IGBT
 Developed by combining the best qualities of both BJT and
MOSFET
 Thus an IGBT posses high input impedance like MOSFET
and has low on state power loss as in BJT
 Free from secondary breakdown problem
 Also known as TRACE KTU
Metal Oxide Insulated Gate Transistor (MOSIGT)
Conductively Modulated Field Effect Transistor (COMFET)
Gain Modulated FET (GEMFET)
Insulted GateTransistor (IGT)

IGBT
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IGBT
Basic structure of an IGBT
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IGBT
 Body region and emitter is shorted to minimize possible turn
on of the thyristor.
 n+ buffer layer is between P+ and n- drift layer, is not
essential for the operation of the IGBT.
 (IGBT with buffer layer is called punch- through type, PT-
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IGBT‟s and without buffer layer is called non-punch through
type, NPT- IGBT‟s )
 Buffer layer improves the operation of IGBT.

IGBT - Device operation
Blocking state operation
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 Applied Collector emitter voltage is dropped across junction
J2 and only very small leakage current flows.
 Depletion region of the J2 junction extends principally into
the n- drift region ( since P type body region is more doped
than n- drift region)
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 Thickness of drift region is large enough to accommodate
depletion layer so that depletion layer boundary does not
touch P+ layer. So it can block reverse voltage ( magnitude
same as forward voltage)
 This type of IGBT is known as symmetrical IGBT or non-
punch through IGBT.
 This reverse voltage blocking capability is useful in some ac
circuit applications.
 If thickness of drift region is reduced , depletion layer may
touch P+ .To avoid that we keep a buffer layer, n+ layer.
This type of structure is called anti symmetric or punch

through IGBT .TRACE KTU
 Shorter drift region means lower on-state losses.
 Presence of buffer layer reverse voltage capability quite low.

On state operation
 Gate – emitter voltage increases to more than threshold
value , an inversion layer is formed beneath the gate of IGBT.
 This inversion layer shorts the n- drift region to the n+
source region exactly as in the MOSFET.
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 An electron current flows through this inversion layer which
in turn causes substantial hole injection from the P+ drain
contact layer in to n- drift region as shown in figure.
 The injected holes move across the drift region by both drift
and diffusion, taking a variety of path, and reach the p type
body region that surrounds the n+ source region.

 As soon as the holes are in the p type body region, their space
charge attracts electrons from the emitter metallization that
contacts the body region, and the excess holes are quickly
recombined.
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IGBT – Characteristics
V-I characteristics
 Output characteristics is the plot of Ic versusVCE
 Transfer characteristics – plot of Ic versusVGE
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Turn on and turn off characteristics are shown
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Turn on characteristics
 Turn on time is composed of two time called, delay time tdn
and rise time tr
 Delay time – time for the collector emitter voltage to fall
fromVCE to 0.9 VCE
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 Also defined as the time for collector current to rise from its
initial leakage current ICE to 0.1 IC
 Rise time – time during which collector emitter voltage falls
from 0.9 VCE to 0.1 VCE
 It is also defined as the time during which collector current
rises from 0.1Ic to its final value Ic

Turn off characteristics
 It consist of three intervals
 Delay time tdf, initial fall time tf1, final fall time tf2
 Delay time – time during which gate voltage fall from VGE to
threshold voltage VGET, the collector current from Ic to 0.9Ic
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 First fall time – time during which collector current falls
from 90 to 20% of its initial value Ic or collector emitter
voltage rises from VCES to 0.1 VCE
 Final fall time – time during which collector current falls
from 20 to 10% of Ic or collector emitter voltage rises from
0.1VCE to VCE

Comparison of IGBT with MOSFET
IGBT MOSFET
 Three terminal called,  Three terminal called,
gate, emitter and collector gate, source and drain
 High input impedance  High input impedance
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 Voltage controlled device  Voltage controlled device
 Can designed for higher  On state voltage drop and
voltage rating than losses rises rapidly than
PMOSFET IGBT with rise in
temperature

Module 2
Gate triggering circuits – R, RC, UJT triggering circuits
– natural and forced commutation (concept only).
Requirements of isolation and synchronization in gate drive
circuits- Opto and pulse transformer based isolation.
Controlled rectifiers – half-wave controlled rectifier with
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R load – 1-phase fully controlled bridge rectifier with R, RL
and RLE loads (continuous & discontinuous conduction) –
output voltage equation – 1- phase half controlled bridge
rectifier with R, RL and RLE loads – displacement power
factor – distortion factor.

Gate triggering circuits
 An SCR can be switched from off-state to on-state in several ways
1. Forward voltage triggering
2. dv/dt triggering
3. Temperature triggering
4. Light triggering
5. Gate triggeringTRACE KTU
 The instant of turning on the SCR cannot be controlled by first
three methods
 Light triggering used in some applications especially in series
connected string
 Gate triggering – most common method, efficient and reliable

Main features of firing circuits
 Gate control circuit is also called firing or triggering circuit
 Gate circuits are usually low power electronics circuits
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Main features of firing circuits
 A firing circuit should fulfill the following two functions
 If power circuit has more than one SCR, the firing circuit
should produce gating pulses for each SCR at the desired
instant for proper operation of the power circuit
 The control signal generated by a firing circuit may not be
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able to turn on an SCR. It is therefore common to feed the
voltage pulse to a driver circuit and then to a gate cathode
circuit

R triggering circuit (Resistance triggering)
 Simplest and most economical
 Suffer from a limited range of firing angle control (0 to 90 ͦ )
 R2 - variable resistance
 R – stabilizing resistance
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 In case R2=0, gate current
may flow from source,
trough load, R1, D and gate
to cathode

R triggering circuit
(Resistance triggering)
 This current should not exceed maximum permissible gate
current Igm
 R1 therefore found from the relation

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Function of R1 is to limit the gate current to a safe value as
R2 is varied
 Resistance R should have a value such that maximum voltage
drop across it does not exceed maximum possible gate
voltage Vgm

R triggering circuit (Resistance
triggering)
 This can happen only when R2 is zero
 Under this condition
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 As resistance R1, R2 are large, gate trigger circuit draws a
small current
 Diode D allows the flow of current during positive half cycle
only
 The amplitude of this dc pulse can be controlled by varying
R2

 The potentiometer setting R2 determines the gate voltage
amplitude
 When R2 is large current i is small and the voltage across
R,vg=i.R is also small
 AsVgp is less thanVgt, SCR will not turn on

across SCR
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Therefore load voltage vo=0, io=0 and supply voltage appear
 Trigger circuit consist of resistance only, therefore vg is in

phase with source voltage vs
 R2 is adjusted such that Vgp=Vgt, this gives the value of
firing angle as 90

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R triggering circuit (Resistance
triggering)
 The same circuit also is applicable for TRIAC.
 However, diode D1 has to be removed such that a trigger
signal will be available at the gate terminal during both half-
cycles.
 Because the gate of a TRIAC is not equally sensitive in all four
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of its modes of switching, α and hence vo are usually
different in the positive and negative half-cycles of the supply
voltage.

RC triggering circuit
 The limited range of firing angle control by resistance firing
circuit can be overcome by RC firing circuit
 Several variations of RC trigger circuits are available
 In these cases the range of α is extendable beyond 90.
RC half wave triggering circuit
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 By varying the value R, firing angle can be controlled from 0
to 180
 In the –ve half cycle capacitor C charges through D2 with
lower plate +ve to the peak supply voltage Vm at ωt=-90
 After ωt=-90, source voltage Vs decreasing from –Vm at
ωt=-90 to zero at ωt=0

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 During this period capacitor voltage may fall from -Vm to
some small value -oa
 Now the charging of the capacitor (with upper plate positive)
takes place through R and the charging rate depends on the
time-period RC.
 TRACE KTU
When capacitor charges to +ve voltage equal to VGT ,
conduction of the SCR takes place.
 After this capacitor holds a small +ve voltage
 Diode D1 used to prevent the breakdown of cathode to gate
junction through D2 during the –ve cycle

 where the angular frequency of ac mains ωt= 2π/T.
 The value of R is chosen such that the required IGT and VGT
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are supplied to the gate terminal:
 Where v is the voltage at the switching instant of thyristor

and vD is forward voltage drop of diode D1

RC Full wave triggering circuit
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 Diode D1-D4 form a full – wave diode bridge
 When capacitor charges to a voltage equal to Vgt, SCR
triggers and rectified voltage Vd appears across load as Vo
 The value of RC can be calculated by
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 R is given by

UJT triggering circuit
 Resistance and RC triggering circuits described above gives
prolonged pulses
 As a result power dissipation in the gate circuit is large
 At the same time, R and RC triggering circuits cannot be
used for automatic or feedback control system

circuits
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These difficulties can be overcome by use of UJT triggering
 An UJT is made up of an n-type silicon base to which p-type

emitter is embedded
 The n-type base is slightly doped whereas p-type is heavily
doped

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 The two ohmic contacts provided at each end are called base-one
B1 and base-two B2
 So an UJT is a three terminal device emitter, base one and base
two
 The emitter terminal divides the inter base resistance (VBB) into
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two parts (say, RB1 and RB2).
 If a dc biasing voltage (VBB) is applied across the base terminals,
the voltage in N-type material near emitter terminal (k) is given
by
 where η is called the intrinsic-standoff ratio of UJT and its value is

less than unity (typical value varies between 0.5 and 0.85).
 The UJT is highly efficient switch; its switching time is in the
range of nanoseconds
 Since UJT exhibit negative resistance characteristics, it can
be used as a relaxation oscillator
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 The external resistance R1 and R2 are small in comparison
with the internal resistances RB1 and RB2
 The charging resistance R should be such that its load line
intersect the device characteristics only in the –ve resistance
region
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 When source voltage VBB is applied, capacitor C begins to
charge through R exponentially towards VBB
 The time constant of the charge circuit is
 When this emitter voltage reaches peak-point voltage Vp, the

uni-junction between E-B1 breaks down
 As a result, UJT turns on and capacitor C rapidly discharges
through low resistance R1 with a time constant
 When emitter voltage decays to the valley-point voltage Vv,

emitter current falls below Iv and UJT turns off
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 The time T required for the capacitor C to charge from initial
voltage Vv to peak-point voltage Vp through large resistance
R can be obtained as

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 The charging of the capacitor starts from each zero crossover
instant only.
 The first pulse in each half-cycle that triggers the thyristor is
synchronized with v, and therefore α becomes equal in each
cycle.
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 By controlling R, the time period of oscillator (τ), or the
delay period of the first pulse (τ), α can be adjusted.
 The UJT trigger circuit may also be energized from a
separate transformer (for biasing) and the same performance
can be achieved.

Natural and forced commutation
 A thyristor can be turned ON by applying a positive voltage of
about a volt or a current of a few tens of milliamps at the gate-
cathode terminals.
 However, the amplifying gain of this regenerative device being in
the order of the 10^8, the SCR cannot be turned OFF via the gate
terminal.

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It will turn-off only after the anode current is annulled either
naturally or using forced commutation techniques.
 These methods of turn-off do not refer to those cases where the
anode current is gradually reduced below Holding Current level
manually or through a slow process.
 Once the SCR is turned ON, it remains ON even after removal of
the gate signal, as long as a minimum current, the Holding
Current, Ih, is maintained in the main or rectifier circuit.

Turn off dynamics of SCR
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 In all practical cases, a negative current flows through the device.
 This current returns to zero only after the reverse recovery time
trr, when the SCR is said to have regained its reverse blocking
capability.
 The device can block a forward voltage only after a further tfr, the
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forward recovery time has elapsed.
 Consequently, the SCR must continue to be reverse-biased for a
minimum of tfr + trr = tq, the rated turn-off time of the device.
 The external circuit must therefore reverse bias the SCR for a
time toff > tq. Subsequently, the reapplied forward biasing voltage
must rise at a dv/dt < dv/dt (reapplied) rated.

 SCRs have turn-off times rated between 8 - 50 μsecs.
 The faster ones are popularly known as 'Inverter grade'
and the slower ones as 'Converter grade' SCRs.
 The latter are available at higher current levels while the
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faster ones are expectedly costlier

The six distinct classes by which the SCR can be turned off are:
 Class A Self commutated by a resonating load
 Class B Self commutated by an L-C circuit
 Class C
 Class D
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C or L-C switched by another load carrying SCR
C or L-C switched by an auxiliary SCR
 Class E An external pulse source for commutation
 Class F AC line commutation

Class A Commutation:
Load commutation
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Class A Commutation:
Load commutation
 R is load resistance
 For low values of R, - R, L and C can be connected in series
 For high values of R – E and R are connected in parallel
 Essential requirement for both the circuit – overall circuit must be
under-damped

wave form
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When energized from dc source, current builds up like sinusoidal
 Current first rises to maximum value and then decreases

 When current decays to zero and tends to reverse, SCR T is
turned off
 Possible only in dc circuit
 Also called - resonant commutation, self commutation or load
commutation
Class B: Resonant pulse commutation
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 Source voltage Vs charges capacitor C to voltage Vs with left
hand plate +ve
 Main thyristor as well as auxiliary thyristor are off
 When T1 is turned on at t=0, constant current Io is is
established in the load circuit

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Up till time t1; ic=0, vc=Vs,io=Io iT1=Io
 For initiating the commutation of main thyristor T1, auxiliary
thyristor TA is gated at t=t1
 With TA on, a resonant current ic begins to flow from C
throughTA, L and back to C

 -ve sign is due to the fact that, this current flows opposite to the
reference +ve direction chosen for ic
 At t1; ic=0, vc=-Vs and iT1=Io
 Just after t2, ic tends to reverse ,TA is turned off at t2
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 With vc=-Vs, right hand plate has +ve polarity
 Resonant current ic now builds up through C, L, D and T1
 As this current ic grows opposite to forward thyristor current of
T1, net forward current iT1=Io-ic begins to decrease
 Finally when ic in the reversed direction attains the value Io,
forward current in T1 is reduced to zero and the device T1 is
turned off at t3
EE 305 Power Electronics
205 8/21/2017
Class C, C or L-C switched by another
load–carrying SCR
TRACE KTU

Class C, C or L-C switched by another
load–carrying SCR
 This configuration has two SCRs.
 One of them may be the main SCR and the other auxiliary.
 Both may be load current carrying main SCRs.
 The configuration may have four SCRs with the load across
the capacitor, with the integral converter supplied from a
current source. TRACE KTU
 Assume SCR2 is conducting. C then charges up in the polarity
shown.
 When SCR1 is triggered, C is switched across SCR2 via SCR1
and the discharge current of C opposes the flow of load
current in SCR2.

Class D, L-C or C switched by an
auxiliary SCR
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auxiliary SCR
 Class C can be converted to Class D if the load current is
carried by only one of the SCR‟s, the other acting as an
auxiliary turn-off SCR.
 The auxiliary SCR would have a resistor in its anode lead of
say ten times the load resistance.
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 SCRA must be triggered first in order to charge the upper
terminal of the capacitor as positive.
 As soon as C is charged to the supply voltage, SCRA will
turn off.

auxiliary SCR
 If there is substantial inductance in the input lines, the capacitor
may charge to voltages in excess of the supply voltage.
 This extra voltage would discharge through the diode-inductor-
load circuit.
 When SCRM is triggered the current flows in two paths: Load
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current flows through the load and the commutating current flows
through C- SCRM -L-D network.
 The charge on C is reversed and held at that level by the diode D.
 When SCRA is re-triggered, the voltage across C appears across
SCRM via SCRA and SCRM is turned off.

Class E – External pulse commutation
TRACE KTU

Class E – External pulse commutation
 A pulse of current is obtained from a separate voltage source to
turn off the conducting SCR
 The peak value of the current pulse must be more than the load
current
 Vs is the voltage of main source and V1 is the voltage of auxiliary
supply


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ThyristorT1 is conducting and load is connected to Vs
WhenT3 is turned on,V1,T3, L and C form an auxiliary circuit
 Therefore C is charged to a voltage +2V1and auxiliary current
falls to zero T3 gets commutated
 For turning off T1,T2 is turned on
 With T2 on, T1 is subjected to a reverse voltage, Vs-2V1 and T1 is
therefore turned off
 AfterT1 turned off, capacitor discharges through load
Class F : Line commutation
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Class F : Line commutation
 Can occur only when source is ac
 When SCR is energized from ac source, current has to pass
through its natural zero at the end of every +ve half cycle
 Then ac source apply a reverse voltage across SCR
automatically
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 As a result SCR turned off
 This is called natural commutation, because no external
circuit is employed to turn off the thyristor

Requirement of isolation and
synchronization in gate drive circuit
 Electrical isolation is required between logic-level control signal
and the drive circuit
 This is illustrated in case of a power BJT half-bridge converter
having single phase ac as input where one of the power terminal is
a grounded neutral wire
 The +ve dc bus is close to the ground potential during the -ve half

cycle of Vs
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And the –ve dc bus is near ground potential during the +ve half
cycle ofVs
 Under these conditions the emitter terminal of both BJTs must be
treated as hot w.r.t power neutral
 The logic level control signals are normally referenced w.r.t logic
ground, which is at the same potential as the power neutral since
the logic circuits are connected to the neutral by means of a safety
ground wire
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The basic way to provide electrical isolation are either by
 Opto-coupler
 Fiber optics or by
 Transformer
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Optocouplers
 Consist of a light emitting diode (LED), the output transistor
and a built in schmitt trigger
 A +ve signal from the control logic causes the LED to emit
light that is focused on the optically sensitive base region of a
photo transistor
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Optocouplers
 The light falling on the base region generate a significant number
of electron hole pair in the base region that causes the photo
transistor to turn on
 The resulting drop in voltage at the photo transistor collector
causes the schmitt trigger to change state
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 The output of the schmitt trigger is the optocoupler output and
can be used as the control input to the isolated drive circuit
 The capacitance between LED and the base of the receiving
transistor within the optocoupler should be as small as possible to
avoid retriggering at both turn on and turn off of the power
transistor due to the jump in the potential between the power
transistor emitter reference point and the ground of the control
electronics
Optocouplers
 To reduce this problem optocouplers with electrical shield
between the LED and the receiver transistor should be used
 As an alternative, fiber optic cables can be used to completely
eliminate this retriggering problem and to provide very high
electrical isolation and creepage distance
TRACE KTU
 When using fiber optic cables, the LED is kept on the printed
circuit board of the control electronics, and the optical fiber
transmits the signal to the receiver transistor which is put on
the drive circuit printed circuit board

Pulse transformer
 Instead of using optocouplers or fiber optic cables, the
control signal can be coupled to the electrically isolated drive
circuit by means of a transformer
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Pulse transformer
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Pulse transformer
 If the switching frequency is high and the duty ratio D varies
only slightly around 0.5, a baseband control signal of
appropriate magnitude can be applied directly to the primary
of a relatively small and light weight pulse transformer as in
(a)
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 And the secondary output can be used to either directly drive
the power switch or used as the input to an isolated drive
circuit
 As the switching frequency is decreased below the tens of
kilohertz range, a baseband control signal directly applied to
the transformer primary becomes impractical because the
size and weight of the transformer becomes increasingly
larger
Pulse transformer
 Modulation of a high frequency carrier by a low frequency
control signal enables a small high frequency pulse
transformer to be used for even low frequency control signal
 In fig.b. the control signal modulates a high frequency
oscillator output before being applied to the primary of a
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high frequency signal transformer
 Since a high frequency transformer can be made quite small,
it is easy to avoid stray capacitance between the input and
output winding and the transformer will be inexpensive
 The transformer secondary output is rectified and filtered
and then applied to the comparator and the rest of the
isolated drive circuit
Controlled rectifiers –
Principles of phase control
 the firing angle may defined as the angle between the instant
thyristor would conduct if it were a diode and the instant it is
triggered
 Is measured form the angle that gives the largest average
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output voltage or the highest load voltage
 It is also defined as the angle measured from the instant that
gives the largest output voltage to the instant it is triggered
 Angle measured from the instant SCR gets forward biased to
the instant it is triggered

Single phase half controlled
 Single phase half controlled rectifier with R load
 Single phase half controlled rectifier with R L load
 Single phase half controlled rectifier with R L load and
freewheeling diode
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 Single phase half controlled rectifier with R L E load
 Single phase half controlled rectifier with R L E load and
freewheeling diode

Single phase full controlled
 Single phase full controlled rectifier with R load
 Single phase full controlled rectifier with R L load (Continues
conduction)
 Single phase full controlled rectifier with R L load (Discontinues
conduction)
 Single phase full controlled rectifier with R L load and

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freewheeling diode
Single phase full controlled rectifier with R L E load (Continues
conduction)
 Single phase full controlled rectifier with R L E load (Discontinues
conduction)
 Single phase full controlled rectifier with R L E load and
freewheeling diode

Single phase semi converter
 Single phase semi-converter with R load
 Single phase semi-converter with R L load (Continues
conduction)
 Single phase semi-converter with R L load (Discontinues
conduction)


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Single phase semi-converter with R L load and freewheeling diode
Single phase semi-converter with R L E load (Continues
conduction)
 Single phase semi-converter with R L E load (Discontinues
conduction)
 Single phase semi-converter with R L E load and freewheeling
diode

Single phase half wave circuit with R
load
 The source voltage is
 An SCR can conduct only when anode voltage is +ve and a gate
signal is applied
 At some delay angle α, a +ve gate signal applied between gate and
cathode turns on the SCR


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Immediately full supply voltage is applied across the load
At the instant of angle α, Vo rises from zero to
 Thyristor remains on from ωt=α to π, (2π+α) to 3π etc…
 During this interval voltage across thyristor =0
 I is off from π to (2π+α), 3π to (4π+α) etc…
 During this interval voltage across thyristor has the wave shape of
supply voltage
load
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load
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load
 R.m.s. value of voltage is given by
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 The value of r.m.s current is

load
 Power delivered to resistive load = (rms load voltage)(rms
load current)
 Input volt amperes = (rms source voltage) (total rms line

current)
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 Input power factor

Single phase half wave circuit with RL
load
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load
 At ωt=α thyristor is turned on by gate signal
 The load voltage Vo at once become equal to the source voltage Vs
 But the inductance L forced the load, or output current io to rise
gradually
 After some time io reaches maximum value and then begin to

decrease
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At ωt=π, Vo is zero but io is not zero because of the load
inductance
 After ωt=π, SCR is subjected to reverse anode voltage but it will
not be turned off as load current io is not less than holding current
 At some angle β>π, io reduces to zero and SCR is turned off as it
is already reverse biased

load
 After ωt=β , vo=0 and io=0
 At ωt=2π+α, SCR is triggered again, vo is applied to the
load and load current develops as before
 Angle is called the extinction angle and is called the
conduction angle
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 The circuit turn off time
 The voltage equation for the circuit when T is on

load
 Average load voltage
 Average load current
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 Rms load voltage

load and freewheeling diode
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 The waveform of load current io can be improved by connecting a
freewheeling diode across the load
 A freewheeling diode is also called bypass diode or commutating
diode
 At ωt=0, source voltage becoming +ve

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At some delay angle α, forward biased SCR is triggered and
source voltageVs appears across the load asVo
 At ωt=π, source voltage Vs=0, and just after this instant as Vs
tends to reverse freewheeling diode FD is forward biased through
the conducting SCR
 As a result load current io is immediately transferred from SCR
to FD asVs tends to reverse

 At the same time SCR is subjected to reverse voltage and
zero current, it is therefore turned off at ωt=π
 It is assumed that during freewheeling period, load current
does not decays to zero until the SCR is triggered again at
(2π+α)
 TRACE KTU
Voltage drop across FD is taken as almost zero, the load
voltage vo is therefore zero during the freewheeling period
 SCR is reverse biased from ωt=π to ωt=2π
 Therefore circuit turn off time

 Operation of the circuit can be explained in two modes
 First mode – conduction mode
 SCR conduct from α to π, 2π+α to 3π and so on and FD is
reverse biased
 The duration of this mode is for [(π-α)/ω] sec
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 For conduction mode the voltage equation be
 Mode II – freewheeling mode

 Π to 2π+α, 3π to 4π+α etc…
 In this mode SCR is reverse biased from Π to 2π, 3π to 4π
etc…
 As the load current is assume continues, FD conducts from Π
to 2π+α, 3π to 4π+α etc… and so on
 The voltage equation for this mode

TRACE
Average load voltage is given by
KTU
 Average load current

The advantages of using FD are
 Input pf is improved
 Load current waveform is improved
 Load performance is better
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 As energy is stored in the inductor L is transferred to R
during the freewheeling period overall converter efficiency
improves

Single phase half wave circuit with RLE
load
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load
 The counter emf in the load may be due to battery or dc
motor
 The minimum value of firing angle is obtained form the
relation
 This is occur at an angle
 TRACE KTU
In case thyristor T is fired at an angle α<θ1, then E>Vs, SCR
is reverse biased and therefore it will not turn on
 Similarly maximum value of firing angle is θ2=π-θ1
 During the interval load current is zero and load voltage
V0=E
 And during the time io not zero, vo follows vs

load
 Voltage equation


TRACE
Average load current
KTU

Single phase fully controlled bridge
rectifier with R load
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 The output voltage waveform for a controlled full-wave
rectifier with a resistive load is shown in Fig.
 The average component of this waveform is determined from
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 Average output current
 Rms value of output voltage

 The power delivered to the load is a function of the input
voltage, the delay angle, and the load components; P =I^2
rms R is used to determine the power in a resistive load, where
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rectifier with RL load
Discontinues conduction
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 Load current for a controlled full-wave rectifier with an RL
load can be either continuous or discontinuous, and a
separate analysis is required for each.
 Starting the analysis at ωt = 0 with zero load current, SCRs
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S1 and S2 in the bridge rectifier will be forward-biased and
S3 and S4 will be reverse-biased as the source voltage
becomes positive.
 Gate signals are applied to S1 and S2 at ωt=α,turning S1 and
S2 on.
 With S1 and S2 on, the load voltage is equal to the source
voltage.
 Current function

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The above current function becomes zero at ωt=β.
 If β<π+α, the current remains at zero until ωt=π+α,
when gate signals are applied to S3 and S4 which are then
forward-biased and begin to conduct.
 This mode of operation is called discontinuous current,
which is illustrated in Fig. b.
Continues conduction
 If the load current is still positive at ωt=π+α, when gate
signals are applied to S3 and S4 in the above analysis, S3 and
S4 are turned on and S1 and S2 are forced off
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 Average output voltage
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 Rms value of voltage

rectifier with RLE load
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rectifier with RLE load
(Continues conduction)
 Average value of output voltage is given by

TRACE
Rms value (*square root of)
KTU

 A single phase semi converter bridge with two thyristor and
three diodes are shown
TRACE KTU

 The two thyristor are T1 and T2, and the two diode D1, D2
and third diode is connected across load as free wheeling
diode
 The load is of RLE type
 After ωt=0, thyristor T1 is forward biased only when source

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voltage exceeds E
ThusT1 is triggered at a firing angle α, such thatVm sinα >E
 With T1 on load get connected to source through T1 and D1
 For the period ωt= α to π, load current io flows through
RLE load, D1, source and T1
 And the load terminal voltage is same as source voltage

 Soon after ωt=π, load voltage Vo tends to reverse as the ac source
voltage changes polarity
 Just as Vo tends to reverse, FD gets forward biased and starts
conducting
 The load or output current io is transferred from T1, D1 to FD

ωt=π+
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As T1 is reverse biased at ωt=π+ through FD, T1 is turned off at
 The load terminal are short circuited through FD therefore load

or output voltage is zero during π< ωt< π+α
 After ωt= π, during –ve half cycle, T2 will be forward biased only
when the source voltage is more than E

 Semi converter with R load
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 Semi converter with RL load (continues conduction)
 Semi converter with RL load and free wheeling diode

 Semi converter with RLE load (continues conduction)

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Semi converter with RLE load and free wheeling diode

Module 3
3-phase half-wave controlled rectifier with R load – 3-phase

fully controlled & half-controlled converter with RLE load
(continuous conduction, ripple free) – output voltage
equation-waveforms for various triggering angles (no
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analysis) – 1-phase & 3-phase dual converter with & without
circulating current – four-quadrant operation

3 phase half-wave controlled rectifier
with R load
 The half-controlled bridge, or „„semi-converter,‟‟ is analyzed
by considering it as a phase-controlled half-wave circuit in
series with an uncontrolled half-wave rectifier.
 The average dc voltage is given by the following equation:
TRACE KTU

3 phase half-wave controlled rectifier
with R load
 Then, the average voltage VD never reaches negative values.
 The output voltage waveforms of the half-controlled bridge
are similar to those of a fully controlled bridge with a
freewheeling diode.
 The advantage of the free-wheeling diode connection, shown
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in Fig is that there is always a path for the dc current
independent of the status of the ac line and of the converter.
 This can be important if the load is inductive-resistive with a
large time constant, and there is an interruption in one or
more of the line phases.

3 phase fully controlled rectifier with
RLE load
 The output of the three-phase rectifier can be controlled by
substituting SCRs for diodes.
 Figure a shows a controlled six-pulse three-phase rectifier.
 With SCRs, conduction does not begin until a gate signal is
applied while the SCR is forward-biased.
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3 phase fully controlled rectifier with
RLE load
 Thus, the transition of the output voltage to the maximum
instantaneous line-to-line source voltage can be delayed.
 The delay angle is referenced from where the SCR would
begin to conduct if it were a diode.
The delay angle is the interval between when the SCR

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becomes forward-biased and when the gate signal is applied.
 Figure b shows the output of the controlled rectifier for a
delay angle of 45.
 Average output voltage

Dual converters
 Semi-converters are single quadrant converters
 this means that over the entire firing angle range, load voltage and
current have one polarity
 In full converters direction of current cannot reverse, because of
the uni-directional property of the SCRs but polarity of output
 TRACE KTU
voltage can be reversed
Thus a full converter operate as a rectifier in 1st quadrant and as an
inverter in 4th quadrant.
 This shows that a full converter can operate as a two quadrant
converter
 In the 1st quadrant power flow from ac source to dc load and in 4th
quadrant power flow from dc crcuit to ac source

Dual converters
 In case four quadrant operation is required without any
mechanical change over switch, two full converter can be
connect back to back to the load circuit
 Such an arrangement using two full converters in anti-
parallel and connected to the same dc load is known as a dual
converter TRACE KTU
 There are two functional modes of a dual converter
Circulating current mode
Non-circulating current mode

Dual converter without circulating
current
 With non-circulating current dual converter, only one
converter is in operation at a time and it alone carries the
entire load current
 Only this converter receives the firing pulses from the
trigger control
 TRACE KTU
The other converter is blocked from the conduction
 This is achieved by removing the firing pulses from this
converter
 Thus only one converter is in operation at a time where as
the other converter is idle

current
Single phase
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current
Three phase
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current
 Suppose converter 1 is in operation and is supplying the load
current
 For blocking converter 1 and switching on converter 2, first firing
pulses to converter 1 are immediately removed
 Or the firing angle of converter 1 is increased to maximum value

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and then its firing pulses are blocked
With this load current would decay to zero and then only
converter 2 is made to conduct by applying the firing pulses to it
 Now the current in converter 2 would build up through the load
in the reverse direction
 As long as converter 2 is in operation converter 1 is idle as firing
pulses are withdrawn from it
current
 It should be ensure that during changeover from one
converter to another the load current must decays to zero
 After the outgoing conductor has stopped conducting, a delay
time of 10 to 20 msec is introduced before the firing pulses
are applied to switch on the incoming converter
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 This time delay ensure reliable communication of SCRs in
the outgoing converter
 If the incoming converter is triggered before the outgoing
converter has been completely turned-off, a large circulating
current would flow between two converters

Dual converter with circulating current
Single phase
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Three phase
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 In the circulating current mode of dual converter, a reactor is
inserted in-between converter 1 and 2
 This reactor limit the magnitude of circulating current to a
reasonable value
 The firing pulses of the two converter is adjusted that=180

is 120 TRACE KTU
If firing angle of converter 1 is 60 then firing angle of converter 2
 Therefore for these firing angle the converter 1 is working as

rectifier and converter 2 as inverter
 Though the output voltage at terminals of both converter 1 and 2
has same polarity and also same average value
 However the instantaneous output voltage wave form is not
similar
 As a consequence of it circulating current flows between two
converters
 If the load current is to be reversed, the role of two
converters is interchanged
 The main disadvantages of this converter are
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 A reactor is required to limit the circulating current
 Circulating current give rise to more losses
 As the converter has to handle load as well as circulating
current the thyristor for the two converters are rated for
higher current

Module 4
Inverters – voltage source inverters– 1-phase half-bridge &
full bridge inverter with R & RL loads – THD in output
voltage – 3-phase bridge inverter with R load – 120° & 180°
conduction mode – current source inverters.
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Inverters
 Inverters are circuits that convert dc to ac. More precisely,
inverters transfer power from a dc source to an ac load.
 Inverters are used in applications such as adjustable-speed ac
motor drives, uninterruptible power supplies (UPS), and
running ac appliances from an automobile battery.
 TRACE KTU
For sinusoidal ac outputs, the magnitude, frequency, and
phase should be controllable. According to the type of ac
output waveform, these topologies can be considered as
 voltage source inverters (VSIs),
 current source inverters (CSIs),

Voltage source inverters – single phase
 Single-phase voltage source inverters (VSIs) can be found as
 half-bridge and
 full-bridge topologies.
 Although the power range they cover is the low one, they are
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widely used in power supplies, single-phase UPSs, and
currently to form elaborate high-power static power
topologies, such as for instance, the multi-cell configurations

Single phase half bridge VSI
 Two large capacitors are required to provide a neutral point N,
such that each capacitor maintains a constant voltage vi=2.
 Because the current harmonics injected by the operation of the
inverter are low-order harmonics, a set of large capacitors (C+
and C-) is required.
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 It is clear that both switches S+ and S- cannot be on
simultaneously because a short circuit across the dc link voltage
source vi would be produced.

 There are two defined (states 1 and 2) and one undefined
(state 3) switch state as shown in Table.
 In order to avoid the short circuit across the dc bus and the
undefined ac output voltage condition, the modulating
technique should always ensure that at any instant either the
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top or the bottom switch of the inverter leg is on.

TRACE KTU

Single phase full bridge VSI
 This inverter is similar to the half-bridge inverter; however, a
second leg provides the neutral point to the load.
 As expected, both switches S1+ and S1- (or S2+ and S2-)
cannot be on simultaneously because a short circuit across
the dc link voltage source vi would be produced.
TRACE KTU

 There are four defined (states 1, 2, 3, and 4) and one
undefined (state 5) switch states as shown in Table
TRACE KTU

 The undefined condition should be avoided so as to be always
capable of defining the ac output voltage.
 In order to avoid the short circuit across the dc bus and the
undefined ac output voltage condition, the modulating technique
should ensure that either the top or the bottom switch of each leg
is on at any instant.
 TRACE KTU
It can be observed that the ac output voltage can take values up to
the dc link value vi , which is twice that obtained with half-bridge
VSI topologies.
 Several modulating techniques have been developed that are
applicable to full-bridgeVSIs.
 Among them are the PWM (bipolar and unipolar) techniques

TRACE KTU

Three phase bridge inverter
 Single-phase VSIs cover low-range power applications and
three-phase VSIs cover the medium- to high-power
applications.
 The main purpose of these topologies is to provide a three-
phase voltage source, where the amplitude, phase, and
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frequency of the voltages should always be controllable.
 Although most of the applications require sinusoidal voltage
waveforms (e.g., ASDs, UPSs, FACTS, var compensators),
 Arbitrary voltages are also required in some emerging
applications (e.g., active filters, voltage compensators).

 The standard three-phase VSI topology is shown in Fig. and
the eight valid switch states are given in Table
TRACE KTU

 As in single-phase VSIs, the switches of any leg of the inverter
(S1 and S4, S3 and S6, or S5 and S2) cannot be switched on
simultaneously because this would result in a short circuit
across the dc link voltage supply.
TRACE KTU

 Similarly, in order to avoid undefined states in the VSI, and
thus undefined ac output line voltages, the switches of any
leg of the inverter cannot be switched off simultaneously as
this will result in voltages that will depend upon the
respective line current polarity.
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 The eight valid states, two of them (7 and 8 in Table) produce
zero ac line voltages.
 In this case, the ac line currents freewheel through either the
upper or lower components.

 The remaining states (1 to 6 in Table) produce nonzero ac
output voltages.
 In order to generate a given voltage waveform, the inverter
moves from one state to another.
 Thus the resulting ac output line voltages consist of discrete
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values of voltages that are vi , 0, and -vi for the topology
shown in Fig.
 The selection of the states in order to generate the give
waveform is done by the modulating technique that should
ensure the use of only the valid states.

Three phase bridge inverter – 120 ͦ
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Three phase bridge inverter – 180 ͦ
TRACE KTU

TRACE KTU

Current source inverters
 The main objective of these static power converters is to produce
ac output current waveforms from a dc current power supply.
 For sinusoidal ac outputs, its magnitude, frequency, and phase
should be controllable.
 Due to the fact that the ac line currents ioa, iob, and ioc (Fig. CSI)
TRACE KTU
feature high di=dt, a capacitive filter should be connected at the ac
terminals in inductive load applications (such as ASDs).
 Thus, nearly sinusoidal load voltages are generated that justifies
the use of these topologies in medium-voltage industrial
applications, where high-quality voltage waveforms are required.
 Although single-phase CSIs can in the same way as three-phase
CSIs topologies be developed under similar principles,
TRACE KTU

 Only three-phase applications are of practical use and are analyzed
in the following.
 In order to properly gate the power switches of a three phase CSI,
two main constraints must always be met:
(a) the ac side is mainly capacitive, thus, it must not be short
circuited; this implies that, at most one top switch (1, 3, or 5) and
TRACE KTU
one bottom switch (4, 6, or 2) should be closed at any time; and
(b) the dc bus is of the current-source type and thus it cannot be
opened; therefore, there must be at least one top switch (1, 3, or
5) and one bottom switch (4, 6, or 2) closed at all times.
 Note that both constraints can be summarized by stating that at
any time, only one top switch and one bottom switch must be
closed.
 There are nine valid states in three-phase CSIs.

 The states 7, 8, and 9 produce zero ac line currents.
 In this case, the dc link current freewheels through either the
switches S1 and S4, switches S3 and S6, or switches S5 and S2.
 The remaining states (1 to 6 in Table 14.4) produce nonzero ac
output line currents.
 TRACE KTU
In order to generate a given set of ac line current waveforms, the
inverter must move from one state to another.
 Thus, the resulting line currents consist of discrete values of
current, which are ii , 0, and -ii.
 The selection of the states in order to generate the given
waveforms is done by the modulating technique that should ensure
the use of only the valid states.
TRACE KTU

Module 5
Voltage control in inverters – Pulse Width Modulation –
single pulse width, multiple pulse width & sine PWM –
modulation index & frequency modulation ratio.
AC voltage controllers (ACVC) – 1-phase full-wave
TRACE KTU
ACVC with R, & RL loads – waveforms – RMS output
voltage, input power factor with R load – sequence control
(two stage) with R load

Voltage control in Inverters
 In many industrial applications, to control the output voltage
of the inverter is often necessary
 To cope with the variations of the dc input voltage
 To regulate voltages of inverter
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 To satisfy the constant volt and frequency control
requirements
 There are various techniques to vary the inverter gain
 The most efficient method of controlling the gain (and
output voltage) is to incorporate PWM control within the
inverters

Voltage control in Inverters
The commonly used techniques are
 Single-pulse-width modulation
 Multiple-pulse-width modulation
 Sinusoidal-pulse-width modulation
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 Modified Sinusoidal-pulse-width modulation
 Phase displacement control

Single-Pulse-width modulation
TRACE KTU

 In single pulse width modulation, there is only one pulse per half-
cycle and the width of the pulse is varied to control the inverter
output voltage
 The gating signal are generated by comparing a rectangular
reference signal of amplitude Ar with a triangular carrier wave of
amplitude Ac
 TRACE KTU
The frequency of the reference signal determine the frequency of
the output voltage
 The ratio of Ar to Ac is the control variable and defined as the
modulation index
 The amplitude modulation index or simply modulation index
M=Ar/Ac

 The rms output voltage can be found from
 By varying Ar from 0 to Ac, the pulse width δ can be modified

from 0 ͦ to 180 ͦ and the rms output voltageVo from 0 to Vs
TRACE KTU
 The Fourier series of the output voltage
 Due to the symmetry of the output voltage along the x-axis the
even harmonics are absent
 The harmonic profile with variation of modulation index is
shown
 The dominant harmonic is the 3rd harmonics
TRACE KTU

Multiple-Pulse-width modulation
TRACE KTU

 The harmonics content can be reduced by using several
pulses in each half-cycle of output voltage
 The gate signal is generated by comparing a reference signal
with a triangular carrier wave
 The frequency of the reference signal sets the output
TRACE KTU
frequency fo and the carrier frequency fc determine the
number of pulses per half cycle
 The modulation index control the output voltage
 This type of modulation is also known as uniform pulse
width modulation (UPWM)
 The number of pulses per half cycle is found from

 Where mf=fc/fo I defined as the frequency modulation ratio
 If is the width of each pulse, the rms value of output voltage
can be found from

TRACE KTU
The variation of the modulation index M from 0 to 1 varies
the pulse width d from 0 to T/2p (0 to π/p)
 And the rms output voltage Vo from 0 toVs
 The general form of a Fourier series for the instantaneous
output voltage is

 The coefficient Bn can be determined by considering a pair
of pulses such that the +ve pulse of duration δ starts at
ωt=α and the –ve one of the same width starts at ωt=π+α
TRACE KTU

Sinusoidal-Pulse-Width modulation
TRACE KTU

 Instead of maintaining the width of all pulses the same as in the
case of multiple pulse width modulation, the width of each pulse is
varied in proportion to the amplitude of a sine wave
 Gating signal are generated by comparing a sinusoidal reference
signal with a triangular carrier wave of frequency fc


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This SPWM is commonly used in industrial applications
Frequency of reference signal fr determines the inverter output
frequency fo
 Peak amplitude Ar controls the modulation index M, and then in
turn the rms output voltageVo
 The number of pulses per half cycle depends on the carrier
frequency
 It is easier to implement this method and is preferable
 The rms output voltage can be varied by varying the
modulation index M
 It can be observed that the are of each pulse corresponds to
approximately to the area under the sine wave between the
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adjacent midpoints of off periods on the gating signals
 If δm is the width of mth pulse, the average output voltage
can be written as

 The output voltage of an inverter contains harmonics
 The PWM pushes the harmonics into a high frequency range
around the switching frequency fc and its multiples, that is
around harmonics mf, 2mf, 3mf, and so on
 The frequencies at which the voltage harmonics occur can be
related by TRACE KTU
 Where nth harmonics equals the kth sideband of jth times the
frequency to modulation ratio mf
 To increase the fundamental output voltage, d must be
increase beyond 1.0 is called overmodulation

TRACE KTU

Modified-sinusoidal PWM
 From the SPWM technique it is seen that the width of pulses
nearer the peak of the sine wave do not change significantly
with the variation of modulation index
 This is due to the characteristics of a sine wave
 And the SPWM technique can be modified so that the carrier

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wave is applied during the first and 60 intervals per half cycle
This modified SPWM is shown
 The fundamental component is increased and its harmonic
characteristics are improved
 It reduces the number of switching of power devices and also
reduces the switching losses

Modified-sinusoidal PWM
TRACE KTU

AC Voltage controller
 An ac voltage controller is a converter that controls the voltage,
current, and average power delivered to an ac load from an ac
source.
 Electronic switches connect and disconnect the source and the
load at regular intervals.
 In a switching scheme called phase control, switching takes place
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during every cycle of the source, in effect removing some of the
source waveform before it reaches the load.
 Another type of control is integral-cycle control, whereby the
source is connected and disconnected for several cycles at a time.
 The phase-controlled ac voltage controller has several practical
uses including light-dimmer circuits and speed control of
induction motors.
 The input voltage source is ac, and the output is ac (although not
sinusoidal), so the circuit is classified as an ac-ac converter.
Single phase full wave AC voltage
controller with R load
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 A basic single-phase voltage controller is shown in Fig
 The electronic switches are shown as parallel thyristors (SCRs).
 This SCR arrangement makes it possible to have current in either
direction in the load.
 TRACE KTU
This SCR connection is called anti-parallel or inverse parallel
because the SCRs carry current in opposite directions.
 A TRIAC is equivalent to the anti-parallel SCRs.
 Other controlled switching devices can be used instead of SCRs.
 Here, load current contains both positive and negative half-cycles.

 The two SCRs cannot conduct simultaneously.
 The load voltage is the same as the source voltage when either
SCR is on.
 The load voltage is zero when both SCRs are off.
 The switch voltage Vsw is zero when either SCR is on and is equal

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to the source voltage when neither is on.
The average current in the source and load is zero if the SCRs are
on for equal time intervals.
 The average current in each SCR is not zero because of
unidirectional SCR current.
 The rms current in each SCR is 1/√2 times the rms load current
if the SCRs are on for equal time intervals.

 Let the source voltage be
 Switch S1 is in on for a duration of α to π and S2 is in on

condition from π+α to 2π
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 So the output voltage can be written as
 Hence the rms value of load voltage is

 If α=0, the load voltage become same as source voltage and
rms value is equal to source voltage rms value
 Rms current in the load and source is given by
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 And the power factor of the load is give by

 Pf=1 for α=0
 For α>0, pf will become <1
 The average source current is zero because of the half wave
symmetry
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 Average thyristor current is given by
 Rms current in each SCR is given by

controller with RL load
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 When a gate signal is applied to switch S1 at ωt=α, the
Kirchhoff's voltage law for the circuit can be expressed as
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 The solution for current is of the form

 The extinction angle β, is the angle at which the current
returns to zero
 At ωt=β

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The rms output voltage can be written as

Sequence control (two stage) with R
load
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load
 A two stage sequence control of ac voltage controller
employs two stages in parallel as shown above
 The turns ratio from primary to secondary is taken as unity
for convenience
 The main advantage of two-stage sequence control of ac
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voltage controller over single phase full-wave ac voltage
controller is the reduction of harmonics in the load and
supply currents

load
Resistive load
 For resistive load current waveform is identical with the
output voltage waveform
 When thyristor pair T3,T4 is in operation T1,T2 off
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 Rms value of output voltage

load
 Rms value of current
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Module 6
DC-DC converters – step down and step up choppers –

single-quadrant, two-quadrant & four quadrant chopper –
pulse width modulation & current limit control in dc-dc
converters. Switching regulators – buck, boost & buck-boost
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- continuous conduction mode only – waveforms – design of
filter inductance & capacitance

DC-DC converter (Chopper)
 Many industrial applications require power from dc voltage
source
 E.g.: subway cars, trolley buses, battery operated vehicles,
battery charging etc…
 The conversion of fixed dc voltage to an adjustable dc output voltage
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through the use of semiconductor devices can be carried out
by the use of two types of dc to dc converter given below
AC link chopper
DC chopper

AC link chopper:
 Dc first converted to ac by using an inverter
 Ac is then stepped up or down by using a transformer
 Which is then converted back to dc by using a diode rectifier
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 As the conversion is in two stages, dc to ac and then ac to dc,
ac link chopper is costly, bulky and less efficient

DC chopper
 Chopper is a static device that convert fixed dc input voltage to a
variable dc output voltage
 Dc equivalent of an ac transformer
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 Involves one stage conversion – more efficient

Step-down chopper
 A chopper is a high speed on/off semiconductor switch
 It connect source to load and disconnect the load from
source at a fast speed
 Chopper is represented by a switch SW inside a dotted
rectangle
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Step-down chopper
 During the period Ton, chopper is on and load voltage is
equal to source voltage Vs
 During the interval Toff, chopper is off, load current flows
through the freewheeling diode FD
As a result load terminal are short circuited by the FD and

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load voltage is therefore zero during Toff
 In this manner a chopped dc voltage is produced at the load
terminal
 During Ton, load current rises whereas during Toff, load
current decays

Step-down chopper
 Ton = on-time;Toff = off-time

 T=Ton+Toff = Chopping period
 Duty cycle
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 Thus load voltage can be controlled by varying duty cycle
 Where f is the chopping frequency

 Average output voltage is always less than the input voltage hence called as
step down chopper
Step–up chopper
 Average output voltage greater than input voltage can obtained by
using a chopper known as step-up chopper
 A large inductor L in series with the source voltage is
essential
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Step–up chopper
 When chopper is on, inductor stores energy
 When chopper is off as the inductor current cannot die down
instantaneously, this current is forced to flow through the
diode and load for a time Toff
 As the current tends to decrease polarity of the emf induced
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in the L is reversed
 As a result voltage across the load become
exceeds the source voltage

 In this manner circuit act as a step up chopper

Step–up chopper
 Assuming linear variation of output current the energy input
to inductor from the source during Ton is

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During Toff, when chopper is off, the energy released by the
inductor to the load is

Step–up chopper
 Considering the system to be lossless, these two energies will
be equal
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Types of chopper circuit
 Power semiconductor devices used in chopper circuit are
unidirectional devices
 Polarities of output voltage and direction of output current is
therefore restricted
 A chopper can however operate in any of the four quadrant,
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by an appropriate arrangements of the semiconductor devices
 This characteristics of their operation in any of the four
quadrant form the basis of their classification as type-A, type-
B etc… or class A, class B etc…

First quadrant or Type-A Chopper
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First quadrant or Type-A Chopper
 When chopper CH1 is on, Vo=Vs and current io flows in the
direction as shown
 When CH1 is off, Vo=0, but io in the load continues to
flowing in the same direction through freewheeling diode FD
It is thus seen that average value of both load voltage and

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current are always +ve
 The power flow is always from source to load
 This chopper is also called step down chopper

Second quadrant or Type-B Chopper
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Second quadrant or Type-B Chopper
 Load must contain a dc source like a battery in this chopper
 When CH2 is on, vo=0 but load voltage E drives current through
L and CH2
 Inductance L store energy duringTon of CH2
 When CH2 is off, vo=E+L(di/dt), exceeds source voltageVs
 As a result diode D2 is forward biased and begins conduction, thus

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allowing power to flow to the source
Chopper CH2 may be on or off, current Io flows out of the load,
current Io is therefore treated as –ve
 Since Vo is always +ve and Io is –ve power flow is from load to
source
 As load voltage Vo = E+L(di/dt) is more than source voltage Vs,
type B chopper is known as step-up chopper

Two-quadrant type-A or Type–C
 Obtained by connecting Type-A and Type-B in parallel
 Output voltage Vo is always +ve because of the presence of
freewheeling diode FD across the load
 When CH2 is on, or freewheeling diode FD conducts output
voltage Vo=0
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Two-quadrant type-A or Type–C
 When CH2 is on or diode D2 conducts, output voltage Vo=Vs
 The load current Io can however reverse its direction
 Load current is +ve when CH1 is on or FD conducts
 Load current is –ve when CH2 is on or D2 conducts
 In other words, CH1 and FD operate together as type-A chopper
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in first quadrant
 CH2 and D2 operate together as type-B chopper in second
quadrant
 Average load voltage is always +ve, but average load current can
be +ve or –ve
 This type of chopper operation is used for motoring and
regenerative braking of dc motors

Two-quadrant Type-B or Type-D
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 Ton>Toff, α>0.5, Vo is +ve
 Ton<Toff, α<0.5, Vo is –ve
 Ton=Toff, α=0, Vo=0
Two-quadrant Type-B or Type-D
 The out put voltage Vo=Vs when both CH1 and CH2 are on
 And Vo=-Vs, when both choppers are off but both diodes D1
and D2 conducts
 Average output voltage Vo is +ve when chopper turn on time
is more than their turn off time
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 The direction of load current is always +ve, because
choppers and diodes can conduct current only in one
direction
 As average values of both Vo and Io are +ve, chopper
operation in first quadrant is obtained

Four quadrant chopper, Type-E
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 Consist of four semiconductor switches, CH1toCH4 and
four diodes from D1 to D4 in anti-parallel
 Numbering of chopper is corresponds to their respective
quadrant of operation
First quadrant:
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 CH4 is kept on, CH3 is kept off and Ch1 is operated
 With CH1 and CH4 on, load voltage Vo=Vs and load current
begins to flow
 Vo and Io are +ve giving first quadrant operation
 CH1 is off, +ve current freewheels through CH4, D2

Second quadrant:
 CH2 is operated, CH1, CH3 and CH4 are kept off
 With CH2 on, reverse current flows through L, CH2, D4
and E
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 Inductance L stores energy during the time CH2 on
 When CH2 is turned off, current is fed back to source
through D1, D4
 Vo is +ve but Io is –ve, second quadrant operation of
chopper
 For second quadrant operation load must contain emf E

Third quadrant:
 CH1 is kept off, CH2 is kept on and CH3 is operated
 Polarity of load emf must be reversed for this quadrant of
operation
 When CH3 is on, load gets connected to source Vs so that
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bothVo and Io are –ve leading to 3rd quadrant of operation
 When CH3 is turned off, -ve current freewheels through
CH2, D4
Fourth quadrant:
 CH4 is operated and other devices are kept off
 With CH4 on, +ve current flows through CH4, D2, L and E

 Inductance L stores energy during the time CH4 is on
 When CH4 is turned off, current is fed back to source
through diodes D2, D3
 Load voltage is –ve but load current is +ve
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Control strategies
 The average value of the output voltage can be varied by
opening and closing the semiconductor switch
 The two types of control strategies (schemes) are employed
in all cases.These are:
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(a) Time-ratio control, and
(b) Current limit control.

Time-ratio Control
 In the time ratio control the value of the duty ratio, TON/T=k is
varied.
 There are two ways, which are constant frequency operation, and
variable frequency operation.
Constant Frequency Operation
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 In this control strategy, the ON time, is varied, keeping the
frequency (f=1/T), or time period T is constant.
 This is also called as pulse width modulation control (PWM).
 Two cases with duty ratios, as (a) 0.25 (25%), and (b) 0.75 (75%)
are shown in Fig.
 Hence, the output voltage can be varied by varying ON time,
TON.

Time-ratio Control
Constant Frequency Operation
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Time-ratio Control
Variable Frequency Operation
 In this control strategy, the frequency (f=1/T), or time
periodT is varied, keeping either
 (a) the ON time, constant, or
 (b) the OFF time, constant.
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 This is also called as frequency modulation control.
 Two cases with (a) the ON time, constant, and (b) the OFF
time, constant, with variable frequency or time period are
shown in Fig.
 The output voltage can be varied in both cases, with the
change in duty ratio,Ton/T

Time-ratio Control
Variable Frequency Operation
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Time-ratio Control
 There are major disadvantages in this control strategy.These are:
 The frequency has to be varied over a wide range for the control
of output voltage in frequency modulation. Filter design for such
wide frequency variation is, therefore, quite difficult.
 For the control of a duty ratio, frequency variation would be
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wide. As such, there is a possibly of interference with systems
using certain frequencies, such as signaling and telephone line, in
frequency modulation technique.
 The large OFF time in frequency modulation technique, may
make the load current discontinuous, which is undesirable.
 Thus, the constant frequency system using PWM is the preferred
scheme for dc-dc converters (choppers).

Current-limit control
 As can be observed from the current waveforms for the types of
dc-dc converters described earlier, the current changes between
the maximum and minimum values, if it (current) is continuous.
 In the current limit control strategy, the switch in dc-dc converter
(chopper) is turned ON and OFF, so that the current is
maintained between two (upper and lower) limits.
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 When the current exceed upper (maximum) limit, the switch is
turned OFF.

Current-limit control
 During OFF period, the current freewheels in say, buck converter (dc-
dc) through the diode, DF, and decreases exponentially.
 When it reaches lower (minimum) limit, the switch is turned ON.
 This type of control is possible, either with constant frequency, or
constant ON time
 This is used only, when the load has energy storage elements, i.e.
inductance, L.
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 The reference values are load current or load voltage.
 In this case, the current is continuous, varying between Imax and
Imin , which decides the frequency used for switching.
 The ripple in the load current can be reduced, if the difference
between the upper and lower limits is reduced, thereby making it
minimum.
 This in turn increases the frequency, thereby increasing the
switching losses.
Switching regulators
 DC converters can be used as switching mode regulators to
convert a dc voltage, normally unregulated to a regulated dc
voltage
 The regulation is normally achieved by PWM at a fixed frequency
and the switching device is normally BJT, MOSFET or IGBT
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 The ripple content is normally reduced by an LC filter
 There are four basic topologies of switching regulators
Buck regulator
Boost regulator
Buck-boost regulator
Cuk regulator
Buck regulator
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Buck regulator
 Average output voltage Va is less than the input voltage, Vs hence
the name buck converter
 Require only one switch, has high efficiency >90% and simple
 The circuit operation can be divided into two modes
Mode I
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 Begins when switch is turned on
 The input current rises, which flows through filter inductor L,
filter capacitor C and the load resistor R
Mode II
 Begins when switch is turned off
 Freewheeling diode conduct due to energy stored in the inductor
and the inductor current continues to flows through L, C, load
and diode
Buck regulator
 The inductor current falls until switch is turned on again in
the next cycle
 Here the inductor current is assumed as continues
 Depending on the switching frequency, filter inductance and
capacitance the inductor current could be discontinues
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 The voltage across the inductor L is in general
 Assuming that inductor current rises linearly from I1 to I2 in

time t1

Buck regulator
 And the inductor current falls linearly from I2 to I1 in time
t2,
 Where ΔI= I2-I1 is the peak to peak ripple current of the

inductor
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 Equating the value of ΔI
 Substituting t1=kT andt2=(1-k)T yields average output

voltage as

Buck regulator
 Assuming a lossless circuit, Vs.Is=Va.Ia=k.Vs.Ia and the
average input current Is=k.Ia
 The switching period T can be expressed as
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 Which gives the peak to peak ripple current as
 Using Kirchhoff's current law, we can write the inductor

current as
 If we assume that the load ripple current Δio is very small
and negligible, ΔiL=Δic

Buck regulator
 The average capacitor current, which flows into for
t1/2+t2/2=T/2 is
 The capacitor voltage is expressed as
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 And the peak to peak ripple voltage of the capacitor is
 Substituting the value of ΔI

Buck regulator
Condition for continues inductor current and capacitor voltage
 If IL is the average inductor current, the inductor current
ripple current ΔI=2IL
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 Which gives the critical value of the inductor Lc as
 If Vc is the average capacitor voltage, the capacitor ripple

voltage Δ Vc=2Va
 Which gives the critical value of the capacitor Cc

Boost regulator
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Boost regulator
 Out put voltage is greater than the input voltage , hence the
name boost converter
 Circuit operation can be divided into two modes
Mode I
 Begins when switch is turned on
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 The input current, which rises, flows through inductor L and
switch
Mode II
 Begins when switch is turned off
 Current that was flowing through the switch would now
flows through, L, C, load and diode
Boost regulator
 Assuming that inductor current rises linearly from I1 to T2 in
time t1

t2

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Where ΔI= I2-I1 is the peak to peak ripple current of the
inductor
 Substituting t1=kT and t2=(1-k)T yields the average output

voltage

Boost regulator
 Substituting k=t1/T = t1.f
 Assuming a lossless circuit, VsIs=VaIa=VsIa/(1-k) and the

average input current

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The switching period can be found from
 And this gives the peak to peak ripple current

Boost regulator
 When the transistor is on, the capacitor supplies the load
current for t=t1
 The average capacitor current during time t1 is Ic=Ia and the
peak to peak ripple voltage of the capacitor is
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 Substituting t1=(Va-Vs)/(Vaf)

Boost regulator
 Which gives the critical value of the inductor Lc

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voltage ΔVc=2Va
 Which gives the critical value of the capacitor

Buck-Boost regulator
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 Provides an output voltage that may be less than or greater than
input voltage – hence name buck-boost
 Output voltage polarity is opposite to that of the input voltage
 This regulator is also known as inverting regulator
Mode I
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 Switch is turned on and the diode is reverse biased
 The input current which rises flows through inductor L and switch
Mode II
 Switch is turned off
 And the current which was flowing through the inductor would
flow through L, C, D and the load
 Assuming that the inductor current rises linearly from I1 to
I2 in time t1
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t2
 Where ΔI=I2-I1 is the peak to peak ripple current of

inductor L

 Substituting t1=kT and t2=(1-k)T, the average output
voltage is
 Substituting t1=kT and t2=(1-k)T, the average output

voltage is

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Substituting t2=(1-k)T and (1-k), the average output voltage
is
 Assuming a lossless circuit, VsIs=-VaIa=VsIak/(1-k) and the

average input current Is is related to the average output
current Ia by
 The switching period T can be found from
 And this gives the peak to peak ripple current
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 When switch is on the filter capacitor supplies the load
current for t=t1
 The average discharging current of the capacitor is Ic=Ia and
the peak to peak ripple voltage of the capacitor is
 Substituting t1=Va/(Va-Va)f

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 Which gives the critical value for the inductor Lc

voltage ΔVc=2Va
 Which gives the critical value of capacitor

TRACE KTU
Thank you

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EE 305 POWER ELECTRONICS

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Block diagram of a typical power electronic converter

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SCR-Structure, static characteristics & switching (turn-on &

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 During turn on and turn off process a thyrisor is subjected

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 As the thyristor is forward biased, some of these electrons reaches

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 As the junction capacitance is almost constant, dCj/dt is zero

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 Where α is the common base current gain