Syllabus - S6

ELECTRONICS & COMMUNICATION ENGINEERING
SEMESTER VI
CATEGORY L T P CREDIT
ECT302 ELECTROMAGNETICS
PCC 3 1 0 4
Preamble: This course aims to impart knowledge on the basic concepts of electric and
magnetic fields and its applications.
Prerequisite:MAT102 Vector Calculus
Course Outcomes:After the completion of the course the student will be able to
CO 1 To summarize the basic mathematical concepts related to electromagnetic

K2 vector fields.
CO 2 Analyse Maxwell’s equation in different forms and apply them to diverse engineering
K3 problems.
CO3
To analyse electromagnetic wave propagation and wave polarization
K3
CO4 To analyse the characteristics of transmission lines and solve the transmission line
K3 problems using Smith chart.
CO5
To analyse and evaluate the propagation of EM waves in Wave guides.
K3
Mapping of course outcomes with program outcomes
PO PO PO PO PO PO PO PO PO PO PO PO
1 2 3 4 5 6 7 8 9 10 11 12
CO1 3 3 1 1 2
CO2 3 3 1 1 2
CO3 3 3 1 1 2
CO4 3 3 1 1 2
CO5 3 3 1 1 2
Assessment Pattern
Bloom’s Category Continuous Assessment End Semester Examination

Tests
1 2
Remember K1
Understand K2 20 20 40
Apply K3 30 30 60
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE Duration

Marks
150 50 100 3 hours
Continuous Internal Evaluation Pattern:
Attendance : 10 marks
Continuous Assessment Test (2 numbers) : 25 marks
Assignment/Quiz/Course project : 15 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A
contain 10 questions with 2 questions from each module, having 3 marks for each question.
Students should answer all questions. Part B contains 2 questions from each module of which
student should answer any one. Each question can have maximum 2 sub-divisions and carry
14 marks.
Course Level Assessment Questions
Course Outcome 1 (CO1): To summarize the basic mathematical concepts related to

electromagnetic vector fields. (K2)
1. State and explain divergence theorem. Give a geometrical explanation.
2. Find the curl of the vector A =2rcosϕ aρ +r aϕ in cylindrical coordinates
3. Show that curl grad F and div curl F are identically zero.
1 Q
4.Show that V  4 r where r  ( x  y  z ) satisfies Laplace’s equation.
2 2 2 1/ 2
Course Outcome 2 (CO2): Analyse Maxwell’s equation in different forms and apply
them to diverse engineering problems. (K3)
1. State and explain Maxwell’s equations in the integral and differential forms.
2. Derive the solution of uniform plane wave in lossy dielectric medium.
Course Outcome 3 (CO3): To analyse electromagnetic wave propagation and wave

polarization (K3)
1. Derive an expression for reflection coefficient of a plane wave under oblique incidence
with parallel polarization at a dielectric interface.
2. Explain wave polarization and different polarisation with example.
3. Derive the expression for Brewster angle for parallel polarised wave.
Course Outcome 4 (CO4): To analyse the characteristics of transmission lines and solve
the transmission line problems using Smith chart. (K3)
1.A transmission line of length 0.2 λ and characteristic impedance 100Ω is terminated with a
load impedance of 50+200j . Find input impedance, reflection coefficient at load end,
reflection coefficient at the input end and VSWR.
2. A lossless transmission line has a characteristic impedance of 50Ω and phase constant of 3
Rad/ m at 100 MHz . Find Inductance per meter and Capacitance per meter of the
transmission line .
3. A 50 + j200 Ω load is connected to a 100Ω lossless transmission line . Using Smith chart ,
find i. Reflection coefficient at load ii. VSWR
Course Outcome 5 (CO5): To analyse and evaluate the propagation of EM waves in

Wave guides.(K3)
1.For TE10 mode of propagation in a rectangular wave guide, with length 8cm and
6 cm respectively , find the following when frequency of operation is 6 GHz .
i. Cut off frequency
ii. Cut off wavelength
iii. Guide wavelength
iv. Phase constant
v. Phase velocity
vi. Group velocity
vii. Wave impedance
2.A rectangular wave guide has a dimension of 3cm x 5cm , and is operating at a frequency
of 10 GHz . Calculate the cutoff wavelength, cutoff frequency , guide wavelength , phase
velocity and group velocity . and the wave impedance for TE10 mode.
3.Derive the expression for Electric and magnetic field intensities for TM mode of
propagation of rectangular waveguide.
SYLLABUS
MODULE 1 :
Introduction to Electromagnetic Theory. Review of vector calculus- curl, divergence
gradient. Rectangular, cylindrical and spherical coordinate systems. Expression of curl
divergence and Laplacian in cartesian, cylindrical and spherical coordinate system. Electric
field and magnetic field, Review of Coulomb’s law, Gauss law and Amperes current law.
Poisson and Laplace equations, Determination of E and V using Laplace equation.
MODULE 2 :
Derivation of capacitance and inductance of two wire transmission line and coaxial cable.
Energy stored in Electric and Magnetic field. Displacement current density, continuity
equation. Magnetic vector potential. Relation between scalar potential and vector potential.
Maxwell’s equation from fundamental laws. Boundary condition of electric field and
magnetic field from Maxwells equations.Solution of wave equation.
MODULE 3 :
Propagation of plane EM wave in perfect dielectric, lossy medium, good conductor, media-
attenuation, phase velocity, group velocity, skin depth. Reflection and refraction of plane
electromagnetic waves at boundaries for normal & oblique incidence (parallel and
perpendicular polarization), Snell’s law of refraction, Brewster angle.
MODULE 4 :
Power density of EM wave, Poynting vector theorem. Polarization of electromagnetic wave-
linear, circular and elliptical polarisation.
Uniform lossless transmission line - line parameters.Transmission line equations, Voltage and
Current distribution of a line terminated with load .Reflection coefficient and VSWR.
Derivation of input impedance of transmission line.
MODULE 5 :
Transmission line as circuit elements (L and C). Development of Smith chart - calculation of
line impedance and VSWR using smith chart.
The hollow rectangular wave guide –modes of propagation of wave-dominant mode, group
velocity and phase velocity -derivation and simple problems only
Text Books
1. John D. Kraus, Electromagnetics, 5/e, TMH, 2010.

2. Mathew N O Sadiku, Elements of Electromagnetics, Oxford University Press, 6/e, 2014.
3. William, H. Hayt, and John A. Buck. Engineering Electromagnetics. McGraw-Hill, 8/e
McGraw-Hill, 2014.
Reference Books
1. Edminister, “Schaum’s Outline of Elctromagnetics”, 4/e, McGraw-Hill, 2014.

2. Jordan and Balmain , Electromagnetic waves and Radiating Systems, PHI, 2/e,2013
3.Martin A Plonus , Applied Electromagnetics, McGraw Hill, 2/e,1978.
4. Nannapaneni Narayana Rao, Elements of Engineering Electromagnetics, Pearson, 6/e, 2006.
5. Umran S. Inan and Aziz S. Inan, Engineering Electromagnetics, Pearson, 2010.
Course Contents and Lecture Schedule
No Topic No. of Lectures

1 Module 1
1.1 Introduction to Electromagnetic Theory. Review of vector 3
calculus- curl, divergence gradient.
1.2 Rectangular, cylindrical and spherical coordinate systems. 3
Expression of curl divergence and Laplacian in cartesian ,
cylindrical and spherical coordinate system.
1.3 Electric field and magnetic field.Review of Coulomb’s law , Gauss 2
law and Amperes current law.
1.4 Poisson and Laplace equations, Determination of E and V using 2
Laplace equation.
2 Module 2
2.1 Derivation of capacitance and inductance of two wire transmission 2
line and coaxial cable.
2.2 Energy stored in Electric and Magnetic field. 1
2.3 Displacement current density, continuity equation. Magnetic vector 3
potential. Relation between scalar potential and vector potential.
2.4 Maxwell’s equation from fundamental laws. 2
Boundary condition of electric field and magnetic field from 1
Maxwell’s equations.
2.5 Solution of wave equation 1
3 Module 3
3.1 Propagation of plane EM wave in perfect dielectric, lossy medium, 4
good conductor, media-attenuation, phase velocity, group velocity,
skin depth.
3.2 Reflection and refraction of plane electromagnetic waves at 4
boundaries for normal & oblique incidence (parallel and
perpendicular polarization), Snell’s law of refraction, Brewster
angle.
4 Module 4
4.1 Power density of EM wave, Poynting vector theorem. 2

4.2 Polarization of electromagnetic wave-linear, circular and elliptical 2
polarisation.
4.3 Uniform lossless transmission line - line parameters. Transmission line 3
equations
4.4 Voltage and Current distribution of a line terminated with load .Reflection 3
coefficient and VSWR.Derivation of input impedance of transmission line.
5 Module 5
5.1 Transmission line as circuit elements (L and C). 1
5.2 Development of Smith chart - calculation of line impedance and VSWR 3

using smith chart.
5.3 The hollow rectangular wave guide –modes of propagation of wave- 4
dominant mode, group velocity and phase velocity -derivation and simple
problems only
Assignments:
Model Question paper
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY

SIXTH SEMESTER B.TECH DEGREE EXAMINATION, (Model Question Paper)
Course Code: ECT302
Course Name: ELECTROMAGNETICS
Max. Marks: 100 Duration: 3 Hours
PART A
Answer ALL Questions. Each Carries 3 mark.
1 Define Curl of a vector field. Explain its physical significance. K2
2 Obtain Coulomb’s law from Gauss’ law K2
3 Write Poisson’s and Laplace’s Equation with applications K1
4 A Parallel plate capacitor with plate area of 5cm2 and a plate separation of 3mm K3
has a voltage 50sin103t Volt applied to its plates. Calculate the displacement
current assuming ε = 2ε0.
5 List all Maxwell’s equations in integral form K1

6 Explain the significance of skin depth. K2
7 What is Snell’s law? K1
8 What is wave polarisation? What are the different types of polarisation? K1
9 State the relation between standing wave ratio and reflection coefficient. K1
10 How a quarter wave dissipationless line can be used for impedance matching?. K2
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11 7
a. Derive the equation for curl of a vector field in Cartesian co-ordinate system.
CO1
K2
b. A Spherical volume charge distribution is given by 7

r2
   0 (1  2 ); r  a CO1
a
  0; r  a K3
Find the electric field intensity E; i) inside and ii) outside the charge distribution
OR
12 Interpret the following 7

CO1
∇ × B= μ 0 J
i) ii) ∇ × E = 0 where B and J stands for magnetic flux K3
density and electric current density
b. Apply Ampere’s circuital law to the case of an infinitely long coaxial cable 7
carrying a uniformly distributed total current I. Compute the magnetic field CO1
intensity existing in different parts of the cable. K3
Module - II
13 Derive the expression of capacitance of two wire transmission line. 7

a.
CO2
K2
b. Show that the energy stored in a system of n point charges is given by 7

1 n CO2
WE   Q iV i where Vi is the potential of the point charge Qi.
2 i 1 K3
OR
14a Define vector magnetic potential and show that B    A , where B is the 7
magnetic flux density and A is the vector magnetic potential at any point.
CO2
K2
7
b State and prove boundary conditions for E and H in accordance with Maxwell’s
CO2
equations.
K2
Module - III
15 Derive the expression for reflection coefficient for a wave of perpendicular 7

a. CO3
polarization , travelling from one medium to another at oblique incidence .
K2
b. In a lossy dielectric medium,characteristic impedance of the medium is 173 +j100 7

Ω , Expression of Magnetic field of a plane wave is given by
CO3
-αx
10 e cos(ω t – 0.5x)az A/m . Find K3
i. Direction of propagation
ii. Loss tangent
iii. Attenuation constant
iv. Phase constant
v. Skin depth
OR
7
16 a Derive continuity equation from fundamental laws.
CO3
K2
b Find the skin depth, δ at a frequency of 1.6 MHz in aluminium, where
σ=38.2MS/m and µr= 1. Also find the propagation constant, γ and the wave
7
velocity v . CO3
K3
Module - IV
17a Derive the equation for transmission and reflection coefficients of an

7
electromagnetic wave incident normally on the boundary between two different
regions. CO4
K2
7
b Derive an expression for net outward power flow associated with an
CO4
electromagnetic wave, from a surface.
K2
OR
18 Derive standard Transmission line equations. 7

a. CO4
K2
b. Given two dielectric media,the first medium is free space and the second medium
7
has ε2 =4ε0 and µ=µ0. Find the reflection coefficient for oblique incidence at θ1= 30o
for i) perpendicular polarisation and ii) parallel polarisation CO4
K3
Module - V
19 A rectangular wave guide has a dimension of 3cm x 5cm , and is operating at a

7
a.
frequency of 10 GHz . Calculate the cutoff wavelength, cutoff frequency , guide CO5
wavelength , phase velocity and group velocity . and the wave impedance for K3
TE10 mode.
b. At a frequency of 80 MHz, a lossless transmission line has a characteristic 7
impedance of 300Ω and a wavelength of 2.5m. Find:
CO5
i) L ii) C iii) If the line is terminated with a parallel combination of 200Ω
and 5pF, determine the reflection co-efficient and the standing wave ratio. K3
OR
20 a A 50 + j200 Ω load is connected to a 100Ω lossless transmission line . Using smith 7

chart , find
CO5
i. Reflection coefficient at load ii. VSWR iii. Load admittance
K3
b Derive the expression for Electric and magnetic field intensities for TM mode of 7
propagation of rectangular waveguide. CO5
K2
ECT304 VLSI CIRCUIT DESIGN
PCC 3 1 0 4
Preamble: This course aims to impart the knowledge of VLSI design methodologies and Digital
VLSI circuit design.
Prerequisite:
1. ECT201 Solid State Devices
2. ECT202 Analog Circuits
3. ECT 203 Logic Circuit Design.
COURSE OUTCOMES.
After the completion of the course the student will be able to:
CO1 Explain the various methodologies in ASIC and FPGA design.
CO2 Design VLSI Logic circuits with various MOSFET logic families.
CO3 Compare different types of memory elements.
CO4 Design and analyse data path elements such as Adders and multipliers.
CO5 Explain MOSFET fabrication techniques and layout design rules.
Mapping of course outcomes with program outcomes:

PO1 PO1 PO1
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9
0 1 2
CO1 3 3 2
CO2 3 2 3 2
CO3 3 2 3 2
CO4 3 2 3 2
CO5 3 2 2
Assessment Pattern:
End Semester
Continuous Assessment Tests
Bloom’s Category Examination
1 2
Remember
10 10 20
Understand
20 20 40
Apply
20 20 40
Analyze
Evaluate
Create
Mark distribution:
Total Marks CIE ESE Duration

150 50 100 3Hrs
Assignments : 15 marks.
End Semester Examination Pattern
Maximum Marks : 100 Time : 3 hours
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Mark patterns are as per the syllabus with 75% for theory and 25% for logical/numerical
problems.
Course Level Assessment Questions.
CO1:
1. Differentiate between full custom and semi-custom ASIC.
2. With a neat flow chart, explain ASIC design flow.
3. Describe Gate array based ASIC with neat diagram.
4. What are the processes involved in Soc design.
CO2:
1. With a neat diagram explain static and transient analysis of CMOS inverter
2. Realize the given logic function using static CMOS logic and transmission gate logic.
3. Compare the advantages and disadvantages of static and dynamic circuits.
CO3:
1. Compare different ROM structures.
2. Compare static and dynamic RAM structures.
3.Compare the advantages of three transistor and one transistor DRAM cell.
CO4:
1. Design a full adder with static CMOS logic
2. Compare the delay of Carry-Bypass adder, Linear Carry- Select adder, Square- root carry-
select adder.
CO5:
1. Explain how electronic grade silicon (EGS) is developed .
2. Explain the necessity of single crystalline silicon in VLSI fabrication and how single crystal
silicon is made.
3. Explain diffusion and ion implantation techniques.
4. Explain the advantages of SiO2 and the oxidation techniques.
Syllabus
Module 1: VLSI Design Methodologies.

Introduction: Moore’s law .ASIC design, Full custom ASICs, Standard cell based ASICs, Gate
array based ASICs, SoCs, FPGA devices, ASIC and FPGA Design flows, Top-Down and
Bottom-Up design methodologies. Logical and Physical design. Speed power and area
considerations in VLSI design
Module 2: Static CMOS Logic Design

MOSFET Logic Design - NMOS Inverter (Static analysis only), basic logic gates,
CMOS logic, Static and transient analysis of CMOS inverter, Switching power dissipation and
delays. Realization of logic functions with static CMOS logic, Pass transistor logic, and
transmission gate logic
Module 3: Dynamic logic Design and Storage Cells

Dynamic Logic Design-Pre charge- Evaluate logic, Domino Logic, NP domino logic.
Read Only Memory-4x4 MOS ROM Cell Arrays(OR,NOR,NAND)
Random Access Memory –SRAM-Six transistor CMOS SRAM cell, DRAM –Three transistor
and One transistor Dynamic Memory Cell.
Module 4: Arithmetic circuits

Adders: Static adder, Carry-Bypass adder, Linear Carry- Select adder, Square- root carry- select
adder. Multipliers: Array multiplier.
Module 5: Fabrication techniques and MOSFET physical Design

Material Preparation
Purification and Crystal growth (CZ process), wafer preparation
Thermal Oxidation- Growth mechanisms, Dry and Wet oxidation.
Diffusion and ion implantation techniques.
Epitaxy : molecular beam epitaxy.
Lithography- Photo lithographic sequence, Electron Beam Lithography, Etching and metal
deposition techniques.
MOSFET Fabrication techniques
Twin-Tub fabrication sequence, Fabrication process flow.
Layout Design and Design rules, Stick Diagram and Design rules-micron rules and Lambda
rules. (definitions only).layout of CMOS Inverter, two input NAND and NOR gates.
Text Books:
1. Sung –Mo Kang & Yusuf Leblebici, CMOS Digital Integrated Circuits- Analysis & Design,
McGraw-Hill, Third Ed., 2003
2. S.M. SZE, VLSI Technology, 2/e, Indian Edition, McGraw-Hill,2003
3. Wayne Wolf ,Modern VLSI design, Third Edition, Pearson Education,2002.
References:
1. Michael John Sebastian Smith, Application Specific Integrated Circuits, Pearson
Education,2001.
2. Neil H.E. Weste, Kamran Eshraghian, Principles of CMOS VLSI Design- A Systems
Perspective, Second Edition. Pearson Publication, 2005.
3. Jan M. Rabaey, Digital Integrated Circuits- A Design Perspective, Prentice Hall, Second
Edition, 2005.
4. Razavi - Design of Analog CMOS Integrated Circuits,1e, McGraw Hill Education India
Education, New Delhi, 2003.
5.
Course Contents and Lecture Schedule.
No. of.
No Topic
Lectures
Module 1: VLSI Design Methodologies. (11 Hrs)
Introduction: Moore slaw .ASIC design, Full custom ASICs,

1.1 3
Standard cell based ASICs, Gate array based ASICs,
SoCs, FPGA devices
1.2 2
ASIC and FPGA Design flows Top-Down and Bottom-Up design
1.3 3
methodologies.
Logical and Physical design. Speed power and area considerations
1.4 3
in VLSI design
Module 2:Static CMOS Logic Design (9 Hrs)
MOSFET Logic Design - NMOS logic (Static analysis of Basic

2.1 gates only) 3
CMOS logic, Static and transient analysis of CMOS inverter

2.2 3
Switching power dissipation and delays
Realization logic functions in static CMOS logic, Pass transistor
2.3 logic, and transmission gate logic (Static analysis only) 3
Module 3: Dynamic logic Design and Storage Cells (8 Hrs)
Dynamic Logic Design-Pre charge- Evaluate logic, Domino Logic,

3.1 NP domino logic. 3
Read Only Memory-4x4 MOS ROM Cell

3.2 Arrays(OR,NOR,NAND) 2
Random Access Memory –SRAM-Six transistor CMOS SRAM

3.3 cell, DRAM –Three transistor and One transistor Dynamic Memory 3
Cell.
Module 4: Arithmetic circuits (5 Hrs)
4.1 Adders- Static adder, Carry-Bypass adder, Linear Carry- Select 3

adder, Square- root carry- select adder.
4.2 Multipliers-Array multiplier. 2
Module 5: MOSFET physical Design and Fabrication techniques (13 Hrs)
5.1 Material Preparation (qualitative analysis only) 2

Purification and Crystal growth (CZ process), wafer preparation.
Thermal Oxidation- Growth mechanisms, Dry and Wet oxidation.
5.2 3
Diffusion and ion implantation techniques.
Epitaxy : Molecular beam epitaxy.
5.3 Lithography- Photo lithographic sequence, Electron Beam 3
Lithography, Etching and metal deposition techniques
MOSFET Fabrication techniques(qualitative analysis only)
5.4 2
Twin-Tub fabrication sequence, Fabrication process flow.
Layout Design and Design rules, Stick Diagram and Design rules-
5.5 micron rules and Lambda rules. Layout of CMOS Inverter, two 3
input NAND and NOR gates,
Model Question Paper
A P J Abdul Kalam Technological University

Sixth Semester B Tech Degree Examination
Branch: Electronics and Communication Course:
Time: 3 Hrs Max. ECT 304 VLSI CIRCUIT DESIGN
Marks: 100
PART A
(Answer All Questions)
1 What is Moore's law in VLSI design? (3)

2 Differentiate between ASIC and FPGA. (3)
3 Switching threshold voltage equation of CMOS inverter and explain each (3)
parameter
4 List the advantage of CMOS logic. (3)
5 List the advantages of dynamic logic over static logic circuits. (3)
6 Differentiate between volatile and non volatile memories. (3)
7 Explain propagate delete and generate signals. (3)
8 What are the different types of power dissipation in a CMOS inverter? (3)
9 List the advantages of SiO2 (3)
10 Define lambda rules and micron rules. (3)
PART B
(Answer one question from each module. Each question carries 14 mark.)
11(A) What is FPGA? What are its applications? With block diagram explain its (6)
internal architecture?
11(B) Explain ASIC design flow. (8)
OR
12(A) Compare different ASIC design methodologies. (8)
12(A) List the advantages of SOC (6)
13(A) Derive expression for the switching threshold of a CMOS inverter. (7)
13(B) What is meant by pass transistor logic? What are the differences in (7)
transmission characteristics of N MOS and P MOS transistors?
OR
14(A) What are the different types of power dissipation in a CMOS inverter? (8)
Derive expression for the total power dissipation.
14(B) Why PMOS transistor can pass only strong ones and NMOS can pass (6)
strong zeros.
15(A) Draw the circuit diagram and explain the principle of operation of a (7)
CMOS based static RAM cell. Explain the read and write operations.
What are the constraints on the sizes of transistors?
15(B) Draw the circuit diagram and explain the principle of operation of a one (7)
transistor dynamic RAM cell. Explain the read, write and refresh
operations
OR
16(A) Explain the read and write operation of a three-transistor DRAM cell (7)
16(B) Explain the read and write operation of a six transistor CMOS SRAM cell. (7)
OR
17(A) With diagram illustrate the principle of operation of an array multiplier. (8)
Show the critical path. Estimate the delay of the multiplier.
17(B) With block diagram illustrate the principle of operation of a square root (6)
carry select adder. Estimate the delay of an n bit adder
OR
18(A) Draw circuit diagram of a full adder with not more than 28 transistors in (8)
standard CMOS logic
18(B) Explain the working a 16-bit carry-by pass adder and write down the (6)
expression for worst-case delay.
19(A) Illustrate with diagram the principle of crystal growth by Czochralzki (7)
method.
19(B) What is photolithography? With diagram illustrate the steps involved in (7)
photolithography process.
OR
20(A) Explain the principle of molecular beam epitaxy, with schematic diagram (8)
of an MBE system. What are its advantages and disadvantages?
20(B) With schematic diagram and chemical reactions involved, illustrate wet (6)
and dry oxidation processes
MODEL ASSIGNMENT QUESTIONS
Module 1
1. How to choose between FPGA and ASIC ?
2. Describe ASIC in terms of Size, power and performance, IP protection and competitive
Edge
3. Compare Gate-array design and Full-custom design?
4. What are the differences between CPLDs and CLBs
5 List some of the commonly used FPGA development board ?
6. Discuss the architecture of any one of the leading FPGA in industry ?
Module 2
1. Power and interconnect delay analysis of CMOS inverter?
2. Implement XOR function using pass transistor logic?
3. Derive V IL, V IH,V OH , and V OL of depletion load inverter?
4. Design 8:1 MUX using transmission gate logic?
5. What are the advantages of NMOS over CMOS ?
Module 3
1. Explain the working of sense amplifiers in memory structures?
2. Design a voltage comparator in precharge-evaluate logic .
3. Discuss the cascading problem of P-E logic
4. Discuss the architecture of FLASH EPROM
5. Explain the working of FGMOS
Module 4
1. With diagram illustrate the principle of operation of an array multiplier. Show the critical
path. Estimate the delay of the multiplier
2. Implement a 3x3 array multiplier?
Module 5
1. What is photolithography? With diagram illustrate the steps involved in photolithography
process?
2. What is Deal Grove model of oxidation? What are linear and parabolic rate coefficients
with reference to oxidation process?
3. Illustrate with diagram the principle of crystal growth by Czochralzki method
4. Explain DEAL-GROVE model of oxidation?
5. What are the requirements of a "clean-room" in VLSI fabrication
INFORMATION THEORY AND CATEGORY L T P CREDIT

ECT306
CODING PCC 3 1 0 4
Preamble: This course aims to lay down the foundation of information theory introducing both
source coding and channel coding. It also aims to expose students to algebraic and probabilistic
error-control codes that are used for reliable transmission.
Prerequisite: MAT 201 Linear Algebra and Calculus, MAT 204 Probability, Random Process and
Numerical Methods, ECT 204 Signals and Systems.
Course Outcomes: After the completion of the course the student will be able to
CO 1 Explain measures of information – entropy, conditional entropy, mutual information

CO 2 Apply Shannon’s source coding theorem for data compression.
CO 3 Apply the concept of channel capacity for characterize limits of error-free
transmission.
CO 4 Apply linear block codes for error detection and correction
CO 5 Apply algebraic codes with reduced structural complexity for error correction
CO 6 Understand encoding and decoding of covolutional and LDPC codes

PO PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9 PO PO PO 12
1 10 11
CO 1 3 3
CO 2 3 3 2 3 3
CO 3 3 3 2 3 3 2 2
CO 4 3 3 2 3 3 2 2
CO 5 3 3 2 3 3 2 2
CO 6 3 3 2 3 3 2 2
Assessment Pattern
Tests
1 2
Remember 10 10 20
Understand 30 30 60
Apply 10 10 20
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours

End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1): Entropy, Mutual Information

1. Prove that entropy of a discrete random variable is upper bounded by logarithm of alphabet size.
2. Prove that I(X:Y|Z) is always greater than or equal to 0.
Course Outcome 2 (CO2): Source Coding

1. State and prove Kraft’s inequality for uniquely decodable codes.
2. Describe operational meaning of entropy in the light of Shannons’s source coding theorem.
Course Outcome 3 (CO2): Channel Capacity

1. Derive the expression for capacity of binary symmetric channel.
2. Define differential entropy and derive its expression for a Gaussian distributed random variable
with zero mean value and variance σ2.
3. Explain the inferences from Shannon Hartley theorem with the help of spectral efficiency versus
SNR per bit graph.
Course Outcome 4 (CO4): Linear Block Codes

1. Construct a table for GF(23) based on the primitive polynomial, p(x) = 1 + x + x3.
2. Find generator and parity check matrix in systematic format of the (6,3) linear block code for the
given parity matrix.
]
P= 1 1 0
[ 0 1 1
1 1 1
1 0 1
3. Explain standard array decoding of linear block codes.
Course Outcome 4 (CO4): Algebraic codes

1. Draw and explain the decoder circuit of (n, k) cyclic codes.
2. Give the properties of BCH codes.
Course Outcome 5 (CO5): Convlutional and LDPC Codes

1. Obtain the output codeword corresponding to the information sequence (1 1 0 1 1) for a convolu-
tional encoder with rate ½ and constraint length 4, for generator sequences, g(1) = (1011) and
g(2)
= (1111).
2. Explain the message-passing decoding algorithm for LDPC codes with respect to binary erasure
channel.
SYLLABUS
Module 1 – Entropy, Sources and Source Coding

Entropy, Properties of Entropy, Joint and Conditional Entropy, Mutual Information, Properties of
Mutual Information.
Discrete memoryless sources, Source code, Average length of source code, Bounds on average
length, Uniquely decodable and prefix-free source codes. Kraft Inequality (with proof), Huffman
code. Shannon’s source coding theorem (both achievability and converse) and operational meaning
of entropy.
Module 2 – Channels and Channel Coding

Discrete memoryless channels. Capacity of discrete memoryless channels. Binary symmetric
channels (BSC), Binary Erasure channels (BEC). Capacity of BSC and BEC. Channel code. Rate
of channel code. Shannon’s channel coding theorem (both achievability and converse without
proof) and operational meaning of channel capacity.
Modeling of Additive White Gaussian channels. Continuous-input channels with average power
constraint. Differential entropy. Differential Entropy of Gaussian random variable. Relation
between differential entropy and entropy. Shannon-Hartley theorem (with proof – mathematical
subtlities regarding power constraint may be overlooked).
Inferences from Shannon Hartley theorem – spectral efficiency versus SNR per bit, power-limited
and bandwidth-limited regions, Shannon limit, Ultimate Shannon limit.
Module 3 – Introduction to Linear Block Codes

Overview of Groups, Rings, Finite Fields, Construction of Finite Fields from Polynomial rings,
Vector spaces.
Block codes and parameters. Error detecting and correcting capability. Linear block codes. Two
simple examples -- Repetition code and single parity-check code. Generator and parity-check
matrix. Systematic form.
Maximum likelihood decoding of linear block codes. Bounded distance decoding. Syndrome.
Standard array decoding.
Module 4 – A Few Important Classes of Algebraic codes

Cyclic codes. Polynomial and matrix description. Interrelation between polynomial and matrix view
point. Systematic encoding. Decoding of cyclic codes.
(Only description, no decoding algorithms) Hamming Codes, BCH codes, Reed-Solomon Codes.
Module 5 – Convolutional and LDPC Codes

Convolutional Codes. State diagram. Trellis diagram. Maximum likelihood decoding. Viterbi
algorithm.
Low-density parity check (LDPC) codes. Tanner graph representation. Message-passing decoding
for transmission over binary erasure channel.
Text Books and References
1. “Elements of Information Theory”, Joy A Thomas, Thomas M Cover, Wiley-Interscience.

2. “Information Theory, Inference and Learning Algorithms”, David JC McKay, Cambridge
University Press
3. “Principles of digital communication”, RG Gallager, Cambridge University Press
4. “Digital Communication Sysmtes”, Simon Haykin, Wiley.
5. “Introduction to Coding Theory”, Ron M Roth, Cambrdige University Press
6. Shu Lin & Daniel J. Costello. Jr., Error Control Coding : Fundamentals and Applications,
2nd Edition.
7. Modern Coding Theory, Rüdiger Urbanke and TJ Richardson, Cambdridge University
Press.
No Topic No. of
Lectures
1 Entropy, Sources and Source Coding
1.1 Entropy, Properties of Entropy, Joint and Conditional Entropy 2
1.2 Mutual Information, Properties of Mutual Information 2
1.3 Discrete memoryless sources, Source code, Average length of source 2
code, Bounds on average length
1.4 Uniquely decodable and prefix-free source codes. Kraft Inequality 2
(with proof)
1.5 Huffman code. Shannon’s source coding theorem and operational 2
meaning of entropy
2 Channels and Channel Coding

2.1 Discrete memoryless channels. Capacity of discrete memoryless 1
channels
2.2 Binary symmetric channels (BSC), Binary Erasure channels (BEC). 2
Capacity of BSC and BEC.
2.3 Channel code. Rate of channel code. Shannon’s channel coding 2

theorem (without proof) and operational meaning of channel capacity.
2.4 Modeling of Additive White Gaussian channels. Continuous-input 1
channels with average power constraint.
2.5 Differential entropy. Differential Entropy of Gaussian random variable. 2
Relation between differential entropy and entropy
2.6 Shannon-Hartley theorem and its proof 1
2.7 Inferences from Shannon Hartley theorem – spectral efficiency versus 2
SNR, power-limited and bandwidth-limited regions, Shannon limit,
Ultimate Shannon limit.
3 Introduction to Linear Block Codes

3.1 Overview of Groups, Rings, Finite Fields, Construction of Finite Fields 5
from Polynomial rings, Vector spaces.
3.2 Block codes and parameters. Error detecting and correcting capability 1
3.3 Linear block codes. Generator and parity-check matrix. Systematic 2
form. Two simple examples -- Repetition code and single parity-check
code. General examples.
3.5 Maximum likelihood decoding of linear block codes. Bounded distance 3
decoding. Syndrome. Standard array decoding.
4 A Few Important Classes of Algebraic codes

4.1 Cyclic codes. Polynomial and matrix description. Interrelation between 4
polynomial and matrix view point. Systematic encoding. Decoding of
cyclic codes.
4.2 Hamming Codes, 1
4.3 BCH codes, Reed-Solomon Codes. 2
5 Convolutional and LDPC Codes

5.1 Convolutional Codes. 1
5.2 State diagram. Trellis diagram. 2
5.3 Maximum likelihood decoding. Viterbi algorithm
5.4 Low-density parity check (LDPC) codes. Tanner graph representation
2
Message-passing decoding for transmission over binary erasure
channel.
.
ECT 306 Information Theory and Coding

Simulation Assignments
The following simulation assignments can be done with Python/MATLAB/

SCILAB/LabVIEW
1. Source Coding - Huffman Code

1. Generate Huffman code for the source with symbol probabilities {1/2, 1/3, 1/6}.
2. Find the entropy, average codeword length and efficiency of the code.
3. Create the second order extended source by taking probabilities of 9 symbols in the
extended source as the product of every possible combinations of two symbols from
the original source.
4. Generate Huffman code for the extended source symbols and find the entropy,
average codeword length and efficiency of the code.
5. Compare the two efficiencies and appreciate the Shannon’s source coding theorem.
2. Binary Symmetric Channel
1. Create a 2 x 2 matrix, P(Y/X) for binary symmetric channel with channel transition
probability, p < 0.5.
2. Let the input symbol probabilities corresponding to symbol 0 and 1 be α and

(1 - α) respectively. For different values of α ranging from 0 to 1, find the joint prob-
ability matrix, P(X,Y) and output probability, P(Y)
3. Find mutual information, I(X; Y) = H(Y) – H(Y/X) for each value of α. Plot the
I(X; Y) versus α graph and observe the channel capacity.
3. Linear Block Code (LBC)

1. Create the k x n generator matrix, G of (n, k) LBC.
2. Generate all possible codewords by multiplying the message vector of length, k
with G.
3. Calculate the Hamming weight of all codewords and obtain the minimum distance,
dmin of the code.
4. Find its error correcting and detecting capability.
5. Cyclic Code – Encoder & Decoder
1. Realize the encoder circuit for (7, 4) cyclic code in Fig. 4.2 in page 96 in Error
Control Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
2. Create a random binary vector of length 4 as input message vector and generate the
codeword.
3. Create binary vector of length 7 with Hamming weight 1 as error vector and add it to
the encoder output to generate the receiver output.
4. Realize the decoder circuit for (7, 4) cyclic code in Fig. 4.9 in page 107 in Error
Control Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
5. Observe the encoder and decoder outputs for different message vectors and error
vectors and find the error correcting capability of the code.
6. Convolutional Code
1. Implement (2,1,3) convolutional encoder in Fig. 10.1 in page 288 in Error Control
Coding: Fundamentals and Applications by Shu Lin & Daniel J. Costello. Jr.
2. Give a message vector, u of arbitrary length as input to the encoder.
3. Generate the output code sequence.

MODEL QUESTION PAPER

ECT 306 INFORMATION THEORY AND CODING
Time: 3 hours Max. Marks:100
PART A
Answer all questions. Each question carries 3 marks.

1. A source emits one f four symbols, s0, s1, s2, s3 with probabilities 1/3, 1/6, 1/4 and 1/4
respectively. The successive symbols emitted by the source are statistically indepen-
dent. Calculate the entropy of the source.
2. Identify the instantaneous codes from the code sets listed below.
3. State Shannon’s channel coding theorem. What is its significance in digital communication
system?
4. An analog signal band limited to ‘B’ Hz is sampled at Nyquist rate. The samples are
quantized into 4 levels. The quantization levels are assumed to be independent and occur
with probabilities: p1= p4 = 1/8, p2 = p3 = 3/8. Find the information rate of the source
assuming B = 100Hz.
5. List the properties of group. Give an example.
6. Show that C = {0000, 1100, 0011, 1111} is a linear code. What is its minimum distance?
7. Explain generation of systematic cyclic code using polynomial description.
8. List the features of Reed Solomon code.
9. Draw a (3,2,1) convolutional encoder with generator sequences,
g(11 )=( 11 ) , g(12 )=( 01 ) , g (13 )=( 11 ) and g(21 )=( 01 ) , g (22 )=( 10 ) , g2(3)= (10 ).
10. Draw the tanner graph of rate 1/3 LDPC code for the given parity check matrix.
1 1 1 0 0 0
H=
[
1 0 0 1 1 0
0 1 0 1 0 1
0 0 1 0 1 1
]
PART B
Answer any one question from each module. Each question carries 14
marks.
MODULE I
11 (a) The joint probability of a pair of random variables is given below. Determine H(X,
Y), H(X/Y), H(Y/X) and I(X,Y). Verify the relationship between joint, conditional and
marginal entropies.
1/3 1/ 3
P(X, Y) = [ 0 1/ 3 ]
(10 marks)
11 (b) Explain uniquely decodable and prefix-free property of source code. (4 marks)
12 (a) Find the binary Huffman code for the source with probabilities {1/3, 1/5, 1/5,
2/15, 2/15}. Also find the efficiency of the code. (9 marks)
12 (b) Prove that H(Y) ≥ H(Y/X). (5 marks)
MODULE II
13 (a) A voice grade channel of the telephone network has a bandwidth of 3.4 KHz.
Calculate channel capacity of the telephone channel for signal to noise ratio of 30 dB. Also
determine the minimum SNR required to support information transmission through the
telephone channel at the rate of 4800 bits/sec.
(7 marks)
13 (b) Derive the expression for channel capacity for binary erasure channel. (7 marks)
14 (a) A binary channel has the following noise characteristic.

2/3 1/3
P(Y/X) = [1/3 2/3 ]
If the input symbols are transmitted with probabilities 3/4 and 1/4 respectively, find I(X;Y).
Also compute channel capacity and what are the input symbol probabilities that correspond
to the channel capacity. (9 marks)
14 (b) State Shannon Hartley theorem and explain the significance of Shannon limit. (6 marks)
MODULE III
15 (a) The parity check matrix of (7,4) linear block code is given as
1 00 1 01 1
[
H = 0 10 1 11 0 .
0 01 0 11 1 ]
Compute the minimum distance of the code and find its error detection and correcting capability.
Suppose that the received codeword, r = (1001111). Determine whether the received codeword is in
error? If so, form the decoding table and obtain the correct codeword. (9 marks)
16 (b) List the properties of vector space. Define subspace. (5 marks)
17 (a)The parity bits of a (8, 4) linear systematic block code are generated by
c5 = d1+d2+d4
c6 = d1+d2+d3
c7 = d1+d3+d4
c8 = d2+d3+d4
(+ sign denotes modulo-2 addition)
where d1, d2, d3 and d4 are message bits and c5, c6, c7 and c8 are parity bits. Find
generator matrix G and parity check matrix H for this code. Draw the encoder circuit (7 marks)
17 (b) Explain the construction of finite field from polynomial ring with the help of an ex-ample.
(7 marks)
MODULE IV
18 (a) Consider a (7, 4) cyclic code with generator polynomial, g(x) = 1 + x + x3. Express the
generator matrix and parity-check matrix in systematic and non-systematic form
(8 Marks)
18 (b) Find the generator polynomial for single, double and triple error correcting BCH code of block
length, n = 15. (6 marks)
19 (a) Draw syndrome circuit for a (7,4) cyclic code generated by g(x)=1+x+x3. If the re-ceived
vector r is [0010110] what is the syndrome of r? Explain the circuit with a table showing the
contents of the syndrome register. (8 Marks)
19 (b) What are the features of Hamming code? Find the parity check matrix for (15, 11) Hamming
code. (6 marks)
MODULE V
20 (a) Draw the state diagram of a convolution encoder with rate 1/3 and constraint length
3 for generator sequences g(1) = (1 0 0), g(2) = (1 0 1), g(3) = (1 1 1). (7 marks)
20 (b) Explain message passing decoding algorithm for LDPC codes with the help of an
example.
(7 marks)
21 For a (2,1,2) convolutional encoder with generator sequences g(1) = (1 1 1) and g(2)
= (1 0 1). Draw Trellis and perform Viterbi decoding on this trellis for the received
sequence {01, 10, 10, 11, 01, 01, 11} and obtain the estimate of the transmitted se-
quence. (14 marks)
COMPREHENSIVE COURSE CATEGORY L T P CREDIT

ECT308 WORK PCC 1 0 0 1
Preamble: The objective of this Course work is to ensure the comprehensive knowledge
of each student in the most fundamental Program core courses in the
curriculum. Five core courses credited from Semesters 3, 4 and 5 are chosen
for the detailed study in this course work. This course has an End Semester
Objective Test conducted by the University for 50 marks. One hour is
assigned per week for this course for conducting mock tests of objective
nature in all the listed five courses.
Prerequisite: 1. ECT202 Analog Circuits

2. ECT203 Logic Circuit Design
3. ECT301 Linear Integrated Circuits
4. ECT303 Digital Signal processing
5. ECT305 Analog and Digital communication
Apply the knowledge of circuit theorems and solid state physics to solve the
CO 1
problems in electronic Circuits
CO 2 Design a logic circuit for a specific application
CO 3 Design linear IC circuits for linear and non-linear circuit applications.
CO 4 Explain basic signal processing operations and Filter designs
CO 5 Explain existent analog and digital communication systems
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 1 2
CO 2 3 3 1 2
CO 3 3 3 1 2
CO 4 3 2 2
CO 5 3 2 1 2
Assessment Pattern
Bloom’s Category End Semester
Examination
Remember 10
Understand 20
Apply 20
Analyse
Evaluate
Create
Mark distribution
Total Marks CIE ESE ESE Duration
50 0 50 1 hour
End Semester Examination Pattern: Objective Questions with multiple choice (Four).
Question paper include Fifty Questions of One mark each covering the five identified
courses.
Syllabus
Full Syllabus of all five selected courses
.
1 Analog Circuits
1.1 Mock Test on Module 1 and Module 2 1
1.2 Mock Test on Module 3, Module 4 and Module 5 1
1.3 Feedback and Remedial 1
2 Logic Circuit design
3 Linear IC
4 Digital Signal Processing
5 Analog and Digital Communication
ECL332 COMMUNICATION LAB
PCC 0 0 3 2
Preamble:
• The experiments are categorized into three parts Part A, Part B and Part C.
• The experiments in Part A involves design and setting up of prototype

circuits on breadboard or trainer kits.
• The experiments in Part B are software simulations and can be done using
GNU Octave or Python. Other softwares such as MATLAB/ SCILAB/
LabVIEW can also be used.
• The experiments in Part C are emulations using SDR (software-designed-

radio) dongle connected to laptops. A control software has to be in- stalled
on the laptops. A combination of open-source GNU Radio software, RTL-
SDR (for reception) and HackRF / LimeSDR (for transmission) can be
used to conduct these experiments. Other platforms such as LabView with
NI-USRP or Simulink with RTL-SDR can also be used.
Prerequisites:
• ECT 305 Analog and Digital Communication

• ECT 303 Digital Signal Processing
Course Outcomes :The student will be able to

CO 1 Setup simple prototype circuits for waveform coding and digial
modulation techniques working in a team.
CO 2 Simulate the error performance of a digital communication system
using standard binary and M -ary modulation schemes.
CO 3 Develop hands-on skills to emulate a communication system with
software-designed-radio working in a team.
Mapping of Course Outcomes with Program Outcomes
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 3 3 3 2 3 0 0 0 3 2 0 1
CO2 3 3 3 2 3 0 0 0 0 0 0 1
CO3 3 3 3 3 3 0 0 0 3 2 0 3
Assessment Pattern Mark
Distribution;
Total Mark CIE ESE

150 75 75
Attribute Mark
Attendance 15
Continuous assessment 30
Internal Test (Immediately before 30
the second series test)
End Semester Examination Pattern: The following guidelines should be followed

regarding award of marks.
Attribute Mark
Preliminary work 15
Implementing the work/Conducting the experiment 10
Performance, result and inference (usage of equipments 25
and trouble shooting)
Viva voce 20
Record 5
General instructions: End-semester practical examination is to be conducted

immediately after the second series test covering entire syllabus given below. Evaluation
is to be conducted under the equal responsibility of both the internal and external
examiners. The number of candidates evaluated per day should not exceed 20. Students
shall be allowed for the examination only on submitting the duly certified record. The
external examiner shall endorse the record.
Experiments
Part A
Any two experiments are mandatory. The students shall design and setup simple
prototype circuits with the help of available ICs. They can observe Waveforms
produced by these circuits for standard ideal inputs.
1. FM generation and demodulation using PLL
2. Generation and Detection of PCM signals

3. Generation and Detection of Delta modulated signals
4. Generation and Detection of BPSK
5. Generation and Detection of 16-QPSK
Part B
All experiments are mandatory. The students shall write scripts to simulate
components of communication systems. They shall plot various graphs that help
to appreciate and compare performance.
1. Performance of Waveform Coding Using PCM

1. Generate a sinusoidal waveform with a DC offset so that it takes only
positive amplitude value.
2. Sample and quantize the signal using an uniform quantizer with number of
representation levels L. Vary L. Represent each value using decimal to
binary encoder.
3. Compute the signal-to-noise ratio in dB.
4. Plot the SNR versus number of bits per symbol. Observe that the SNR
increases linearly.
2. Pulse Shaping and Matched Filtering

1. Generate a string of message bits.
2. Use root rasied cosine pulse p(t) as the shapig pulse, and generate the
corresponding baseband signal with a fixed bit duration Tb. You may use
roll-off factor as α = 0.4.
3. Simulate transmission of baseband signal via an AWGN channel
4. Apply matched filter with frequency response Pr(f ) = P ∗(f ) to the

received signal.
5. Sample the signal at mTb and compare it against the message sequence.
3. Eye Diagram

2. Use rasied cosine pulse p(t) as the shapig pulse, and generate the
corresponding baseband signal with a fixed bit duration Tb. You may use
roll-off factor as α = 0.4.
3. Use various roll off factors and plot the eye diagram in each case for the
received signal. Make a comparison study among them.
4. Error Performance of BPSK

2. Encode using BPSK with energy per bit Eb and represent it using points in
a signal-space.
3. Simulate transmission of the BPSK modulated signal via an AWGN

channel with variance N0/2.
4. Detect using an ML decoder and plot the probability of error as a function

of SNR per bit Eb/N0.
5. Error Performance of QPSK

2. Encode using QPSK with energy per symbol Es and represent it using
points in a signal-space.
3. Simulate transmission of the QPSK modulated signal via an AWGN

channel with variance N0/2 in both I-channel and Q-channel.
4. Detect using an ML decoder and plot the probability of error as a function

of SNR per bit Eb/N0 where Es = 2Eb.
Part C
Any two experiments are mandatory. The students shall emulate communication
systems with the help of software-defined-radio hardware and necessary control
software. Use available blocks in GNU Radio to implement all the signal
processing. These experiments will help students to appreciate better how
theoretical concepts are translated into practice.
1. Familiarization with Software Defined Radio (Hardware and Control

Software)
1. Familiarize with an SDR hardware for reception and transmission of RF
signal.
2. Familiarize how it can be interfaced with computer.
3. Familiarize with GNU Radio (or similar software’s like Simulink/ Lab-
View) that can be used to process the signals received through the SDR
hardware.
4. Familiarize available blocks in GNU Radio. Study how signals can be

generated and spectrum (or power spectral density) of signals can be
analyzed. Study how filtering can be performed.
2. FM Reception
1. Receive digitized FM signal (for the clearest channel in the lab) using the
SDR board.
2. Set up an LPF and FM receiver using GNU Radio.
3. Use appropriate sink in GNU Radio to display the spectrum of signal.
4. Resample the voice to make it suitable for playing on computer speaker.
3. FM Transmission
1. Use a wave file source.
2. Set up an FM transmitter using GNU Radio.
3. Resample the voice source and transmit using the SDR.
Schedule of Experiments Every experiment should be completed in three hours.
Text books and References
1. Carl Laufer, “The Hobbyist’s Guide to the RTL-SDR: Really Cheap

Software Defined Radio”
2. Neel Pandeya, “Implementation of a Simple FM Receiver in GNU Ra-

dio,” https://kb.ettus.com/
3. WH Tranter, KS Shanmugan, TS Rappaport, KL Kosbar, “Principles of

Communication Systems Simulation with Wireless Applications”,
Prentice Hall
4. Michael Ossmann, “Software Defined Radio with HackRF,” YouTube

Tutorial
5. Mathuranathan Viswanathan, “Digital Modulations using Python”

ECD334 MINIPROJECT
PWS 0 0 3 2
Preamble: The course aims

 To estimate the ability of the students in transforming the theoretical knowledge
studied in to a working model of an electronic system
 For enabling the students to gain experience in organisation and implementation of
small projects.
 Design and development of Small electronic project based on hardware or a
combination of hardware and software for electronics systems.
Course Plan
In this course, each group consisting of three/four members is expected to design

and develop a moderately complex electronic system with practical applications,
this should be a working model. The basic concept of product design may be taken
into consideration.
Students should identify a topic of interest in consultation with Faculty/Advisor.

Review the literature and gather information pertaining to the chosen topic. State the
objectives and develop a methodology to achieve the objectives. Carryout the
design/fabrication or develop codes/programs to achieve the objectives.
Demonstrate the novelty of the project through the results and outputs. The progress
of the mini project is evaluated based on a minimum of two reviews.
The review committee may be constituted by the Head of the Department. A project
report is required at the end of the semester. The product has to be demonstrated for
its full design specifications. Innovative design concepts, reliability considerations,
aesthetics/ergonomic aspects taken care of in the project shall be given due weight.
Course Outcomes
Be able to practice acquired knowledge within the selected area of
CO1 technology for project development.
Identify, discuss and justify the technical aspects and design aspects
CO2 of the project with a systematic approach.
Reproduce, improve and refine technical aspects for engineering
CO3 projects.
CO4 Work as a team in development of technical projects.
Communicate and report effectively project related activities and

CO5 findings.

1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 3 2 3 2
CO 2 3 3 3 2 3 3 2
CO 3 3 3 3 2 3 3 2
CO 4 3 3 3 2
CO 5 3 3 3 2
Evaluation
The internal evaluation will be made based on the product, the report and a viva- voce
examination, conducted by a 3-member committee appointed by Head of the
Department comprising HoD or a senior faculty member, Academic coordinator for
that program, project guide/coordinator.
The Committee will be evaluating the level of completion and demonstration of

functionality/specifications, presentation, oral examination, work knowledge and
involvement.
Mark distribution
Total Marks CIE ESE ESE Duration

150 75 75 1 hour
Split-up of CIE
Component Marks
Attendance 10
Marks awarded based on guide’s evaluation 15
Project Report 10
Evaluation by Committee 40
Split-up of ESE
Component Marks
Level of completion 10
Demonstration of 25
functionality
Project Report 10
Viva-voce 20
Presentation 10
Category L T P CREDIT
Industrial Economics &
HUT 300
Foreign Trade HSMC 3 0 0 3
Preamble: To equip the students to take industrial decisions and to create awareness of economic
environment.
Prerequisite: Nil
Explain the problem of scarcity of resources and consumer behaviour, and to evaluate
CO1 the impact of government policies on the general economic welfare. (Cognitive
knowledge level: Understand)
Take appropriate decisions regarding volume of output and to evaluate the social cost
CO2
of production. (Cognitive knowledge level: Apply)
Determine the functional requirement of a firm under various competitive conditions.

CO3
(Cognitive knowledge level: Analyse)
Examine the overall performance of the economy, and the regulation of economic
CO4 fluctuations and its impact on various sections in the society. (Cognitive knowledge
level: Analyse)
Determine the impact of changes in global economic policies on the business
CO5
opportunities of a firm. (Cognitive knowledge level: Analyse)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 2 3
CO2 2 2 2 2 3 3
CO3 2 2 1 3
CO4 2 2 1 1 3
CO5 2 2 1 3
1
Abstract POs defined by National Board of Accreditation
PO# Broad PO PO# Broad PO
PO1 Engineering Knowledge PO7 Environment and Sustainability
PO2 Problem Analysis PO8 Ethics
PO3 Design/Development of solutions PO9 Individual and team work

Conduct investigations of complex
PO4 PO10 Communication
problems
PO5 Modern tool usage PO11 Project Management and Finance
PO6 The Engineer and Society PO12 Lifelong learning
Assessment Pattern
Bloom’s Category Continuous Assessment Tests End Semester

Examination Marks
Test 1 (Marks) Test 2 (Marks)
Remember 15 15 30
Understand 20 20 40
Apply 15 15 30
Mark Distribution
Total Marks CIE Marks ESE Marks ESE Duration

150 50 100 3 hours
2
Continuous Assessment - Test (2 numbers) : 25 marks
Continuous Assessment - Assignment : 15 marks
Internal Examination Pattern:
Each of the two internal examinations has to be conducted out of 50 marks. First series test shall
be preferably conducted after completing the first half of the syllabus and the second series test
shall be preferably conducted after completing remaining part of the syllabus. There will be two
parts: Part A and Part B. Part A contains 5 questions (preferably, 2 questions each from the
completed modules and 1 question from the partly completed module), having 3 marks for each
question adding up to 15 marks for part A. Students should answer all questions from Part A.
Part B contains 7 questions (preferably, 3 questions each from the completed modules and 1
question from the partly completed module), each with 7 marks. Out of the 7 questions, a student
should answer any 5.
End Semester Examination Pattern:
There will be two parts; Part A and Part B.

Part A : 30 marks
Part B : 70 marks
Part A contains 10 questions with 2 questions from each module, having 3 marks for each
question. Students should answer all questions. Part B contains 2 questions from each module of
which a student should answer any one. Each question can have maximum 3 sub-divisions and
carries 14 marks.
3
SYLLABUS
HUT 300 Industrial Economics & Foreign Trade
Module 1 (Basic Concepts and Demand and Supply Analysis)
Scarcity and choice - Basic economic problems- PPC – Firms and its objectives – types of firms
– Utility – Law of diminishing marginal utility – Demand and its determinants – law of demand
– elasticity of demand – measurement of elasticity and its applications – Supply, law of supply
and determinants of supply – Equilibrium – Changes in demand and supply and its effects –
Consumer surplus and producer surplus (Concepts) – Taxation and deadweight loss.
Module 2 (Production and cost)
Production function – law of variable proportion – economies of scale – internal and external
economies – Isoquants, isocost line and producer’s equilibrium – Expansion path – Technical
progress and its implications – Cobb-Douglas production function - Cost concepts – Social cost:
private cost and external cost – Explicit and implicit cost – sunk cost - Short run cost curves -
long run cost curves – Revenue (concepts) – Shutdown point – Break-even point.
Module 3 (Market Structure)
Perfect and imperfect competition – monopoly, regulation of monopoly, monopolistic completion

(features and equilibrium of a firm) – oligopoly – Kinked demand curve – Collusive oligopoly
(meaning) – Non-price competition – Product pricing – Cost plus pricing – Target return pricing
– Penetration pricing – Predatory pricing – Going rate pricing – Price skimming.
Module 4 (Macroeconomic concepts)
Circular flow of economic activities – Stock and flow – Final goods and intermediate goods -
Gross Domestic Product - National Income – Three sectors of an economy- Methods of
measuring national income – Inflation- causes and effects – Measures to control inflation-
Monetary and fiscal policies – Business financing- Bonds and shares -Money market and Capital
market – Stock market – Demat account and Trading account - SENSEX and NIFTY.
Module 5 (International Trade)
Advantages and disadvantages of international trade - Absolute and Comparative advantage

theory - Heckscher - Ohlin theory - Balance of payments – Components – Balance of Payments
4
deficit and devaluation – Trade policy – Free trade versus protection – Tariff and non-tariff
barriers.
Reference Materials
1. Gregory N Mankiw, ‘Principles of Micro Economics’, Cengage Publications
2. Gregory N Mankiw, ‘Principles of Macro Economics’, Cengage Publications
3. Dwivedi D N, ‘Macro Economics’, Tata McGraw Hill, New Delhi.
4. Mithani D M, ‘Managerial Economics’, Himalaya Publishing House, Mumbai.
5. Francis Cherunilam, ‘International Economics’, McGraw Hill, New Delhi.
Sample Course Level Assessment Questions
Course Outcome 1 (CO1):

1. Why does the problem of choice arise?
2. What are the central problems?
3. How do we solve the basic economic problems?
4. What is the relation between price and demand?
5. Explain deadweight loss due to the imposition of a tax.
1. What is shutdown point?

2. What do you mean by producer equilibrium?
3. Explain break-even point;
4. Suppose a chemical factory is functioning in a residential area. What are the external costs?
1. Explain the equilibrium of a firm under monopolistic competition.

2. Why is a monopolist called price maker?
3. What are the methods of non-price competition under oligopoly?
5
4. What is collusive oligopoly?
1. What is the significance of national income estimation?

2. How is GDP estimated?
3. What are the measures to control inflation?
4. How does inflation affect fixed income group and wage earners?
1. What is devaluation?
2. Suppose a foreign country imposes a tariff on Indian goods. How does it affect India’s
exports?
3. What is free trade?
4. What are the arguments in favour of protection?
6
QP CODE: PAGES:3
Reg No:______________ Name :______________
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY FIFTH /SIXTH SEMESTER

B.TECH DEGREE EXAMINATION, MONTH & YEAR
Course Code: HUT 300
Course Name: Industrial Economics & Foreign Trade
Max.Marks:100 Duration: 3 Hours
PART A
Answer all Questions. Each question carries 3 Marks
1. Why does an economic problem arise?
2. What should be the percentage change in price of a product if the sale is to be increased by 50
percent and its price elasticity of demand is 2?
3. In the production function Q= 2L 1/2K 1/2 if L=36 how many units of capital are needed to
produce 60 units of output?
4. Suppose in the short run AVC 4. Suppose in the short run AVC<P<AC. Will this firm produce
or shut down? Give reason.
5. What is predatory pricing?
6. What do you mean by non- price competition under oligopoly?
7. What are the important economic activities under primary sector?
8. Distinguish between a bond and share?
9. What are the major components of balance of payments?
7
10. What is devaluation? (10 x 3 = 30 marks)
PART B
(Answer one full question from each module, each question carries 14 marks)
MODULE I
11. a) Prepare a utility schedule showing units of consumption, total utility and marginal
utility, and explain the law of diminishing marginal utility. Point out any three
limitations of the law.
b) How is elasticity of demand measured according to the percentage method? How is
the measurement of elasticity of demand useful for the government?
Or
12. a) Explain the concepts consumer surplus and producer surplus.
b) Suppose the government imposes a tax on a commodity where the tax burden met
by the consumers. Draw a diagram and explain dead weight loss. Mark consumer
surplus, producer surplus, tax revenue and dead weight loss in the diagram.
MODULE II
13. a) What are the advantages of large-scale production?
b) Explain Producer equilibrium with the help of isoquants and isocost line. What is
expansion path?
Or
14. a) Explain break-even analysis with the help of a diagram.
b) Suppose the monthly fixed cost of a firm is Rs. 40000 and its monthly total variable
cost is Rs. 60000.
i. If the monthly sales is Rs. 120000 estimate contribution and break-even sales.
ii. If the firm wants to get a monthly profit of Rs.40000, what should be the sales?
c) The total cost function of a firm is given as TC=100+50Q - 11Q2+Q3. Find

marginal cost when output equals 5 units.
MODULE III
8
15. a) What are the features of monopolistic competition?
b) Explain the equilibrium of a firm earning supernormal profit under monopolistic
competition.
Or
16.a) Make comparison between perfect competition and monopoly.
b) Explain price rigidity under oligopoly with the help of a kinked demand curve.
MODULE IV
17. a) How is national income estimated under product method and expenditure method?
b) Estimate GDPmp, GNPmp and National income
Private consumption = 2000 (in 000 cores)

expenditure
= 500
Government Consumption
NFIA = -(300)
Investment = 800
Net=exports =700
Depreciation = 400
Net-indirect tax = 300
Or
18. a) What are the monetary and fiscal policy measures to control inflation?
b) What is SENSEX?
MODULE V
19. a) What are the advantages of disadvantages of foreign trade?
b) Explain the comparative cost advantage.
Or
20. a) What are the arguments in favour protection?
b) Examine the tariff and non-tariff barriers to international trade.
(5 × 14 = 70 marks)
9
Teaching Plan
Module 1 (Basic concepts and Demand and Supply Analysis) 7 Hours
1.1 Scarcity and choice – Basic economic problems - PPC 1 Hour
1.2 Firms and its objectives – types of firms 1 Hour
1.3 Utility – Law of diminishing marginal utility – Demand – law of demand 1 Hour
1.4 Measurement of elasticity and its applications 1 Hour
1.5 Supply, law of supply and determinants of supply 1 Hour
1.6 Equilibrium – changes in demand and supply and its effects 1 Hour
Consumer surplus and producer surplus (Concepts) – Taxation and
1.7 1 Hour
deadweight loss.
Module 2 (Production and cost) 7 Hours
2.1 Productions function – law of variable proportion 1 Hour
2.2 Economies of scale – internal and external economies 1 Hour
2.3 producers equilibrium – Expansion path 1 Hour
2.4 Technical progress and its implications – cob Douglas Production function 1 Hour
Cost concepts – social cost: private cost and external cost – Explicit and
2.5 1 Hour
implicit cost – sunk cost
2.6 Short run cost curves & Long run cost curves 1 Hour
2.7 Revenue (concepts) – shutdown point – Break-even point. 1 Hour

Module 3 (Market Structure) 6 hours
3.1 Equilibrium of a firm, MC – MR approach and TC – TR approach 1 Hour
3.2 Perfect competition & Imperfect competition 1 Hour
3.3 Monopoly – Regulation of monopoly – Monopolistic competition 1 Hour
3.4 Oligopoly – kinked demand curve 1 Hour
3.5 Collusive oligopoly (meaning) – Non price competition 1 Hour

Cost plus pricing – Target return pricing – Penetration, Predatory pricing –
3.6 1 Hour
Going rate pricing – price skimming
10
Module 4 (Macroeconomic concepts) 7 Hours
4.1 Circular flow of economic activities 1 Hour
Stock and flow – Final goods and intermediate goods – Gross Domestic
4.2 1 Hour
Product - National income – Three sectors of an economy
4.3 Methods of measuring national income 1 Hour
4.4 Inflation – Demand pull and cost push – Causes and effects 1 Hour
4.5 Measures to control inflation – Monetary and fiscal policies 1 Hour

Business financing – Bonds and shares – Money market and capital
4.6 1 Hour
market
Stock market – Demat account and Trading account – SENSEX and
4.7 1 Hour
NIFTY
Module 5 (International Trade) 8 Hours
5.1 Advantages and disadvantages of international trade 1 Hour
5.2 Absolute and comparative advantage theory 2 Hour
5.3 Heckscher – Ohlin theory 1 Hour
5.4 Balance of payments - components 1 Hour
5.5 Balance of payments deficit and devaluation 1 Hour
5.6 Trade policy – Free trade versus protection 1 Hour
5.7 Tariff and non tariff barriers. 1 Hour
11
ECT312 DIGITAL SYSTEM DESIGN
PEC 2 1 0 3
Preamble: This course aims to design hazard free synchronous and asynchronous sequential
circuits and implement the same in the appropriate hardware device
Prerequisite: ECT203 Logic Circuit Design
CO 1
Analyze clocked synchronous sequential circuits
K4
CO 2
Analyze asynchronous sequential circuits
K4
CO 3
Design hazard free circuits
K3
CO 4
Diagnose faults in digital circuits
K3
CO 5
Summarize the architecture of FPGA and CPLDs
K2

PO PO PO
PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PO 8 PO 9
10 11 12
CO1 3 3 3 2 2 2 3
CO2 3 3 2 2 2 3
CO3 3 3 3 3 2 2 3
CO4 3 2 1 2 2 3
CO5 2 2 2 3
Assessment Pattern
Tests
1 2
Remember K1 10 10 15
Apply K3 20 20 35
Analyse K4 10 20
Evaluate
Create
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours

14 marks.
Course Outcome 1 (CO1): Analyze clocked synchronous sequential circuits (K4)

1. Construct an ASM chart for a sequence recognizer to recognize the input sequence of pairs
x1x2= 01, 01, 11, 00. The output variable, ‘z’ is asserted when x1x2= 00 if and only if
the three preceding pairs of inputs are x1x2= 01, 01 and 11, in that order.
2. Obtain a minimal state table for a clocked synchronous sequential network having a single
input line ‘x’ in which the symbols 0 and 1 are applied and a single output line ‘z’. An
outputof 1 is to be produced if and only if the 3 input symbols following two consecutive
input 0’s consist of at least one 1. An example of input/output sequences that satisfy the
conditions of the network specifications is:
x=0100010010010010000000011
z=0000001000000100000000001
3. Analyse the following clocked synchronous sequential network. Derive the next state and
output equations. Obtain the excitation table, transition table, state table and state
diagram.
Course Outcome 2 (CO2): Analyze asynchronous sequential circuits (K4)
1. A reduced flow table for a fundamental-mode asynchronous sequential network is given
below. Using the universal multiple-row state assignment, construct the corresponding
expanded flow table and transition table. Assign outputs where necessary such that there is at
most a single output change during the time the network is unstable. Assume that the inputs x1
and x2 never change simultaneously.
Next state Output (z)
Present state Input state (x1x2) Input state (x1x2)
00 01 10 11 00 01 10 11
A A B A D 1 - 0 -
B D B B C - 0 1 -
C A C C C - 1 1 0
D D C A D 0 - - 1
2. Analyze the asynchronous sequential network by forming the excitation/transition table, state
table, flow table and flow diagram. The network operates in the fundamental mode with the
restriction that only one input variable can change at a time.
3. Describe races in ASN with example.
Course Outcome 3 (CO3): Design hazard free circuits (K3)

1. Differentiate between static and dynamic hazard.
2. Examine the possibility of hazards in the (i) OR-AND logic circuit whose Boolean
function is given by (ii) AND-OR logic circuit whose Boolean function is
given by . Show how the hazard can be detected and eliminated in each circuit.
3. Investigate the problem of clock skew in practical sequential circuits and suggest solutions
with justification to minimize or eliminate it.
Course Outcome 4 (CO4): Diagnose faults in digital circuits (K3)

1. Illustrate the fault table method used for effective test set generation for the circuit whose
Boolean function is
2. Find the test vectors of all SA0 and SA1 faults of the circuit whose Boolean function is
by the Kohavi algorithm.
3. Write a note on BIST techniques.
Course Outcome 5 (CO5): Summarize the architecture of FPGA and CPLDs (K2)
1. Draw and explain the architecture of Xilinx XC4000 configurable logic block.
2. Draw and explain the architecture of Xilinx 9500 CPLD family.
3. Explain the internal structure of XC4000 input/output block.
SYLLABUS
Module 1: Clocked Synchronous Networks

Analysis of clocked Synchronous Sequential Networks (CSSN), Modelling of CSSN – State
assignment and reduction, Design of CSSN, ASM Chart and its realization
Module 2: Asynchronous Sequential Circuits

Analysis of Asynchronous Sequential Circuits (ASC), Flow table reduction- Races in ASC,
State assignment problem and the transition table- Design of AS, Design of ALU
Module 3: Hazards
Hazards – static and dynamic hazards – essential, Design of Hazard free circuits – Data
synchronizers, Mixed operating mode asynchronous circuits, Practical issues- clock skew and
jitter, Synchronous and asynchronous inputs – switch bouncing
Module 4: Faults
Fault table method – path sensitization method – Boolean difference method, Kohavi
algorithm, Automatic test pattern generation – Built in Self Test (BIST)
Module 5: CPLDs and FPGA

CPLDs and FPGAs - Xilinx XC 9500 CPLD family, functional block diagram– input output
block architecture - switch matrix, FPGAs – Xilinx XC 4000 FPGA family – configurable
logic block - input output block, Programmable interconnect
Text Books
1. Donald G Givone, Digital Principles & Design, Tata McGraw Hill, 2003
2. John F Wakerly, Digital Design, Pearson Education, Delhi 2002
3. John M Yarbrough, Digital Logic Applications and Design, Thomson Learning
Reference Books
1. Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman, Digital Systems Testing
and Testable Design, John Wiley & Sons Inc.
2. Morris Mano, M.D.Ciletti, Digital Design, 5th Edition, PHI.
3. N. N. Biswas, Logic Design Theory, PHI
4. Richard E. Haskell, Darrin M. Hanna , Introduction to Digital Design Using Digilent
FPGA Boards, LBE Books- LLC
5. Samuel C. Lee, Digital Circuits and Logic Design, PHI
6. Z. Kohavi, Switching and Finite Automata Theory, 2nd ed., 2001, TMH

No. of
No Topic
Lectures
1 Clocked Synchronous Networks
1.1 Analysis of clocked Synchronous Sequential Networks(CSSN) 2
1.2 Modelling of CSSN – State assignment and reduction 2
1.3 Design of CSSN 2
1.4 ASM Chart and its realization 1
2 Asynchronous Sequential Circuits
2.1 Analysis of Asynchronous Sequential Circuits (ASC) 2
2.2 Flow table reduction- Races in ASC 2
2.3 State assignment problem and the transition table- Design of AS 2
2.4 Design of ALU 2

3 Hazards
3.1 Hazards – static and dynamic hazards – essential 1
3.2 Design of Hazard free circuits – Data synchronizers 1
3.3 Mixed operating mode asynchronous circuits 1
3.4 Practical issues- clock skew and jitter 1
3.5 Synchronous and asynchronous inputs – switch bouncing 2
4 Faults
4.1 Fault table method – path sensitization method – Boolean 2
difference method
4.2 Kohavi algorithm 2
4.3 Automatic test pattern generation – Built in Self Test(BIST) 3
5 CPLDs and FPGA
5.1 CPLDs and FPGAs - Xilinx XC 9500 CPLD family, functional 3
block diagram– input output block architecture - switch matrix
5.2 FPGAs – Xilinx XC 4000 FPGA family – configurable logic 3
block - input output block, Programmable interconnect
Simulation Assignments:
At least one assignment should be design of digital circuits that can be used in day today life.
This has to be done in a phased manner. The first phase involves the design in HDL (VHDL/
Verilog) and the second phase implementing the same in a hardware device. Some of the
assignments are as listed below:
1. Design of vending machine

2. Design of ALU
3. Architecture of different FPGAs
4. Architecture of different CPLDs
5. Fault detection methods other than those mentioned in the syllabus
6. Metastability condition and methods to avoid it

Course Code: ECT312
Course Name: DIGITAL SYSTEM DESIGN

PART A
Answer ALL Questions. Each carries 3 marks.
1 Differentiate Mealy and Moore models. K1

2 What are the elements in an ASM chart? K1
3 Describe one-hot assignment technique. K2

4 Define critical and non-critical races. K1
5 What is jitter? List the sources of clock jitter. K2
6 Differentiate positive skew and negative skew. K2
7 List the different types of faults in digital circuits. K1

8 Differentiate between fault and defect. K2
9 What are FPGA? What are the advantages of FPGA? K1
10 Differentiate between FPGA and CPLD K2
PART – B
Answer one question from each module; each question carries 14 marks.
Module - I
11 a Analyze the following sequential network. Derive the next state and output
equations. Obtain its transition table and state table.
8
CO1
K4
b. Construct an ASM chart for the following state diagram shown. Determine the
model of CSSN that this system conforms to with proper justification. 6
CO1
K3
OR
12 For the clocked synchronous sequential network, construct the excitation table, 8
transition table, state table and state diagram. CO1
K4
b. Obtain a minimal state table for a clocked synchronous sequential network having a
single input line ‘x’ in which the symbols 0 and 1 are applied and a single output
line ‘z’. An output of 1 is to be produced if and only if the 3 input symbols
following two consecutive input 0’s consist of at least one 1. An example of
6
input/output sequences that satisfy the conditions of the network specifications is:
x= 0100010010010010000000011
z= 0000001000000100000000001
CO1
K3
Module - II
13a Analyze the asynchronous sequential network by forming the excitation/transition 14

table, state table, flow table and flow diagram. The network operates in the
fundamental mode with the restriction that only one input variable can change at a
time.
CO2
K4
OR
14a A reduced flow table for a fundamental-mode asynchronous sequential network is

given below. Using the universal multiple-row state assignment, construct the corre-
sponding expanded flow table and transition table. Assign outputs where necessary 14
such that there is at most a single output change during the time the network is un-
stable. Assume that the inputs and never change simultaneously.
CO2
K4
Next state Output (z)
Present state Input state ( Input state (
00 01 10 11 00 01 10 11
A A B A D 1 - 0 -
B D B B C - 0 1 -
C A C C C - 1 1 0
D D C A D 0 - - 1
Module - III
15a. Examine the possibility of hazard in the OR-AND logic circuit whose Boolean 8
function is given by . Show how the hazard can be detected and
eliminated. CO3
b. Explain essential hazards in asynchronous sequential networks. What are the K3
constraints to be satisfied to avoid essential hazards? 6
OR
CO3
K3
16a Draw the logic diagram of the POS expression Y= (x1+x2’) (x2+x3). Show that
there is a static-0 hazard when x1 and x3 are equal to 0 and x2 goes from 0 to 1. 9
Find a way to remove the hazard by adding one or more gates. CO3
K3
5
b Discuss the concept of switch bouncing and suggest a suitable solution.
K3
Module - IV
17a Illustrate the fault table method used for effective test set generation for the circuit 8
whose Boolean function is CO 4

K3
b How can the timing problems in asynchronous sequential circuits be solved using 6
mixed operating mode circuits?
K3
OR
18 Find the test vectors of all SA0 and SA1 faults of the circuit whose Boolean 8
a.
function is by the Kohavi algorithm. CO4
K3
b.
Identify different test pattern generation for BIST 6
CO4
K3
Module - V
19 Explain the architecture of XC 4000 FPGA family. 14
CO5
K2
OR
20 Draw and explain the architecture of Xilinx 9500 CPLD family. Also explain the 14
function block architecture. CO5
K2
ECT342 EMBEDDED SYSTEMS
PEC 2 1 0 3
Preamble: This course aims to design an embedded electronic circuit and implement the same.
Prerequisite: ECT 203 Logic Circuit Design, ECT 202 Analog Circuits ,ECT 206 Computer
Architecture and Microcontrollers
CO 1 Understand and gain the basic idea about the embedded system.
K2
CO 2 Able to gain architectural level knowledge about the system and hence to program an
K3 embedded system.
CO 3 Apply the knowledge for solving the real life problems with the help of an embedded
K3 system.
1 2 3 4 5 6 7 8 9 10 11 12
CO 3 3 2 1 2 2
1
CO 3 3 3 3 2 2
2
CO 3 3 3 3 2 3 2
3
Assessment Pattern

Tests
1 2
Apply K3 20 20 70
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE
Marks Duration
150 50 100 3 hours

End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain
10 questions with 2 questions from each module, having 3 marks for each question. Students
should answer all questions. Part B contains 2 questions from each module of which student
should answer any one. Each question can have maximum 2 sub-divisions and carry 14 marks.
Course Outcome 1 (CO1) : Understand the embedded system fundamentals and system
design (K1).
1. Give the challenges of embedded computing.

2. Give the structural description of embedded system.
3. What are the phases of EDLC ?.
Course Outcome 2 (CO2): Understand the peripheral devices and their interfacing with the
processor. (K2)
1. Compare and contrast the PCI bus and PCI-X bus.

2. How the ROM memories are classified? Explain.
3. How the peripheral devices are connected with processors?
Course Outcome 3 (CO3): To understand the ARM processor architecture and pipeline
processor organization. (K3)
1. Give the architecture of the ARM processor and explain the registers.
2. Explain the pipelined architecture of ARM processor.
3. Write an ARM assembly language program to print the sum of two numbers.
Course Outcome 4 (CO4): To write programs in assembly and high level languages for
ARM processor. (K3)
1. Write a note on Thumb single register in ARM processor.

2. Briefly discuss about the Advanced Microcontroller Bus Architecture (AMBA).
3. What are the data types supported by ARM programming high level languages?
Course Outcome 5 (CO5): To understand the basics of real time operating systems and
their use in embedded systems. (K2)
1. What are the functions of a Kernel?

2. Describe the process ,” Deadlock”
3. Give the features of a real time operating system.
SYLLABUS
Module 1 : Introduction to Embedded Systems( 06 Hours )
1.1 Complex Systems and Microprocessors

Embedding Computers, Characteristics of Embedded Computing Applications, Application
of Microprocessors, The Physics of Software, Challenges in Embedded Computing System,
Characteristics and quality attributes of an embedded system, Performance in Embedded
Computing
1.2 The Embedded System Design Process
Requirements, Specification , Architecture Design, Designing Hardware and Software
Components ,System Integration.
1.3 Formalisms for System Design
Structural Description, Behavioral Description, An embedded system design example.
1.4 Embedded product development cycle (EDLC)
Different phases of EDLC, EDLC models
Module 2 : Embedded system interfacing and peripherals (06 Hours)
2.1 Communication devices

Serial Communication Standards and Devices - UART, HDLC and SPI. Serial Bus Protocols -
I2C Bus, CAN Bus and USB Bus. Parallel communication standards ISA, PCI and PCI-X Bus.
2.2 Memory
Memory devices and systems – ROM-Flash, EEPROM,RAM-SRAM, DRAM, Cache memory,
memory mapping and addresses, memory management unit– DMA .
2.3 I/O Device

Interrupts--Interrupt sources, recognizing an interrupt, ISR – Device drivers for handling ISR,
Shared data problem, Interrupt latency.
Module 3 : ARM Processor fundamentals (07 Hours )
3.1 ARM Processor architecture

The Acorn RISC Machine, Architectural inheritance, The ARM programmer's model, ARM
development tools.
3.2 ARM Assembly Language Programming
Data processing instructions, Data transfer instructions, Control flow instructions, writing simple
assembly language programs.
3.3 ARM Organization and Implementation
Three stage pipeline ARM organization, Five stage pipeline ARM organization, ARM
instruction execution, ARM implementation, The ARM coprocessor interface.
Module 4: ARM Programming (10 Hours)

4.1 Architectural Support for High-Level Languages
Abstraction in software design, Data types, Floating-point data types, The ARM floating-point
architecture, Expressions, Conditional statements, Loops, Functions and procedures, Use of
memory, Run-time environment.
4.2 The Thumb Instruction Set
The Thumb bit in the CPSR, The Thumb programmer's model, Thumb branch instructions,
Thumb software interrupt instruction, Thumb data processing instructions, Thumb single register
data transfer instructions, Thumb multiple register data transfer instructions, Thumb breakpoint
instruction, Thumb implementation, Thumb applications.
4.3 Architectural Support for System Development
The ARM memory interface, The Advanced Microcontroller Bus Architecture (AMBA).
4.4 Programming
Assembly and C language programming applications of embedded systems.
Module 5: Real Time Operating Systems (07 Hours)

5.1 Operating system basics
Kernel, types of operating systems.
5.2 Real time operating systems
Tasks, process, threads, multiprocessing and multi-tasking, task scheduling, types, threads and
process scheduling, task communication, task synchronization, device drivers, choosing an
RTOS.
Text Books
1. 1. Raj kamal, Embedded Systems Architecture, Programming and Design, TMH, 2003
2. K.V. Shibu, Introduction to Embedded Systems, 2e, McGraw Hill Education India, 2016.
3. Wayne Wolf, Computers as Components: Principles of Embedded Computing System
Design, Morgan Kaufman Publishers - Elsevier 3ed, 2008
4. Steve Furber, ARM system-on-chip architecture, Addison Wesley, Second Edition, 2000
Reference Books
1. David E. Simon, An Embedded Software Primer, Pearson Education Asia, First

Indian Reprint 2000.
2. Steve Heath, Embedded Systems Design, Newnes – Elsevier 2ed, 2002
3. Andrew N. Sloss, Dominic Symes, Chris Wright, ARM System Developer’s Guide
Designing and Optimizing System Software, Morgan Kaufmann Publishers 2004
4. Frank Vahid and Tony Givargis, Embedded Systems Design – A Unified Hardware
/ Software Introduction, John Wiley, 2002.
5. Tammy Noergaard, Embedded Systems Architecture, A Comprehensive Guide for
Engineers and Programmers, Newnes – Elsevier 2ed, 2012
6. Iyer - Embedded Real time Systems, 1e, McGraw Hill Education New Delhi, 2003
7. Lyla B. Das, Embedded Systems: An Integrated Approach, 1/e , Lyla B. Das,
Embedded Systems, 2012

1 Introduction to Embedded Systems
1.1 Complex Systems and Microprocessors 2

1.2 The Embedded System Design Process 1
1.3 Formalisms for System Design 2
1.4 Embedded product development cycle (EDLC) 1
2 Embedded system interfacing and peripherals

2.1 Communication devices 3
2.2 Memory 2
2.3 I/O Device 2
3 ARM Processor fundamentals

3.1 ARM Processor architecture 2
3.2 ARM Assembly Language Programming 3
3.3 ARM Organization and Implementation 2
4 ARM Programming
4.1 Architectural Support for High-Level Languages 2
4.2 The Thumb Instruction Set 3
4.3 Architectural Support for System Development 2
4.4 Programming 3
5 Real Time Operating Systems

5.1 Operating system basics 2
5.2 Real time operating systems 5
Simulation Assignments:
1. At least one assignment should be of programming (Both assembly and C languages) of

embedded processor with simulation tools like Keil, Eclipse.
2. Another assignment should be an embedded system design mini project.
Programming assignments can be the following
(a) Print “HELLO WORLD” or any text (b) Data transfer, copy operations (c)
Arithmetic operations (d) Sorting operations (e) input/output control (f) programs
using functions (g) Interrupts and ISR (h) controller design
Mini project can be done in the following areas.
(a) Elevator controller design (b) Chocolate vending machine design (c) Industrial controller
using sensors (d) IOT applications using sensors, communication devices and actuators

Course Code: ECT342

Course Name: EMBEDDED SYSTEM DESIGN
PART A
(Answer ALL Questions. Each Question Carries 3 Marks.)
1. Define an embedded system

2. Write any 3 challenges of embedded system design
3. Explain how an RS232 device is interfaced to a processor
4. What is interrupt latency?
5. Write the contents of CPSR register of ARM processor and their use.
6. Draw the five stage pipeline architecture of ARM processor
7. What is the use of thumb instruction set in ARM processor?
8. What a note on ARM memory interface
9. What is a real time operating system?
10. What are tasks, processes and threads? [10 X 3= 30]
PART – B
(Answer one question from each module; each question carries 14 marks)
Module – I
11. (a) What are the characteristics of an embedded system? Explain. [07 Marks]
(b) Explain the different phases of EDLC. [07 Marks]
OR
12. (a) Write different steps involved in the embedded system design process. [07 Marks]
(b) Explain the structural description of embedded system design. [07 Marks]
Module – II
13. (a) What is serial and parallel port communication? Explain with the help of necessary
diagrams. [07 Marks]
(b) What is interrupt? How interrupts are handled in a processor? Explain ISR.[07 Marks]
OR
14. (a) With the help of a diagram show how ROM and RAM are interfaced to a
processor. Explain the read/write processes. [07 Marks]
(b) Explain how a memory management unit is used in a processor. What are its uses?
What is DMA ? [07 Marks]
Module – III
15. (a) Write a note on ARM processor architecture and its registers. [07 Marks]
(b) Write a note on data processing and data transfer instructions with the help of
examples [07 Marks]
OR
16. (a) What is pipeline architecture? Explain how an ARM instruction is executed in a 5
stage pipeline processor with the help of an example. [08 Marks]
(b) Write an ARM assembly language program to print text string “Hello World”.
[06 Marks]
Module – IV
17. (a) Explain ARM floating point architecture and discuss how floating point numbers are
handled [07 Marks]
(b) Write a note on Thumb single register and multiple register data transfer instructions
with the help of examples. [07 Marks]
OR
18. (a) What is Thumb instruction set? Why it is used? Explain Thumb progrmmers model.
[07 Marks]
(b) Draw the block diagram of AMBA architecture. What are the different types of buses
used in the architecture? [07 Marks]
Module V
19. (a) What are the different services of Kernel? Explain different types of Kernels.
[07Marks]
(b) Explain pre-emptive and non-pre-emptive scheduling algorithms with the help of an
example. [07 Marks]
OR
20. (a) What are the basic functions of real time Kernel? Explain. [07 Marks]
(b) Write a note on the following (a) shared memory (b) message passing (c) deadlock
[07 Marks]
ECT352 DIGITAL IMAGE PROCESSING
PEC 2 1 0 3
Preamble: This course aims to develop the skills for methods of various transformation and
analysis of image enhancement, image reconstruction, image compression, image segmentation
and image representation.
Prerequisite: ECT 303 Digital Signal Processing
Distinguish / Analyse the various concepts and mathematical transforms

CO 1
necessary for image processing
CO 2 Differentiate and interpret the various image enhancement techniques
CO 3 Illustrate image segmentation algorithm
CO 4 Understand the basic image compression techniques
1 2 3 4 5 6 7 8 9 10 11 12
CO 1 3 3 2 1 2
CO 2 3 3 2 1 2
CO 3 3 3 3 1 2
CO 4 3 3 3 1 2
Assessment Pattern
Continuous Assessment
Bloom’s Category Tests End Semester Examination
1 2
Apply K3 20 20 70
Analyse K4
Evaluate
Create
Mark distribution
Total ESE
CIE ESE
Marks Duration
150 50 100 3 hours
Attendance: 10 marks
End Semester Examination Pattern: There will be two parts; Part A and Part B. Part A contain 10
questions with 2 questions from each module, having 3 marks for each question. Students should
answer all questions. Part B contains 2 questions from each module of which student should answer
any one. Each question can have maximum 2 sub-divisions and carry 14 marks. The questions must
have 50% representation from theory, and 50% representation from logical/numerical/derivation/
proof.
Course Outcome 1 (CO1): Analyze the various concepts and restoration techniques for image
processing
1. For the given image check whether pixel P and Q have 8 connectivity.
2. Find filtered image using median filter.
3. Explain Weiner filtering.
Course Outcome 2 (CO2): Differentiate and interpret the various image enhancement techniques
1. Classify different image enhancement process. Differentiate between spatial domain and
frequency domain techniques of image enhancement.
2. What is histogram equalisation? Briefly discuss the underlying logic behind histogram
equalisation.
3. Apply mean and median filters over a given image.
Course Outcome 3 (CO3): Illustrate image segmentation algorithm

1. Name two basic approaches of image segmentation and mention their differences.
2. How can you decide optimal thresholds when the image contains a background and several
foreground objects? Write down a corresponding algorithm.
3. Write down the region growing algorithm. What are its advantages and disadvantages?
Course Outcome 4 (CO4): Analyze basic image compression techniques

1. What do you mean by compression ratio? Do you consider that lower compression ratio
ensures better images upon reproduction?
2. How can achievable compression ratio to be determined from image histogram?
3. Mention the steps of lossy and lossless JPEG compression
SYLLABUS
Module 1
Digital Image Fundamentals: Image representation, basic relationship between pixels, elements of
DIP system, elements of visual perception-simple image formation model. Vidicon and Digital
Camera working principles Brightness, contrast, hue, saturation, mach band effect
Colour image fundamentals-RGB, CMY, HIS models, 2D sampling, quantization.
Module 2
Review of matrix theory: row and column ordering- Toeplitz, Circulant and block matrix
2D Image transforms: DFT, its properties, Walsh transform, Hadamard transform, Haar transform,
DCT, KL transform and Singular Value Decomposition.
Image Compression: Need for compression, Basics of lossless compression – bit plane coding, run
length encoding and predictive coding, Basics of lossy compression – uniform and non-uniform
quantization techniques used in image compression, Concept of transform coding, JPEG Image
compression standard.
Module 3
Image Enhancement: Spatial domain methods: point processing- intensity transformations,
histogram processing, image subtraction, image averaging. Spatial filtering- smoothing filters,
sharpening filters.
Frequency domain methods: low pass filtering, high pass filtering, homomorphic filter
Module 4
Image Restoration: Degradation model, Unconstraint restoration- Lagrange multiplier and constraint
restoration
Inverse filtering- removal of blur caused by uniform linear motion, Weiner filtering,
Geometric transformations-spatial transformations
Module 5
Image segmentation: Classification of Image segmentation techniques, region approach, clustering
techniques. Segmentation based on thresholding, edge based segmentation. Classification of edges,
edge detection, Hough transform, active contour.
Text Books
1. Gonzalez Rafel C, Digital Image Processing, Pearson Education, 2009
2. S Jayaraman, S Esakkirajan, T Veerakumar, Digital image processing, Tata Mc Graw Hill, 2015
Reference Books
1. Jain Anil K , Fundamentals of digital image processing: , PHI,1988

2. Kenneth R Castleman , Digital image processing:, Pearson Education,2/e,2003
3. Pratt William K , Digital Image Processing: , John Wiley,4/e,2007
No. Topic No. of Lectures

1 Digital Image Fundamentals
1.1 Image representation, basic relationship between pixels, 3
elements of DIP system, elements of visual perception-
simple image formation model
1.2 Vidicon and Digital Camera working principles 1
1.3 Brightness, contrast, hue, saturation, mach band effect 1
1.4 Colour image fundamentals-RGB, CMY, HIS models 1
1.5 2D sampling, quantization. 1
2 Review of matrix theory
2.1 Row and column ordering- Toeplitz, Circulant and 2
block matrix
2.2 2D Image transforms : DFT, its properties, Walsh 3
transform, Hadamard transform, Haar transform
2.3 DCT, KL transform and Singular Value Decomposition. 3
2.4 Image Compression: Need for compression, Basics of 2
lossless compression – bit plane coding, run length
encoding and predictive coding, Basics of lossy
compression – uniform and non-uniform quantization
techniques used in image compression, Concept of
transform coding, JPEG Image compression standard..
3 Image Enhancement
3.1 Spatial domain methods: point processing- intensity 2
transformations, histogram processing, image
subtraction, image averaging
3.2 Spatial filtering- smoothing filters, sharpening filters 1
3.3 Frequency domain methods: low pass filtering, high 2
pass filtering, homomorphic filter.
4 Image Restoration
4.1 Degradation model, Unconstraint restoration- Lagrange 2
multiplier and constraint restoration
4.2 Inverse filtering- removal of blur caused by uniform 2
linear motion, Weiner filtering
4.3 Geometric transformations-spatial transformations 2
5 Image segmentation
5.1 Classification of Image segmentation techniques, region 2
approach, clustering techniques
5.2 Segmentation based on Thresholding, edge based 2
segmentation
5.3 Classification of edges, edge detection, Hough 3
transform, active contour
The following simulations be done in Scilab/ Matlab/ LabView:
1. Read Image data into the workspace.
2. Determine various transforms using matlab functions.
3. Detect and measure circular objects in an image.
4. Adjust the contrast of the given image.
5. Filter images using predefined filter.
6. Create degraded images affected by motion blur and noise by simulating the models for both.
Apply inverse filtering and Weiner filtering methods to the simulated images and compare
their performance.
7. Detect an object against the background using various edge detection algorithms and compare
their performance.
8. Create a histogram for a gray scale image.
9. Create image at various compression level.
10. Use texture segmentation to identify region based on their texture.


Course Code: ECT352
Course Name: DIGITAL IMAGE PROCESSING

PART A
Answer all questions, each carries 3 marks.
1. Give mathematical representation of digital images? Write down the names of different
formats used. K2
2. Explain mach band effect. K2
3. What is SVD? Explain its applications in digital image processing. K3
4. Write the similarity and difference between Hadamard and Walsh transforms K3
5. What are the advantages and disadvantages of block processing K2
6. Name the role of point operators in image enhancement K2
7. What is median filter? Explain the operation in 2D noise image with salt and pepper noise K3
8. Distinguish between linear and nonlinear image restoration. K3
9. Mention the use of derivative operation in edge detection. K4
10. The Pewitt edge operator is much better than Robert operator. Why? Give the matrix. K3
PART B
Answer any one full questions, from each module carries14marks.
Module 1
1. a) State and explain the 2D sampling theorem. Explain how aliasing errors can be eliminated? (7
marks)
b) Define the terms brightness, contrast, hue and saturation with respect to a digital image. Explain
the terms False contouring and Machband effect. (K1 – CO1) (7 marks)
OR
2. a) Explain elements of visual perception simple image formation model in detail (K1 – CO1) (8
marks)
b) Explain various color image models and its transformations (K1 - CO1) (6 marks)
Module 2
3. a) Explain the difference between DST and DCT. (K2 - CO1) (4 marks)
b) Compute the 2D DFT of the 4x4 gray scale image given below. (K3-CO1) (10 marks)
OR
4. a) Construct a Harr transform matrix for N=4. (4 marks) (K3-CO1)
b) Compute the 8-point DCT for following date X={2,4,6,8,10,6,4,2}. (10 marks)
Module 3
5. a) List histogram image enhancement techniques? Explain each one in detail. (10 marks)
K2-CO2
b) Write a note on color image enhancement. (K2-CO2) (4 marks)
OR
6. a) Describe the following in detail (i) Histogram equalization (ii) LPF and HPF in image
enhancement (iii) high boost filters (10 marks)
Module 4
7. a) Assume 4x4 image and filter the image using median filter of 3x3 neighbourhood.
Use replicate padding. (K3—CO1) (8 marks)
b) Explain the digital image restoration. (K1—CO1) (6 marks)
OR
8. a) Explain inverse filtering with necessary equations. (K1-CO1) (6 marks)
b) Differentiate various noise models. (K2-CO1) (8 marks)
Module 5
9. a) Explain the active contour algorithm for image segmentation any four geometric
transformations on an image. (K2-CO3) (7 marks)
c) Assume 4x4 image and filter the image using median filter of 3x3 neighbourhoods. Use
replicate padding (K3—CO1) (7 marks)
OR
10. a) Explain global, adaptive and histogram based thresholding in detail. (7 marks)
c) Explain Hough transform in detail (7 marks)
SEMESTER VI
HONOURS
ELECTRONIC DESIGN CATEGORY L T P CREDIT

ECT394
AUTOMATION VAC 3 1 0 4
Preamble: The course aims to introduce principles behind advanced methods in automation
of electronic design.
Prerequisites: Nil
CO 1 Apply Search Algorithms and Shortest Path Algorithms to find various graph
solutions.
CO 2 Outline VLSI Design Flow and Design Styles and apply partitioning algorithms on
graphs representing netlist.
CO 3 Illustrate Design Layout Rules and apply different algorithms for layout
compaction.
CO 4 Make use of various algorithms to solve placement and floorplan problems.
CO 5 Utilise different algorithms to solve routing problems.

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO PO PO
10 11 12
CO 1 3 2 3
CO 2 3 2 3
CO 3 3 2 3
CO 4 3 2 3
CO 5 3 2 3
Assessment Pattern
Bloom’s Category Continuous Assessment

Tests End Semester Examination
1 2
Remember
Apply K3 20 20 40
Analyse
Evaluate
Create
Mark distribution
Total CIE ESE ESE Duration

Marks
150 50 100 3 hours

14marks.
CO Assessment Questions
CO1: Apply Search Algorithms and Shortest Path Algorithms to find various graph
solutions
1.Represent the following graph by Adjacency Matrix.

2. List a DFS ordering of vertices for the graph shown in question 1 with starting node as H.
3. Perform topological sort on the graph in question1 and order the vertices with
Starting node is H.
CO2: Outline VLSI Design Flow and Design Styles and apply partitioning algorithms
on graphs representing netlist.
1.Perform KL partitioning on the above graph.You may assume any initial partition of
your choice.
2. Draw the flowchart of VLSI Design Flow and explain the different stages
CO3: Illustrate Design Layout Rules and apply different algorithms for layout
compaction.
1. For the following graph, find the longest path to all other vertices from vertex v0,
using Bellman-Ford Algorithm.
2. Use the Longest Path Algorithm to find the longest path from vertex A, in the
following graph
CO4: Make use of various algorithms to solve placement and floorplan problems.
1. Consider the following floorplan.
Draw the floorplan slicing tree and the polar graphs of the above floorplan.
CO5: Utilise different algorithms to solve routing problems.
1.Perform LEE’s Algorithm to find shortest path from S to T. Cells marked O

indicate obstructions.
O O O O
O S
2. Draw Horizontal and Vertical Constraint Graph for the following Channel
Routing
3.
Model Question Paper

APJ Abdul Kalam Technological University
Sixth Semester B Tech Degree Examination
Branch: Electronics and Communication
Course: ECT394 Electronic Design Automation
Time: 3 Hrs Max. Marks: 100
PART A
Answer All Questions
1. Define the following giving an example each (3) (K2)

(a) Degree of a vertex (b) Subgraph (c) Directed Acyclic Graph (DAG)
2. Represent the following graph by Adjacency Matrix. (3) (K2)
3. Write short note on (a) Full Custom Design (b) Standard Cell Design (3) (K1)
4. Explain any three parameters based on which Partitioning is performed. (3) (K1)
5. What are the minimum distance rules in Design Rules for layout? (3) (K1)
6. Write inequality expressions for minimum distance and maximum distance
constraints between two rectangular edges. (3) (K1)
7. For the following placement, calculate the wirelength by (a) Half Perimeter Method
(b) Maximum Rectilinear Tree Method (3) (K3)
8. Represent the following floorplan using Sequence Pair approach. (3) (K3)
9. How is Global Routing different from Detailed Routing? (3) (K1)

10. Define the following terms (a) Reserved Layer Model (b) Channel (c) Dogleg(3)(K1)
PART B
Answer one question from each module. Each question carries 14 marks.
11. (A) List a DFS ordering of vertices for the graph shown in question 2. (7) (K3)
Starting node is H.
(B) Perform topological sort on the graph and order the vertices. (7) (K3)
Starting node is H.
OR
12. (A) List a BFS ordering of vertices for the graph shown in question 2. (10)(K3)
Starting node is H.
(B) Give an application related to VLSI of BFS. (4) (K2)
13. Draw the flowchart of VLSI Design Flow and explain the different stages. (14) (K1)
OR
14. Perform KL partitioning on the following graph.You may assume any initial (14)(K3)
partition of your choice.
15. (A) For the following graph, find the longest path to all other vertices from (10) (K3)
vertex v0, using Bellman-Ford Algorithm.
(B) What is the time complexity of Liao-Wong and Bellman-Ford Algorithms?(4) (K2)
OR
16. (A) Use the Longest Path Algorithm to find the longest path from vertex A, (8) (K3)
in the following graph.
(B) What is the limitation of Longest Path Algorithm? (2) (K1)

(C) List two methods to find shortest path using Longest Path Algorithm (4) (K2)
17. Consider the following floorplan.
(A) Draw the floorplan slicing tree of the above floorplan. (6) (K3)
(B) Draw the polar graphs of above floorplan. (8) (K3)
OR
18. Given: Placement P with two fixed points p1 (100,175) and p2 (200,225), (14) (K3)
three free blocks a-c and four nets N1-N4. N1 (P1,a) N2 (a,b) N3 (b,c) N4 (c,P2). Find
the coordinates of blocks (xa, ya), (xb, yb) and (xc, yc).
19. Perform LEE’s Algorithm to find shortest path from S to T. Cells marked (14) (K3)
O indicate obstructions.
T
O O O O
O
O S
OR
20. Draw Horizontal and Vertical Constraint Graph for the following Channel (14) (K3)
Routing.
1. Develop C code for all algorithms in Module 1, 2 and 3.
2. A digital circuit can be taken through all steps od VLSI Design Flow (ie. From HDL
to Layout) using any standard tool set from Cadence, Synopsis or Mentor Graphics or
similar tools
Syllabus
Module 1: Graph Terminology, Search Algorithms and Shortest Path Algorithms:
Graph Terminology: Basic graph theory terminology, Data structures for representation of
Graphs Search Algorithms: Breadth First Search, Depth First Search, Topological Sort
Shortest Path Algorithms: Dijkstra’s Shortest-Path Algorithm for single pair shortest path,
Floyd Warshall Algorithm for all pair shortest path
Module 2: Design Automation and Partitioning Algorithms:

Design Automation: VLSI Design Flow, VLSI Design Styles
Partitioning: Levels of Partitioning, Parameters for Partitioning, Classification of
Partitioning Algorithms, Kernighan-Lin Algorithm, Fiduccia-Mattheyses Algorithm,
Simulated Annealing
Module 3: Layout Compaction:

Layout: Layout Layers and Design Rules, Physical Design Optimizations
Compaction: Applications of Compaction, Informal Problem Formulation, Graph
Theoretical Formulation, Maximum Distance Constraints, Longest Path algorithm for DAG,
Longest path in graph with cycles, Liao-Wong Algorithm, Bellman-Ford Algorithm.
Module 4: Placement and Floorplanning:

Placement: Optimization Objectives, Wirelength Estimation, Weighted Wirelength,
Maximum Cut Size, Wire Density
Placement Algorithms: Quadratic Placement
Floorplanning: Optimization Objectives, Slicing Floorplan, Non-Slicing Floorplan
Floorplan Representations: Constraint Graph, Sequence Pair
Floorplan Algorithms: Minimum Area Algorithm
Module 5: Global Routing and Detailed Routing:

Global Routing: Terminology and Definitions, Optimization Goals, Representation of
Routing Regions
Maze Routing Algorithms: Lee’s Algorithm, Hadlock Algorithm
Detailed Routing: Horizontal and Vertical Constraint Graph
Channel Routing Algorithms: Left-Edge algorithm
Text Books
1. Jin Hu, Jens Lienig, Igor L. Markov, Andrew B. Kahng, VLSI Physical Design: From
Graph Partitioning to Timing Closure, Springer, 2011th edition.
2. Gerez,Sabih H., “Algorithms for VLSI Design Automation”, John Wiley & Sons,
2006.
3. Sherwani, Naveed A., “Algorithms for VLSI Physical Design Automation”, Kluwer
Academic Publishers, 1999.
Reference Books
1. Sadiq M. Sait and H. Youssef, “VLSI Physical Design Automation: Theory and
Practice”, World Scientific, 1999.
2. Cormen, Thomas H., Charles E. Leiserson, and Ronald L. Rivest. "Introduction to
Algorithms." The MIT Press, 3rd edition, 2009.

Number
No. Topic of
Lectures
Graph Terminology, Search Algorithms and Shortest Path
1
Algorithms:
Graph Terminology: Basic graph theory terminology, Data
1.1 2
structures for representation of Graphs
Search Algorithms: Breadth First Search, Depth First Search,
1.2 2
Topological Sort
Shortest Path Algorithms: Dijkstra’s Shortest-Path Algorithm for
1.3 single pair shortest path, Floyd Warshall Algorithm for all pair 4
shortest path
2 Design Automation and Partitioning Algorithms:

2.1 Design Automation: VLSI Design Flow, VLSI Design Styles 3
Partitioning: Levels of Partitioning, Parameters for Partitioning,
2.2 1
Classification of Partitioning Algorithms
Kernighan-Lin Algorithm, Fiduccia-Mattheyses Algorithm,
2.3 5
Simulated Annealing
3 Layout Compaction:
Layout: Layout Layers and Design Rules, Physical Design

3.1 1
Optimizations
Compaction: Applications of Compaction, Informal Problem
3.2 Formulation, Graph Theoretical Formulation, Maximum Distance 1
Constraints
Longest Path algorithm for DAG, Longest path in graph with cycles,
3.3 7
Liao-Wong Algorithm, Bellman-Ford Algorithm.
4 Placement and Floorplanning:

Placement: Optimization Objectives, Wirelength Estimation,
4.1 3
Weighted Wirelength, Maximum Cut Size, Wire Density
4.2 Placement Algorithms: Quadratic Placement 2
Floorplanning: Optimization Objectives, Slicing Floorplan, Non-
4.3 Slicing Floorplan 3
Floorplan Representations: Constraint Graph, Sequence Pair
4.4 Floorplan Algorithms: Minimum Area Algorithm 3
5 Global Routing and Detailed Routing:

Global Routing: Terminology and Definitions, Optimization Goals,
5.1 1
Representation of Routing Regions
5.2 Maze Routing Algorithms: Lee’s Algorithm, Hadlock Algorithm 2
5.3 Detailed Routing: Horizontal and Vertical Constraint Graph 3
5.4 Channel Routing Algorithms: Left-Edge algorithm 2

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ELECTRONICS & COMMUNICATION ENGINEERING

Prerequisite:MAT102 Vector Calculus

CO 1 To summarize the basic mathematical concepts related to electromagnetic

Mapping of course outcomes with program outcomes

Bloom’s Category Continuous Assessment End Semester Examination

Total CIE ESE ESE Duration

150 50 100 3 hours

Continuous Internal Evaluation Pattern:

Course Level Assessment Questions

Course Outcome 1 (CO1): To summarize the basic mathematical concepts related to

1. State and explain divergence theorem. Give a geometrical explanation.

2. Find the curl of the vector A =2rcosϕ aρ +r aϕ in cylindrical coordinates

2. Derive the solution of uniform plane wave in lossy dielectric medium.

Course Outcome 3 (CO3): To analyse electromagnetic wave propagation and wave

2. Explain wave polarization and different polarisation with example.

Course Outcome 5 (CO5): To analyse and evaluate the propagation of EM waves in

6 cm respectively , find the following when frequency of operation is 6 GHz .

i. Cut off frequency

ii. Cut off wavelength

iii. Guide wavelength

iv. Phase constant

vi. Group velocity

vii. Wave impedance

1. John D. Kraus, Electromagnetics, 5/e, TMH, 2010.

1. Edminister, “Schaum’s Outline of Elctromagnetics”, 4/e, McGraw-Hill, 2014.

4. Nannapaneni Narayana Rao, Elements of Engineering Electromagnetics, Pearson, 6/e, 2006.

5. Umran S. Inan and Aziz S. Inan, Engineering Electromagnetics, Pearson, 2010.

Course Contents and Lecture Schedule

No Topic No. of Lectures

4.1 Power density of EM wave, Poynting vector theorem. 2

5.2 Development of Smith chart - calculation of line impedance and VSWR 3

Model Question paper

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY

Answer ALL Questions. Each Carries 3 mark.

1 Define Curl of a vector field. Explain its physical significance. K2

2 Obtain Coulomb’s law from Gauss’ law K2

3 Write Poisson’s and Laplace’s Equation with applications K1

current assuming ε = 2ε0.

5 List all Maxwell’s equations in integral form K1

6 Explain the significance of skin depth. K2

7 What is Snell’s law? K1

8 What is wave polarisation? What are the different types of polarisation? K1

b. A Spherical volume charge distribution is given by 7

12 Interpret the following 7

13 Derive the expression of capacitance of two wire transmission line. 7

b. Show that the energy stored in a system of n point charges is given by 7

15 Derive the expression for reflection coefficient for a wave of perpendicular 7

b. In a lossy dielectric medium,characteristic impedance of the medium is 173 +j100 7

ii. Loss tangent

iii. Attenuation constant

iv. Phase constant

17a Derive the equation for transmission and reflection coefficients of an

18 Derive standard Transmission line equations. 7

19 A rectangular wave guide has a dimension of 3cm x 5cm , and is operating at a

20 a A 50 + j200 Ω load is connected to a 100Ω lossless transmission line . Using smith 7

propagation of rectangular waveguide. CO5

Mapping of course outcomes with program outcomes:

Total Marks CIE ESE Duration

Continuous Internal Evaluation Pattern: