OS Unit - 4 Notes

UNIT-IV
Memory Management and Virtual Memory - Logical versus Physical Address Space,
Swapping, Contiguous Allocation, Paging, Segmentation, Segmentation with Paging, Demand
Paging, Page Replacement, Page Replacement Algorithms.
1. INTRODUCTION TO MEMORY MANAGEMENT

The main purpose of a computer system is to execute programs. These programs, together
with the data they access, must be in main memory (at least partially) during execution. To
improve both the utilization of the CPU and the speed of its response to users, the computer must
keep several processes in main memory. Main memory is also known as RAM (Random Access
Memory). All the programs and files are saved in the secondary storage device (Hard Disk).
Whenever we want to execute the programs or access the files, they must be copied from
secondary storage device into main memory.
Many memory-management schemes exist, reflecting various approaches, and the

effectiveness of each algorithm depends on the situation. Selection of a memory-management
scheme for a system depends on many factors, especially on the hardware design of the system.
Each algorithm requires its own hardware support.
Basic Hardware
• The CPU can only access its registers and main memory. It cannot, for example, make direct
access to the hard drive, so any data stored there must first be transferred into the main memory
chips before the CPU can work with it. ( Device drivers communicate with their hardware via
interrupts and "memory" accesses, sending short instructions for example to transfer data from
the hard drive to a specified location in main memory. The disk controller monitors the bus for
such instructions, transfers the data, and then notifies the CPU that the data is there with another
interrupt, but the CPU never gets direct access to the disk. )
• Memory accesses to registers are very fast, generally one clock tick, and a CPU may be able to
execute more than one machine instruction per clock tick.
• Memory accesses to main memory are comparatively slow, and may take a number of clock ticks
to complete. This would require intolerable waiting by the CPU if it were not for an intermediary
Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

fast memory cache built into most modern CPUs. The basic idea of the cache is to
transfer chunks of memory at a time from the main memory to the cache, and then
to access individual memory locations one at a time from the cache.
• User processes must be restricted so that they only access memory locations that
"belong" to that particular process. This is usually implemented using a base
register and a limit register for each process, as shown in Figures 8.1 and 8.2
below. Every memory access made by a user process is checked against these two
registers, and if a memory access is attempted outside the valid range, then a fatal
error is generated. The OS obviously has access to all existing memory locations,
as this is necessary to swap users' code and data in and out of memory. It should
also be obvious that changing the contents of the base and limit registers is a
privileged activity, allowed only to the OS kernel.
Figure 1.1 - A base and a limit register define a logical addresss space

Figure 1.2 - Hardware address protection with base and limit registers
Address Binding
• User programs typically refer to memory addresses with symbolic names such
as "i", "count", and "averageTemperature". These symbolic names must be
mapped or bound to physical memory addresses, which typically occurs in
several stages:
o Compile Time - If it is known at compile time where a program will
reside in physical memory, then absolute code can be generated by the
compiler, containing actual physical addresses. However if the load
address changes at some later time, then the program will have to be
recompiled. DOS .COM programs use compile time binding.
o Load Time - If the location at which a program will be loaded is not
known at compile time, then the compiler must generate relocatable
code, which references addresses relative to the start of the program. If
that starting address changes, then the program must be reloaded but not
recompiled.
o Execution Time - If a program can be moved around in memory during
the course of its execution, then binding must be delayed until execution
time. This requires special hardware, and is the method implemented by
most modern OSes.
• Figure 1.3 shows the various stages of the binding processes and the units
involved in each stage:
Figure 1.3 - Multistep processing of a user program
2. LOGICAL VERSUS PHYSICAL ADDRESS SPACE
• The address generated by the CPU is a logical address, whereas the address
actually seen by the memory hardware is a physical address.
• Addresses bound at compile time or load time have identical logical and
physical addresses.
• Addresses created at execution time, however, have different logical and
physical addresses.
o In this case the logical address is also known as a virtual address, and
the two terms are used interchangeably by our text.
o The set of all logical addresses used by a program composes the logical
address space, and the set of all corresponding physical addresses
composes the physical address space.
• The run time mapping of logical to physical addresses is handled by the
memory-management unit, MMU.
o The MMU can take on many forms. One of the simplest is a
modification of the base-register scheme described earlier.

o The base register is now termed a relocation register, whose value is
added to every memory request at the hardware level.
• Note that user programs never see physical addresses. User programs work
entirely in logical address space, and any memory references or manipulations
are done using purely logical addresses. Only when the address gets sent to the
physical memory chips is the physical memory address generated.
Fig 2.1: Dynamic relocation using a relocation register
Dynamic Loading
• Rather than loading an entire program into memory at once, dynamic loading
loads up each routine as it is called. The advantage is that unused routines need
never be loaded, reducing total memory usage and generating faster program
startup times. The downside is the added complexity and overhead of checking
to see if a routine is loaded every time it is called and then then loading it up if
it is not already loaded.
Dynamic Linking and Shared Libraries

• With static linking library modules get fully included in executable modules,
wasting both disk space and main memory usage, because every program that
included a certain routine from the library would have to have their own copy
of that routine linked into their executable code.
• With dynamic linking, however, only a stub is linked into the executable
module, containing references to the actual library module linked in at run
time.
o This method saves disk space, because the library routines do not need
to be fully included in the executable modules, only the stubs.
o If the code section of the library routines is reentrant, ( meaning it does
not modify the code while it runs, making it safe to re-enter it ), then
main memory can be saved by loading only one copy of dynamically
linked routines into memory and sharing the code amongst all processes
that are concurrently using it. ( Each process would have their own copy
of the data section of the routines, but that may be small relative to the
code segments. )
o An added benefit of dynamically linked libraries ( DLLs, also known as
shared libraries or shared objects on UNIX systems ) involves easy
upgrades and updates. When a program uses a routine from a standard
library and the routine changes, then the program must be re-built ( re-
linked ) in order to incorporate the changes. However if DLLs are used,
then as long as the stub doesn't change, the program can be updated
merely by loading new versions of the DLLs onto the system. Version
information is maintained in both the program and the DLLs, so that a
program can specify a particular version of the DLL if necessary.
o In practice, the first time a program calls a DLL routine, the stub will
recognize the fact and will replace itself with the actual routine from the
DLL library. Further calls to the same routine will access the routine
directly and not incur the overhead of the stub access.
Differences between Logical and Physical Address in Operating System
Parameter LOGICAL ADDRESS PHYSICAL ADDRESS

Also known as virtual address, Generated Also known as Physical address. Located in
Basic by CPU a memory unit
Logical Address Space is set of all logical Physical Address is set of all physical
Address
addresses generated by CPU in reference to addresses mapped to the corresponding
Space
a program. logical addresses.
User can view the logical address of a User can never view physical address of
Visibility
program. program.
Generation generated by the CPU Computed by MMU
The user can use the logical address to The user can indirectly access physical
Access
access the physical address. address but not directly.
Editable Logical address can be changed. Physical address will not change.
3. SWAPPING
• A process must be loaded into memory in order to execute.

• If there is not enough memory available to keep all running processes in
memory at the same time, then some processes which are not currently using
the CPU may have their memory swapped out to a fast local disk called the
backing store.

Fig 3.1 - Swapping of two processes using a disk as a backing store
• If compile-time or load-time address binding is used, then processes must be

swapped back into the same memory location from which they were swapped
out. If execution time binding is used, then the processes can be swapped back
into any available location.
• Swapping is a very slow process compared to other operations. For example, if
a user process occupied 10 MB and the transfer rate for the backing store were
40 MB per second, then it would take 1/4 second ( 250 milliseconds ) just to do
the data transfer. Adding in a latency lag of 8 milliseconds and ignoring head
seek time for the moment, and further recognizing that swapping involves
moving old data out as well as new data in, the overall transfer time required
for this swap is 512 milliseconds, or over half a second. For efficient processor
scheduling the CPU time slice should be significantly longer than this lost
transfer time.
• To reduce swapping transfer overhead, it is desired to transfer as little
information as possible, which requires that the system know how much
memory a process is using, as opposed to how much it might use.
Programmers can help with this by freeing up dynamic memory that they are
no longer using.
• It is important to swap processes out of memory only when they are idle, or
more to the point, only when there are no pending I/O operations. The solution
is to either swap only totally idle processes, or do I/O operations only into and
out of OS buffers, which are then transferred to or from process's main
memory as a second step.
• Most modern OSes no longer use swapping, because it is too slow and there
are faster alternatives available. ( e.g. Paging. ).
4. CONTIGUOUS MEMORY ALLOCATION

In contiguous memory allocation each process is stored in a single
contiguous block of memory. Main memory is divided into several partitions. Each
partition contains exactly one process. When a partition is free, a process is
selected from the input queue and loaded into it. The free blocks of memory are
known as holes. The set of holes is searched to determine which hole is best to
allocate. The two popular techniques used for contiguous memory allocation are:
i. Static Partitioning or Fixed Size Partitioning
ii. Dynamic Partitioning or Variable Size Partitioning
i. Static Partitioning
• Static partitioning is a fixed size partitioning scheme.
• In this technique, main memory is pre-divided into fixed size partitions.
• The size of each partition is fixed and can not be changed latter.
• Each partition is allowed to store only one process. The fixed size
partitions can be of two types: Equal size or Unequal size partitioning.
• In equal size partitioning, all the partitions will have the same size. In
un-equal size partitioning, all the partitions may have the different
sizes.

Example:
These partitions are allocated to the processes as they arrive. In equal size
partitioning scheme, as all the partition sizes are equal. So there is no difference in
allocating any partition to any process. But, in un-equal size partitioning scheme,
allocating a particular partition to a process is very important because, when a
process is allocated to one of the partition, some memory will be wasted if process
size is less than partition size. This wastage of memory is called fragmentation.
The following algorithms are used in un-equal size partitioning scheme.
• First Fit Algorithm

• Best Fit Algorithm
• Worst Fit Algorithm
1. First Fit Algorithm
➢ This algorithm starts scanning the partitions serially from the starting.
➢ When an empty partition that is big enough to store the process is found,
it is allocated to the process.

➢ Obviously, the partition size has to be greater than or at least equal to the
process size.
2. Best Fit Algorithm
➢ This algorithm first scans all the empty partitions.

➢ It then allocates the smallest size partition that fit to the process.
3. Worst Fit Algorithm
➢ This algorithm first scans all the empty partitions.
➢ It then allocates the largest size partition that fit to the process.
Example: Consider that initially there are three free partitions /holes available with
sizes 700 KB, 950 KB and 500 KB as shown in the figure (a). If we want to insert
P3 process with size 450 KB, then the implementation of different algorithms are
shown below.
Pi : Partition allocated to ith process : Free partition /hole
500 KB P1 500 KB P1 500 KB P1 500 KB P1

700 KB
P3 450 KB
700 KB
700 KB 700 KB
250 KB
300 KB P2 300 KB P2 300 KB P2 300 KB P2
950 KB
P3 450 KB
950 KB 950 KB 950 KB
500 KB
500 KB 500 KB 500 KB P3 450 KB

500 KB
50 KB
Figure (a): Initial Figure (b): First Fit Figure (c): Best Fit Figure (d): Worst Fit
In First-fit algorithm, 700 KB hole is allocated to P3 process and the remaining

memory 250 KB is wasted. In Best-fit algorithm, 500 KB hole is allocated to P3
process and the remaining memory 50 KB is wasted. In Worst-fit algorithm, 950
KB hole is allocated to P3 process and the remaining memory 500 KB is wasted.
As the memory wasted is inside the partition, so it is called internal fragmentation.
Best Fit Algorithm works best because the space left after the allocation inside
the partition is of very small size. Thus, internal fragmentation is least. Worst Fit
Algorithm works worst. This is because space left after the allocation inside the
partition is of very large size. Thus, internal fragmentation is maximum.

ii. Dynamic Partitioning
Dynamic partitioning tries to overcome the problems caused by fixed partitioning. In this
technique, the partition size is not declared initially. It is declared at the time of process loading.
• Dynamic partitioning is a variable size partitioning scheme.
• It performs the memory allocation at the time of process loading.
• Initially RAM is empty and partitions are made during the run-time according to size of
the process.
• When a process arrives, a partition of size equal to the size of process is created. Then,
that partition is allocated to the process. As a result there is no internal fragmentation.
• The processes arrive and leave the main memory after execution. After a process leave
the main memory, a hole (free space) is created.
• These holes are allocated to the processes that arrive in future.
• When a new process arrives and no hole fit to it, then memory can not be allocated to it.
Even though the process size is less than total empty space in memory (sum of the all
holes memory size). This is because the memory can not be allocated to that process as
the required empty space is not contiguous (It is available at different places).
For example, consider processes = {P1, P2, P3, P4} with memory size = {2, 7, 1, 5} MBs
respectively. They are loaded into main memory with partition size is equal to process size as
shown in the below figure (a).
Figure (a) Figure (b)

Suppose process P1(2MB) and process P3(1MB) completed their execution, they will
leave the memory and two holes (free spaces) are created. The total free space is 4 MB
(2+1+1). This is shown in the above figure (b). Let’s a new process P5 of size 3MB arrives.
The empty space in memory cannot be allocated to P5 even though P5 memory is less than
Internal Fragmentation
• Internal Fragmentation occurs only in static partitioning.
• It occurs when the space is left inside the fixed partition after allocating the partition
to a process. This space is called internal fragmentation.
• This space can not be allocated to any other process.
• This is because only one process is allowed to store in each partition.
External Fragmentation
• External Fragmentation occurs only in dynamic partitioning.
• It occurs when the total amount of empty space required to store the process is
available in the main memory but the free memory is not contiguous.
• As the space is not contiguous, so the process can not be stored.
total empty space ( P5’s 3 MB < 4 MB empty space) because the required 3 MB
space is not contiguous. So, this memory is not useful now and it results in
External Fragmentation.
The external fragmentation problem can be solved using compaction

technique. The compaction is a technique used to move all processes towards one

end of memory and all the free blocks of memory are moved towards the
other end. This is shown in the below diagram.
Huge amount of time is invested for moving all the free spaces to one side and the
CPU will remain idle for all this time. Despite of the fact that the compaction
avoids external fragmentation, it makes system inefficient.
5. PAGING
• Paging belongs to fixed partition technique.
• Paging is a memory management mechanism that allows the physical address space of a
process can be non-contagious.
• The main memory is partitioned into fixed small equal size blocks called frames.
• The user process is also divided into small equal size blocks called pages.
• The page size should be equal to frame size except the last page of each process.
Pi
Figure 5. 1 : Paging hardware
When a process needs to be executed, its pages are loaded into any available memory
frames. In order to start execution, not all the pages of it to loaded into main memory; only few
pages are enough. After loading the pages, the details of which page is loaded into which frame
is saved in a table called page table. Each process maintains a separate page table. The starting
location address of a page table is saved in the Page Table Base Register (PTBR). In the
following example, for instance, page 2 of the program's logical memory is currently stored in
frame 3 of physical memory as shown in the figure below:
Figure 5.2 - Paging model of logical and physical memory
When processor wants to execute an instruction, it generates the logical

address. The logical address contain two parts: a page number (Pi) and a page
offset (d). The page number is used as an index into a page table and fetch
corresponding frame no (f). The physical address is obtained by combining the
frame no (f) with the offset d. This is shown in the below diagram.
The page size (like the frame size) is defined by the hardware. The size of a page is
typically a power of 2, varying between 512 bytes and 16 MB per page, depending
on the computer architecture. The selection of a power of 2 as a page size makes the
translation of a logical address into a page number and page offset particularly easy.
If the size of logical address space is 2'"* and a page size is 2" addressing units
(bytes or words), then the high-order m - n bits of a logical address designate the
page number, and the n low-order bits designate the page offset. Thus, the logical
address is as follows:
Consider the following micro example, in which a process has 16 bytes of logical
memory, mapped in 4 byte pages into 32 bytes of physical memory. ( Presumably
some other processes would be consuming the remaining 16 bytes of physical
memory. ) as shown in the figure below:
Fig 5.3 : Paging example for a 32-byte memory with 4-byte pages.
The advantages of paging are:
• It allows to store parts of a single process in a non-contiguous fashion.

• It solves the problem of external fragmentation.

The disadvantages of paging are:
• It suffers from internal fragmentation.

• There is an overhead of maintaining a page table for each process.
• The time taken to fetch the instruction increases since now two memory
accesses are required.
Hardware support with transition look aside buffer (TLB)

A translation look aside buffer can be defined as a memory cache that
contains page table entries that have been most recently/frequently used. TLB can
be used to reduce the time taken to access the page table again and again. TLB
follows the concept of locality of reference which means that it contains only the
entries of those pages that are frequently accessed by the CPU.
Figure 5.4 : Paging hardware with TLB
Given a logical address, the processor examines the TLB, if a page table entry is
present (TLB hit), the frame number is retrieved and the physical address is
formed. If a page table entry is not found in the TLB (TLB miss), the page number
is used to index the process page table to generate physical address. This is shown
in above diagram.
• The percentage of time that the desired information is found in the TLB is
termed the hit ratio.
• For example, suppose that it takes 100 nanoseconds to access main memory,
and only 20 nanoseconds to search the TLB. So a TLB hit takes 120
nanoseconds total ( 20 to find the frame number and then another 100 to go get
the data ), and a TLB miss takes 220 ( 20 to search the TLB, 100 to go get the
frame number, and then another 100 to go get the data. ) So with an 80% TLB
hit ratio, the average memory access time would be:
0.80 * 120 + 0.20 * 220 = 140 nanoseconds
for a 40% slowdown to get the frame number. A 98% hit rate would yield 122
nanoseconds average access time ( you should verify this ), for a 22% slowdown.
6. SEGMENTATION
• Like Paging, Segmentation is another non-contiguous memory allocation

technique.
• Segmentation is a variable size partitioning scheme.
• In segmentation, process is not divided blindly into fixed size pages.

Rather, the process is divided into modules. These partitions are called as
segments.
• The main memory is divided into partitions of unequal size
dynamically. The size of partitions depends on the length of modules.
Example: Consider a program is divided into 5 segments as:

Figure 6.1: User's view of a program
Segment Table:
• Segment table is a table that stores the information about each segment of the
process.
• It has two columns. First column stores the size or length of the segment.
Second column stores the base address or starting address of the segment in
the main memory.
• Segment table is stored as a separate segment in the main memory.
• The base address of the segment table is stored in Segment Table Base
Register (STBR).
When a process needs to be executed, its segments are loaded into main
memory. After loading the segments, the details of each segment’s base address
and the limit value are saved in a table called segmentation table. Base Address
contains the starting physical address where the segments stored in main memory.
Limit specifies the length of the segment. When processor wants to execute an
instruction, it generates the logical address. This address contain two parts: a
segment number (s) and a segment offset (d). The segment number is used as an
index into a segment table and fetches corresponding base address. If the segment
offset (d) is greater than limit size, then an addressing error is raised.
Otherwise, physical address is generated. The physical address is obtain by
combining the segment base address with the offset(d). This is shown in the
below diagram.
P
d i
Figure 6.2 : Segmentation hardware.
As an example, consider the situation shown in Figure 8.20. We have five

segments numbered from 0 through 4. The segments are stored in physical memory
as shown. The segment table has a separate entry for each segment, giving the
beginning address of the segment in physical memory (or base) and the length of
that segment (or limit). For example, segment 2 is 400 bytes long and begins at
location 4300. Thus, a reference to byte 53 of segment 2 is mapped onto location
4300 + 53 = 4353. A reference to segment 3r byte 852, is mapped to 3200 (the base
of segment 3) + 852 = 4052. A reference to byte 1222 of segment 0 would result in a
trap to the operating system, as this segment is only 1,000

Fig 6.3 Example of segmentation.
The advantages of segmentation are:
• It allows to divide the program into modules which provides better

visualization.
• Segment table consumes less space as compared to page table in paging.
• It solves the problem of internal fragmentation.
The disadvantages of segmentation are:
• There is an overhead of maintaining a segment table for each process.
• The time taken to fetch the instruction increases since now two memory
accesses are required.
• Segments of unequal size are not suited for swapping.
• It suffers from external fragmentation as the free space gets broken down
into smaller pieces with the processes being loaded and removed from the
main memory.
7. SEGMENTATION WITH PAGING
Both paging and segmentation have their advantages and disadvantages, it is

better to combine these two schemes to improve on each. The combined scheme is
known as ‘Segmentation with Paging’. In this scheme,
• Process is first divided into segments and then each segment is divided into
pages.
• These pages are then stored in the frames of main memory.
• A separate page table exists for each segment to keep track of the frames
storing the pages of that segment.
• Number of entries in the page table of a particular segment = Number
of pages that segment is divided.
• A segment table exists that keeps track of the frames storing the page tables of
segments.
• Number of entries in the segment table of a process = Number of segments

that process is divided.
• The base address of the segment table is stored in the segment table base
register (STBR).
When a process needs to be executed, CPU generates the logical address for each
instruction. The logical address consisting of three parts:

a) Segment Number (S): It gives the specific segment from which CPU
wants to reads the data.

b) Page Number (P): It gives specifies the specific page of that segment
from which CPU wants to read the data.

c) Page Offset (d): It gives the specific word on that page that CPU wants to
read.
The physical address is computed from the given logical address as follows:
• The segment table base register (STBR) contain the starting address of
segment table.
• For the given segment number, corresponding entry is found in that segment
table.
• Segment table provides the address of page table belongs to the referred
segment number.
• For the given page number, corresponding entry is found in that page table.
• This page table provides the frame number of the required page of the referred
segment.
• The frame number combined with the page offset to get the required physical
address.
The below diagram illustrates the above steps of translating logical address into
physical address:

Fig 7.1 : Segmentation with Paging
The advantages of segmented paging are:
• Segment table contains only one entry corresponding to each segment.

• It reduces memory usage.
• The size of page table is limited by the segment size.
• It solves the problem of external fragmentation.
The disadvantages of segmented paging are:
• Segmented paging suffers from internal fragmentation.

• The complexity level is much higher as compared to paging.

8. VIRTUAL MEMORY
Computers have a finite amount of main memory (RAM), so memory may

be filled and can run out of free space, especially when multiple programs run at
the same time. This problem can be solved by making a section of the hard disk to
emulate RAM. This emulated memory in the hard disk is called as “Virtual
Memory”.
Virtual memory is the capability of an OS that allow a computer to

compensate for physical memory shortages. Whenever RAM runs out of free
space, the OS temporarily transfer few pages from RAM to emulated RAM
memory in the hard disk. Virtual Memory is a space where large programs can
store themselves in form of pages during their execution and only the required
pages of processes are loaded into the main memory. This technique is useful as
large virtual memory is provided for user programs when a very small physical
memory is there.
Benefits of having Virtual Memory
• Large programs can be written, as virtual space available is huge compared to physical
memory.
• More physical memory available, as programs are stored on virtual memory, so they
occupy very less space on actual physical memory.
9. DEMAND PAGING
In real scenario, not all the pages of a process are loaded into main memory
at once, only few pages are sufficient to start executing it. During execution, if the
required page is not in main memory, then that page is brought in. This process of
loading pages into main memory is called “Demand paging”.
Demand paging suggests keeping all the pages of a process in the virtual
memory until they are required. In other words, it says that do not load any page
into the main memory until it is required. Whenever any page is referred it may or may not
be in the main memory. If the referred page is not present in the main memory then there will be
a miss and the concept is called page fault occur. The CPU has to transfer the missed page from
the virtual memory into one of the free frame of the main memory. If the main memory does not
have any free frame, then page replacement algorithms are used to swap one of the pages from
the main memory with the required page.
If a page is needed that was not originally loaded up, then a page fault trap is generated, which
must be handled in a series of steps:
1. The memory address requested is first checked, to make sure it was a valid memory request.
2. If the reference was invalid, the process is terminated. Otherwise, the page must be paged in.
3. A free frame is located, possibly from a free-frame list.
4. A disk operation is scheduled to bring in the necessary page from disk. ( This will usually
block the process on an I/O wait, allowing some other process to use the CPU in the
meantime. )
5. When the I/O operation is complete, the process's page table is updated with the new frame
number, and the invalid bit is changed to indicate that this is now a valid page reference.
6. The instruction that caused the page fault must now be restarted from the beginning, ( as
soon as this process gets another turn on the CPU. )
Figure 9.1: Steps in handling a page fault

When OS use demand paging, the page table contains one extra
column
named as valid bit. If the page is in main memory, then its valid bit is set to true;
otherwise it is set to false. This valid bit is used to know whether the required page
is in main memory or not.
Figure 9.2: Page table when some pages are not in main memory.
There are cases when no pages are loaded into the memory initially; pages
are only loaded when demanded by the process by generating page faults. This is
called “Pure Demand Paging”. In demand paging, some of the pages are loaded
into main memory initially before start executing it.

“Pre-paging” is a technique used to load pages into main memory before
they are needed to avoid page faults. But identifying the needed pages in advance is
very difficult.
10. PAGE REPLACEMENT

When Demand Paging is used, only certain pages of a process are loaded initially into the
memory. This allows us to get more number of processes into the main memory at the same time
and they can be executed parallel. But when a process references a page that is not in main
memory, it has to be brought in. If no free frame is available in the main memory to bring the
referenced page in, then the following steps can be taken to deal with this problem:
1. Put the process that need the page not in main memory in the wait queue, until any other
process finishes its execution thereby freeing some of the frames.
2. Or, remove some other process completely from the memory to free frames.
3. Or, find some pages that are not being used right now, move them to the disk (virtual
memory) to get free frames. This technique is called Page replacement and is most
commonly used. We have some great algorithms to carry on page replacement efficiently.
Basic Page Replacement
The following steps are followed by page replacement algorithms to replace the
referenced page.
1. Find the location of the desired page on the disk, either in swap space or in the
file system.
2. Find a free frame:
a. If there is a free frame, use it.
b. If there is no free frame, use a page-replacement algorithm to select an
existing frame to be replaced, known as the victim frame.
c. Write the victim frame to disk. Change all related page tables to indicate
that this page is no longer in memory.
3. Read in the desired page and store it in the frame. Adjust all related page and
frame tables to indicate the change.
4. Restart the process that was waiting for this page.
Fig 10.1 : Page replacement.

11. PAGE REPLACEMENT ALGORITHMS
When there is a page fault, the referenced page must be loaded. If there is no available frame
in memory, then one of the page is selected for replacement. Page replacement algorithms help
to decide which page must be swapped out from the main memory to create a room for the
incoming page. Various page replacement algorithms are:
• FIFO Page Replacement Algorithm
• LRU Page Replacement Algorithm
• Optimal Page Replacement Algorithm
1. FIFO Page Replacement Algorithm:
• This is the simplest page replacement algorithm.

• As the name suggests, this algorithm works on the principle of “First in First out”.
• It replaces the oldest page that has been present in the main memory for the longest time.
• It is implemented by keeping track of all the pages in a queue.
• The number of page faults is more as compared to other page replacement algorithms.
d
Problem 1: Consider the following page references: 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 1, 2, 0, 1, 7,

0 , 1. Find no of page faults when FIFO is implemented. Use 3 frames.
Solution:
No of Page Faults (F) = 15

0 , 1. Find no of page faults when FIFO is implemented. Use 4 frames.

Solution:
Belady’s anomaly: Generally, when number of frames increases then number page faults has to
decrease. But, when FIFO page replacement algorithm is used on most of the reference strings, it
found that when number of frames increases then number page faults also increasing. This
phenomenon is called Belady’s anomaly. For example, if we consider reference string 3, 2, 1, 0,
3, 2, 4, 3, 2, 1, 0, 4 and number of frames as 3, we get total 9 page faults, but if we increase
number of frames to 4, we get 10 page faults.
Consider another example with the following reference string: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
Case-1: If the system has 3 frames, the given reference string on using FIFO page replacement
algorithm yields a total of 9 page faults. The diagram below illustrates the pattern of the page faults
occurring in the example.
Case-2: If the system has 4 frames, the given reference string on using FIFO page replacement
algorithm yields a total of 10 page faults. The diagram below illustrates the pattern of the page

faults occurring in the example.
It can be seen from the above example that on increasing the number of frames while using the
FIFO page replacement algorithm, the number of page faults increased from 9 to 10.
2. Optimal Page Replacement Algorithm:
• This algorithm replaces the page that will not be referred by the CPU in future for the
longest time.
• It is practically impossible to implement this algorithm.
• This is because the pages that will not be used in future for the longest time can not be
predicted.
• However, it is the best known algorithm and gives the least number of page faults.
• Hence, it is used as a performance measure criterion for other algorithms.

0 , 1. Find no of page faults when OPTIMAL page replacement is implemented. Use 3 frames.
Solution:

3. LRU Page Replacement Algorithm:
• As the name suggests, this algorithm works on the principle of “Least Recently Used”.
• It replaces the page that has not been referred by the CPU for the longest time.
• This algorithm is just opposite to the optimal page replacement algorithm. In this, we
look at the past instead of staring at future.

0 , 1. Find no of page faults when LRU is implemented. Use 3 frames.
Solution:
12. THRASHING
Thrashing is a condition or a situation when the system is spending a major portion of its
time in servicing the page faults, but the actual execution or processing done is very negligible.
The basic concept involved is that if a process is allocated too few frames, then there will
be too many and too frequent page faults. As a result, no useful work would be done by the CPU
and the CPU utilization would fall drastically.
Locality Model:
A locality is a set of pages that are actively used together. The locality model states that
as a process executes, it moves from one locality to another. A program is generally composed of
several different localities which may overlap.

For example when a function is called, it defines a new locality where memory references
are made to the instructions of the function call, it’s local and global variables, etc. Similarly,
when the function is exited, the process leaves this locality.
Techniques to handle thrashing:
1. Working Set Model: This model is based on the above-stated concept of the Locality
Model. The basic principle states that if we allocate enough frames to a process to
accommodate its current locality, it will only fault whenever it moves to some new locality.
But if the allocated frames are lesser than the size of the current locality, the process is bound
to thrash.
According to this model, based on a parameter A (no of recent referenced pages), the
working set is defined as the set of pages in the most recent ‘A’ page references. Hence, all
the actively used pages would always end up being a part of the working set. The accuracy of
the working set is dependent on the value of parameter A. If A is too large, then working sets
may overlap. On the other hand, for smaller values of A, the locality might not be covered
entirely.
If the summation of working set sizes of all the processes present in the main memory
exceeds the availability of frames, then some of the processes have to be suspended
(swapped out of memory). Otherwise, i.e., if there are enough extra frames, then some more
processes can be loaded in the memory. This technique prevents thrashing along with
ensuring the highest degree of multiprogramming possible. Thus, it optimizes CPU
utilization.
2. Page Fault Frequency: A more direct approach to handle thrashing is the one that uses
Page-Fault Frequency concept. The problem associated with Thrashing is the high page fault
rate and thus, the concept here is to control the page fault rate.
If the page fault rate is too high, it indicates that the process has too few frames allocated
to it. On the contrary, a low page fault rate indicates that the process has too many frames.
Upper and lower limits can be established on the desired page fault rate as shown in the
below diagram.

If the page fault rate falls below the lower limit, frames can be removed from the process.
Similarly, if the page faults rate exceeds the upper limit, more number of frames can be
allocated to the process. In other words, the graphical state of the system should be kept
limited to the rectangular region formed in the given diagram.
If the page fault rate is high with no free frames, then some of the processes can be
suspended and frames allocated to them can be reallocated to other processes. The suspended
processes can then be restarted later.

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UNIT-IV

1. INTRODUCTION TO MEMORY MANAGEMENT

Many memory-management schemes exist, reflecting various approaches, and the

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

2. LOGICAL VERSUS PHYSICAL ADDRESS SPACE

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

Fig 2.1: Dynamic relocation using a relocation register

Dynamic Linking and Shared Libraries

Parameter LOGICAL ADDRESS PHYSICAL ADDRESS

• A process must be loaded into memory in order to execute.

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

• If compile-time or load-time address binding is used, then processes must be

4. CONTIGUOUS MEMORY ALLOCATION

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

• First Fit Algorithm

1. First Fit Algorithm

it is allocated to the process.

2. Best Fit Algorithm

➢ This algorithm first scans all the empty partitions.

3. Worst Fit Algorithm

➢ This algorithm first scans all the empty partitions.

500 KB P1 500 KB P1 500 KB P1 500 KB P1

500 KB 500 KB 500 KB P3 450 KB

In First-fit algorithm, 700 KB hole is allocated to P3 process and the remaining

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

• Dynamic partitioning is a variable size partitioning scheme.

• It performs the memory allocation at the time of process loading.

Figure (a) Figure (b)

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

The external fragmentation problem can be solved using compaction

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

Figure 5. 1 : Paging hardware

Figure 5.2 - Paging model of logical and physical memory

When processor wants to execute an instruction, it generates the logical

The advantages of paging are:

• It allows to store parts of a single process in a non-contiguous fashion.

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

• It suffers from internal fragmentation.

Hardware support with transition look aside buffer (TLB)

Figure 5.4 : Paging hardware with TLB

0.80 * 120 + 0.20 * 220 = 140 nanoseconds

• Like Paging, Segmentation is another non-contiguous memory allocation

• Segmentation is a variable size partitioning scheme.

• In segmentation, process is not divided blindly into fixed size pages.

Example: Consider a program is divided into 5 segments as:

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

Figure 6.2 : Segmentation hardware.

As an example, consider the situation shown in Figure 8.20. We have five

Ravindar.M, Asso.Prof, CSE Dept, JITS-KNR

The advantages of segmentation are:

• It allows to divide the program into modules which provides better

• Segment table consumes less space as compared to page table in paging.

• It solves the problem of internal fragmentation.

The disadvantages of segmentation are:

• There is an overhead of maintaining a segment table for each process.

Both paging and segmentation have their advantages and disadvantages, it is

• These pages are then stored in the frames of main memory.

• Number of entries in the segment table of a process = Number of segments