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  • Vlsi VHDL

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    This document provides information about hardware description languages (HDLs) such as VHDL and Verilog. It discusses that HDLs allow for a precise description of digital logic circuits that can be analyzed, simulated and synthesized into integrated circuit designs. Important differences between programming languages and HDLs are that HDLs explicitly include the notion of time. Common HDLs are Verilog and VHDL, which have IEEE standards. The document then provides details on the history, basics, and examples of VHDL.

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    VLSI_VHDL

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    This document provides information about hardware description languages (HDLs) such as VHDL and Verilog. It discusses that HDLs allow for a precise description of digital logic circuits that can be analyzed, simulated and synthesized into integrated circuit designs. Important differences between programming languages and HDLs are that HDLs explicitly include the notion of time. Common HDLs are Verilog and VHDL, which have IEEE standards. The document then provides details on the history, basics, and examples of VHDL.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    Download as pdf or txt
    12 views22 pages

    Vlsi VHDL

    Uploaded by

    samiularefin2000
    This document provides information about hardware description languages (HDLs) such as VHDL and Verilog. It discusses that HDLs allow for a precise description of digital logic circuits that can be analyzed, simulated and synthesized into integrated circuit designs. Important differences between programming languages and HDLs are that HDLs explicitly include the notion of time. Common HDLs are Verilog and VHDL, which have IEEE standards. The document then provides details on the history, basics, and examples of VHDL.

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    of 22

    VLSI

    VHDL
    Hardware Description Language
    HDL is a specialized computer language used to describe the structure
    and behavior of electronic circuits, and most commonly, digital
    logic circuits.
    It enables a precise, formal description of an electronic circuit that
    allows for the automated analysis and simulation of an electronic
    circuit. It also allows for the synthesis of an HDL description into
    a netlist which can then be placed and routed to produce the set of
    masks used to create an integrated circuit.
    Hardware Description Language (cont.)
    A HDL looks much like a programming language such as C; it is a textual
    description consisting of expressions, statements and control structures. One
    important difference between most programming languages and HDLs is that
    HDLs explicitly include the notion of time.
    HDLs form an integral part of electronic design automation (EDA) systems,
    especially for complex circuits, such as ASIC, microprocessors, and
    programmable logic devices.
    There are two IEEE standards in common use: Verilog-HDL (IEEE 1364) &
    VHDL (IEEE 1076)
    Hardware Description Language (cont.)
    In early years the digital circuits were designed manually using the
    techniques such as Boolean expressions , circuit schematics , Karnaugh maps
    etc. Most of the people used schematic based softwares like p spice, h spice
    etc.
    With the increasing device densities the choice of this traditional methods
    has become limited. Because it is a known fact that the schematics with more
    than 600 gates are incomprehensible.
    So , it is unimaginable to think how many years would be required to design
    the modern chips which contains millions of transistors .
    Hardware Description Language (cont.)
    It is a must for IC designers to go for some tool. So, the Electronic Design
    Automation (EDA) tool made the multimillion IC design simple and
    possible.
    With the increasing use of computer –based design methodologies ,the IC
    design has migrated to EDA tools. One such outcome of these EDA tools is
    the HDL.
    This HDL resembles a general programming language like “C’, but is
    specifically oriented to describing hardware structures and behaviors. The
    most common use of a HDL is to provide an alternative to schematics.
    Need of HDL
    ➢To discover problems and faults in the design before actually
    implementing it in hardware.

    ➢The complexity of an electronic system grows exponentially. For this


    reason, it is very convenient to build a prototype of the circuit
    previously to its manufacturing process

    ➢It makes easy for a team of developers to work together.


    History of VHDL
    Very High Speed Integrated Circuit (VHSIC) HDL has played a
    crucial role in the development of the many electronic devices we see
    today.
    The VHSIC Program launched in 1980 ,was an initiative of the Defense
    Department of US to push the state of the art in VLSI technology.
    In July 1983, a team of Intermetric, IBM and Texas Instruments were
    awarded a contract to develop VHDL.
    In August 1985, the final version of the language under government
    contract was released: VHDL Version 7.2.
    History of VHDL (cont.)
    In December 1987, VHDL became IEEE Standard 1076-1987 and in 1988
    an ANSI standard
    In September 1993, VHDL was re standardized to clarify and enhance the
    language (IEEE Standard 1076-1993).
    VHDL has been accepted as a Draft International Standard by the IEC
    (International Engineering Consortium)

    VHDL 1993, 1997, 2000, 2002.


    Introduction
    1. VHDL is not case sensitive
    2. Identifier must start with a letter
    3. All statements end with a semi-colon
    4. Comments precede with (--)
    5. “<= “ - signal assignment
    6. “:=“ - variable assignment
    7. Variables are like C- type variables.
    8. Signals have a one time value set associated to it at any time.
    Introduction (cont.)
    Value Meaning
    ‘U’ Uninitialized
    ‘X’ Strong unknown logic value
    ‘0’ Strong logic zero
    ‘1’ Strong logic one/high
    ‘Z’ High impedance
    ‘W’ Weak unknown logic value
    ‘L’ Weak logic zero
    ‘H’ Weak logic one
    ‘-’ Don't care
    Format
    VHDL is a “free format” language . No formatting conventions, such as
    spacing or indentation imposed by VHDL compilers. Space and carriage
    return are treated in the same way. For example: the following are all
    equivalent
    if (a=b) then
    or
    If (a=b) then
    or
    if (a=
    b) then
    Fundamental Section of a basic code
    Fundamental Section of a basic code (cont.)
    Every piece of VHDL code is composed of at least three fundamental
    sections
    • LIBRARY declarations: Contains a list of all libraries to be used in
    the design.
    • ENTITY: Specifies the I/O pins of the circuit.
    • ARCHITECTURE: Contains the VHDL code which describes how
    the circuit should behave (function).
    Example
    Library Declarations
    To declare a LIBRARY (that is, to make it visible to the design) two lines
    of code are needed, one containing the name of the library, and the other a
    use clause. The syntax is as follows
    • LIBRARY library_name ;
    • USE library_name.package_name.package_parts ;
    At least three packages, from three different libraries, are usually needed
    in a design :
    • ieee.std_logic_1164(from the ieee library),
    • standard (from the std library) , and
    • work (work library)
    Library Declarations (cont.)
    LIBRARY ieee;
    USE ieee.std_logic_1164.all ;
    LIBRARY std ;
    USE std . Standard . all ;
    LIBRARY work ;
    USE work. all;
    The std_logic_1164 package of the ieee library specifies a multilevel logic
    system; std is a resource library (data types, text i/o, etc.) for the VHDL design
    environment; and the work library is where we save our design (the .vhd file,
    plus all files created by the compiler, simulator, etc.)
    Entity
    An ENTITY is a list with specifications of all input and output pins (PORTS) of
    the circuit with the following syntax.
    ENTITY entity_name IS PORT ( port_ name : signal_mode signal_type);
    END entity_name ;

    The mode of the signal can be IN, OUT, INOUT, or BUFFER .


    • IN and OUT are truly unidirectional pins, while INOUT is bidirectional.
    • BUFFER, on the other hand, is employed when the output signal must
    be used (read) internally.
    Entity (cont.)
    Architecture
    The ARCHITECTURE denotes the description of how the circuit should
    behave or function . The syntax is as below:

    ARCHITECTURE architecture_name OF entity_name IS BEGIN


    (code)
    END architecture_name ;

    So, an architecture has two parts : a declarative part (optional), where


    signals and constants (among others) are declared, and the code part
    (from BEGIN down).
    Architecture
    Example
    ARCHITECTURE my arch OF nand_ gate IS BEGIN
    x <= a NAND b;
    END my arch;

    The meaning of this ARCHITECTURE is that the circuit must perform the
    NAND operation between the two input signals (a, b) and assign (‘‘<=’’)
    the result to the output pin (x).
    Example: Multiplexer
    Example: Multiplexer (when logic)

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