Digital Logic
Digital Logic
Digital Logic
11. Which gates in Digital Circuits are required to convert a NOR-based SR latch to an SR
flip-flop?
a. Two 2 input AND gates b. Two 3 input AND gates
c. Two 2 input OR gates d. Two 3 input OR gates
12. When does a negative level triggered flip-flop in Digital Electronics changes its state?
a. When the clock is negative b. When the clock is positive
c. When the inputs are all zero d. When the inputs are all one
13. Which of the following options represent the synchronous control inputs in an S – R flip
flop?
a. S b. R c. Clock d. Both S and R
14. What must be used along with synchronous control inputs to trigger a change in the flip
flop?
a. 0 b. 1 c. Clock d. Previous output
15. Which of the following majorly determines the number of emitters in a TTL digital
circuit?
a. Fan – in b. Fan – out c. Propagation delay d. Noise immunity
16. What will be the output from a D flip – flop if the clock is low and D = 0?
a. 0 b. 1 c. No change d. Toggle between 0 and 1
17. What are the basic gates in MOS logic family?
a. NAND and NOR b. AND and OR c. NAND and OR d. AND and NOR
18. How must the output of a gate in a TTL digital circuit act when it is HIGH?
a. Acts as a voltage source b. Acts as a current sink
c. Acts as a current source d. Acts as a voltage sink
19. What is the minimum distance required for single error detection according to Hamming’s
analysis in Digital Electronics?
a. 1 b. 2 c. 3 d. 4
20. Which of these error-detecting codes enables to find double errors in Digital Electronic
devices?
a. Parity method b. Check sum method
c. Bit generation method d. Odd-Even method
21. Which of these number systems has a base of 16?
a. Decimal b. Binary c. Hexadecimal d. Octal
22. A Silicon Controlled Rectifier (SCR) is a device with:
a. 4 junctions b. 3 junctions c. 2 junctions d. 1 junction
23. Which of these semiconductor devices isn’t a current triggering device?
a. MOSFET b. TRIAC b. Thyristor d. GTO
24. The addition of these binary numbers 101001+ 010011 would generate:
a. 101110 b. 000111 c. 111100 d. 010100
25. The subtraction of these binary numbers 101001 – 010110 would generate:
a. 010010 b. 011001 c. 100110 d. 010011
26. The multiplication of these binary numbers 10100 * 01011 would generate:
a. 011100011 b. 011011100 c. 011001100 d. 011011000
27. The division of these binary numbers: 111001 ÷ 1101 would generate:
a. 1010 b. 0110 c. 0101 d. 0011
28. A JK flip-flop in the toggle mode has:
a. K = 1 and J = 1 b. K = 1 and J = 0 c. K = 0 and J = 1 d. K = 0 and J = 0
29. The classification of IC with complexities of 30-300 equivalent gates on one chip is called
as:
a. SSI b. MSI c. LSI d. VLSI
30. The overflow is a:
a. Hardware problem b. User input problem
c. Input-Output problem d. Software problem
31. _____ is a digital circuit that is capable of storing only a single bit.
a. Flip-flop
b. NOR gate c. XOR gate d. Register
37. The use of the Ward- Leonard system is to control the speed of ______ Motors.
a. DC b. Induction c. Universal d. Three-phase AC
38. Whenever the PIV rating of any diode is exceeded, then the diode would:
a. behaves like a tunnel diode. b. be destroyed.
40. Which of these is the basic building block of all the arithmetic logic units in all the digital
computers?
a. Subtractors b. Demultiplexer c. Attenuator d. Adders
41. What will be the output from a D flip-flop if D = 1 and the clock is low?
a. No change b. Toggle between 0 and 1 c. 0 d. 1
42. What characteristic will a TTL digital circuit possess due to its multi-emitter transistor?
a. Low capacitance b. High capacitance c. Low inductance d. High inductance
43. What input should be given to “S” when SR flip – flop is converted to JK flip – flop?
a. K.Q b. K.Q c. J.Q d. J.Q
44. What value is to be considered for a “don’t care condition”?
a. 0 b. 1 c. Either 0 or 1 d. Any number except 0 and 1
45. What is the group of 1s in 4 cells of a K – map called?
a. Pair b. Quad c. Octet d. Octave
46. What will be the frequency of the output from a JK flip – flop, when J = 1, K = 1, and a
clock with pulse waveform is given?
a. Half the frequency of clock input b. Equal to the frequency of clock input
c. Twice the frequency of clock input d. Independent of the frequency of clock input
47. What gate is placed between clock input and the input of AND gate to convert a positive
level triggered flip – flop to a negative level triggered flip – flop?
a. NOR gate b. NOT gate c. Buffer d. NAND gate
48. In Digital Circuits, which of the following options represent the synchronous control inputs
in a T flip flop?
a. T b. 0 c. Clock d. 1
49. What will a TTL digital circuit possess due to the presence of a multi – emitter transistor?
a. Smaller resistance b. Larger area c. Smaller area d. Larger resistance
50. How must the output of a gate act when it is LOW in a TTL circuit?
a. Acts as a voltage source b. Acts as a current sink
c. Acts as a current source d. Acts as a voltage sink
51. Which of the following gives the correct number of multiplexers required to build a 32 x 1
multiplexer?
a. Two 16 x 1 mux b. Three 8 x 1 mux c. Two 8 x 1 mux d. Three 16 x 1 mux
52. What must be the input given to “R” when SR flip – flop is converted to JK flip – flop?
a. K.Q b. K.Q c. J.Q d. J.Q
53. What minimum distance is required for a single error correction according to Hamming’s
analysis in Digital Electronics?
a. 1 b. 2 c. 3 d. 4
54. How many errors can the Digital Electronics parity method can find in a single word?
a. Single error b. Double error c. Triple error d. Multiple errors
55. What is the group of 1s present in 8 cells of a K – map called?
a. Pair b. Quad c. Octet d. Octave
56. Which of these flip – flops cannot be used to construct a serial shift register?
a. D – flip flop b. SR flip – flop c. T flip – flop d. JK flip – flop
57. Which of these options represent the other name of Inter – Integrated logic?
a. Merged Transistor Logic b. Emitter – Coupled Logic
c. High threshold logic d. Resistor – Transistor logic
58. Which of the following options is a Current – Mode logic used in Digital Circuits?
a. TTL b. RTL c. ECL d. IIC=
59. How many AND gates are required to construct a 4 – bit parallel multiplier if four 4 – bit
parallel binary adders are given?
a. Four 2 – input AND gates b. Eight 2 – input AND gates
c. Sixteen 2 – input AND gates d. Two 2 – input AND gates
60. How many cycles of addition and shifting in a 4 – bit multiplier are required to perform
multiplication using the shift method?
a. 1 b. 2 c. 4 d. 8
61. How many 4 – bit parallel binary adders will be required to construct a 4 – bit parallel
multiplier?
a. 1 b. 2 c. 4 d. 8
62. What kind of operation occurs in a J – K flip flop when both inputs J and K are equal to 1?
a. Preset operation b. Reset operation c. Clear operation d. Toggle operation
63. Which of the following codes is a sequential code?
a. 8421 code b. 2421 code c. 5421 code d. 2441 code
64. Which of these code pairs correctly represent Digital Electronics reflective codes?
a. 2421 and 5211 b. 2421 and 8421 c. 5211 and 8421 d. 5421 and 2421
65. Which of the following options correctly represent the characteristic of Excess – 3 code?
a. It is a reflexive as well as a sequential code
b. It is a reflexive code but not a sequential code
c. It is a sequential code but not a reflexive code
d. It is neither a reflexive code nor a sequential code
66. The result “X + XY = X” follows which of these laws?
a. Consensus law b. Distributive law c. Duality law d. Absorption law
67. Which of the following options correctly represents the consensus law of Digital Circuits?
a. AB + AC + BC = AB + AC b. AB + AC + BC = AB + AC
c. AB + AC + BC = AB + AC d. AB + AC + BC = AB + AC
68. Which of the following points is not correct regarding an Ex – NOR gate in Digital
Electronics?
a. It is a one – bit comparator b. It is a buffer
c. It is a one – bit inverter d. It is a universal gate
69. Which gate is called the anti – coincidence and coincidence gate respectively?
a XNOR and XOR b. AND and OR c. OR and AND d. XOR and XNOR
70. What frequency division of the pulsed clock signal can be obtained by connecting 4 flip –
flops in cascade?
a. 2 b. 4 c. 8 d. 16