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D.E Course Plan

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Digital Electronics L T P C

Version 1.0 3 0 0 3

Pre-requisites/Exposure -

Co-requisites Computer System Architecture

Course Objectives
1. Demonstrate a basic understanding of digital terminology, digital components, and
systems.
2. To prepare students to perform the analysis and design of various digital electronic
circuits.
3. To give the students a perspective to design combinational and sequential circuits.

Course Outcomes
On completion of this course, the students will be able to

CO1: Understand working of logic families and logic gates.


CO2: Design and implement Combinational and Sequential logic circuits.
CO3: Understand the process of Analog to Digital conversion and Digital to Analog
conversion.
CO4: Understand the configuration and working of Microprocessor.

Catalog Description
Explores the theory and operation of the basic building blocks of digital electronics with
emphasis on transistor logic (TTL) and complementary metal oxide semiconductor
(CMOS) integrated circuit logic families; prepares for continued study of theory and
operation of microprocessors and microcomputers.

Course Content

Unit 1: Fundamentals of Digital Systems and logic families 8 Hours


Digital signals, digital circuits, AND, OR, NOT, NAND, NOR and Exclusive-OR
operations, Boolean algebra, examples of IC gates, number systems-binary, signed
binary, octal hexadecimal number, binary arithmetic, one’s and two’s complements
arithmetic, codes, error detecting and correcting codes, characteristics of digital lCs,
digital logic families, TTL, Schottky TTL and CMOS logic, interfacing CMOS and
TTL, Tri-state logic.

Unit 2: Combinational Digital Circuits 10 Hours


Standard representation for logic functions, K-map representation, and simplification of
logic functions using K-map, minimization of logical functions. Don’t care conditions,
Multiplexer, De-Multiplexer/Decoders, Adders, Subtractors, BCD arithmetic, carry
look ahead adder, serial adder, ALU, elementary ALU design, popular MSI chips, digital
comparator, parity checker/generator, code converters, priority encoders,
decoders/drivers for display devices, Q-M method of function realization.

Unit 3: Sequential circuits and systems 10 Hours

A 1-bit memory, the circuit properties of Bistable latch, the clocked SR flip flop, J- K-T
And D-Types flip flops, applications of flip flops, shift registers, applications of shift
registers, serial to parallel converter, parallel to serial converter, ring counter,
sequence generator, ripple (Asynchronous) counters, synchronous counters, counters
design using flip flops, special counter IC’s, asynchronous sequential counters,
applications of counters.

Unit 4: A/D and D/A Converters 10 Hours

Digital to analog converters: weighted resistor/converter, R-2R Ladder D/A converter,


specifications for D/A converters, examples of D/A converter lCs, sample and hold circuit,
analog to digital converters: quantization and encoding, parallel comparator A/D
converter, successive approximation A/D converter, counting A/D
converter, dual slope A/D converter, A/D converter using voltage to frequency and
voltage to time conversion, specifications of A/D converters, example of A/D converter
ICs.

Unit 5: Introduction to Microprocessor. 7


Hours

Introduction to Microprocessors, Architecture of 8085 and 8086, Pin Configuration and


Function; Internal Register & Flag Register, Generation of Control Signals Bus Timings:
Demultiplexing of Address /Data Bus; Fetch Cycle, Execute Cycle, Instruction Cycle,
Instruction Timings and Operation Status, Timing Diagram. Instruction for Data Transfer.
Arithmetic and Logical Operations. Branching Operation: Machine Cycle Concept;
Addressing Modes.

Suggested Books:

TEXT/REFERENCES:
1. R. P. Jain, "Modern Digital Electronics", McGraw Hill Education, 2009.
2. M. M. Mano, "Digital logic and Computer design", Pearson Education India, 2016.
3. A. Kumar, "Fundamentals of Digital Circuits", Prentice Hall India, 2016.

Modes of Evaluation: Quiz/Assignment/ presentation/ extempore/ Written Examination


Examination Scheme:

Components Internal Mid Term ESE

Weightage (%) 50% 20% 30%

Relationship between the Course Outcomes (COs), Program Outcomes (POs) and
Program Specific Objectives (PSOs)

Program
Outcomes

PSO1

PSO2

PSO3
PO10

PO11

PO12
PO1

PO2

PO3

PO4

PO5

PO6

PO7

PO8

PO9
Course
Outcomes
CO 1 2 2 1

CO 2 2 2 1

CO 3 2 2 1

CO 4 2 2 1

Average 2 2 1

1=weak 2= moderate 3=strong

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