Sbaa 343
Sbaa 343
Sbaa 343
Converters
SBAA343 – January 2019
Design Goals
Power Supply DAC Output Voltage Output Current Output
VCC: 24V, VSS: –5V, VDD: 5V 0V to 2.5V 0V to 5V 0A to 10A
Design Description
Signal-measurement equipment like Oscilloscope (DSO) and Data aquisition (DAQ) must manage input
signals that are not within the input range of the measurement analog-to-digital converter (ADC). To bring
the unknown input signal in the measurement range of the ADC, the first operation needed is offset
control. A programmable offset control circuit providing both positive and negative offset, performs this
function. This circuit uses a precision digital-to-analog converter (DAC), followed by a unipolar-to-bipolar
conversion circuit using an op amp. The output of this circuit is fed to a summing amplifier that adds this
DC output to the input signal.
R R
±
± R VOUT
+
V-SIGNAL +
RG1 CFB
RG2
VREF
± R
DAC +
V-OFFSET
R
VDAC
Design Notes
1. Choose a DAC with the required resolution and output range
2. Choose an op amp with low offset and low drift to minimize error. Thermal noise may be an additional
requirement in some applications
3. Choose RG1, RG2, and RFB such that the desired output offset is met
4. Choose the compensation capacitor CFB such that it is larger than the input capacitance of the op-amp
inputs
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Design Steps
1. Select the DAC80504 device: a 16-bit, 4-channel buffered voltage output DAC with 2.5-V internal
reference. Devices with an external reference option or devices with accessible internal references are
desirable in this application as the reference is used to create an offset. The DAC selection in this
design should primarily be based on DC error contributions, typically described by offset-error, gain-
error, and integrated non-linearity (INL) error.
2. Select an op amp such as the OPA227 operational amplifier that combines low noise and wide
bandwidth with high precision to make it the ideal choice for applications requiring both AC and
precision DC performance. Amplifier input offset voltage (VOS) is a key consideration for this design.
VOS of an operational amplifier is a typical data sheet specification, but in-circuit performance is also
impacted by drift overtemperature, the common-mode rejection ratio (CMRR), and power supply
rejection ratio (PSRR); therefore, give consideration to these parameters as well.
3. The DC transfer function of the offset voltage is given by:
æ R FB R FB ö æ R FB ö
V OFFSET = V DAC ç 1 + + ÷ - V REF ç ÷
ç R G2 R G1 ø ÷ ç R G2 ÷
è è ø
• First, using the previous transfer function, consider the negative full-scale output case when VDAC is
equal to 0V, VREF is equal to 2.5V, and VOFFSET is equal to –5V. This case is used to calculate the
ratio of RFB to RG2 and is shown in the following equation:
R FB
-5 V = - (2.5V )
R G2
That gives, RFB = 2 × RG2.
• Second, consider the positive full-scale output case when VDAC is equal to 2.5 V, VREF is equal to
2.5V, and VOUT is equal to 5V. This case is used to calculate the ratio of RFB to RG1 and is shown in
the following equation:
æ R FB R FB ö æ R FB ö
5V = ç 1 + + ÷ (2.5 V ) - ç ÷ (2.5 V )
ç R G2 R G1 ÷ø ç R G2 ÷
è è ø
This means, RG1 = RFB.
• Finally, select a value of RG2 to calculate the ideal values of RFB and RG1. The key considerations for
seeding the value of RG2 should be the drive strength of the reference source as well as choosing
small resistor values to minimize noise contributed by the resistor network. For this design, RG2 was
chosen to be 8kΩ, which will limit the peak current draw from the reference source to approximately
312µA, under nominal conditions. The 312µA is well within the 5-mA limit of the DAC80504 device.
By putting the value of RG2 in previous equations, RG1 and RFB is calculated as RG1 = RFB = 16kΩ.
4. In general, the compensation capacitor CFB is not set by fixed equations, but rather by choosing values
while observing the output small-signal step response. Through simulation in this example, select CFB ≥
22pF.
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DC Transfer Characteristics
T 6.00
5V
V-OFFSET
-5V
-6.00
10.00
V-OUT -5.33V 8V
-10.00
0.00 1.25 2.50
V-DAC (V)
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Design References
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
Link to Key Files
TINA source files – http://www.ti.com/lit/zip/sbam418.
For direct support from TI Engineers use the E2E community:
e2e.ti.com
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