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AAP149B: Features Description

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AAP149B

Microphone Pre-Amplifer with Digital Output


Description Features
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The AAP149B is a chip-scale device with digital  Integrated 4 Order Sigma-Delta ADC, with
output developed specifically for integrating in small 20kHz signal BW, PDM output and clock
form factor two terminal electret condenser  Frequency of 1MHz to 3MHz
microphones.
 20dB Gain
The AAP149B provides PDM bit stream output and
can run with a clock frequency of 1MHz to 3MHz and  Sleep Mode with low Quiescent Current < 40µA
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it has incorporated of 4 order Sigma-Delta ADC. The  Low Input Capacitance 0.2pF typical
ADC has a 20kHz signal bandwidth. The single bit  Low Noise 5µV RMS typical Input Noise (A-
modulator features an inherently linear output, as well weighted, input shorted)
as enabling noise shaping and shifting of quantization
noise.  Stereo-Audio Compatible with L/R Channel
Select
The AAP149B provides ultra-low input capacitance
and noise performance, 5µVrms typical with shorted  RoHS Compliant & Halogen Free
input to ground, and it also provides excellent RFI and
EMI immunity.
The AAP149B has 20dB gain and low quiescent
current in sleep mode. Sleep mode is automatically
detected by the clock frequency falling below 100kHz.
Additionally, the AAP149B is configured to be
Applications
compatible with stereo audio applications, with  Small Diameter Electret Microphones with digital
provision of a Left and Right channel select. output

The AAP149B is provided in a chip scale 6pin SMD


package. The package size is 810µm x 1200µm; with
an overall height of 350µm including solder bumps.
This extremely small package size and aspect ratio is
optimum for use in small diameter microphones.
Available in tape & reel package.

Functional Block Diagram

VDD

LDO

ECM IN DATA
Amp SELECT

CLK GND L/R

Figure 1 · Functional Block Diagram

May 2015 Rev. 1.0 www.microsemi.com 1


© 2015 Microsemi Corporation- Analog Mixed Signal
AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output

Pin Configuration

DATA GND CLK

XY
VDD IN L/R

Figure 2 · Pinout (Top View)


 Top mark XY and pin 1 indicator (Laser mark)
XY= Unique lot code assigned for each assembly order

Ordering Information
Ambient Packaging Packing
Type Package Part Number
Temperature Type Qty

RoHS2 compliant,
-40°C to 85°C Pb-free CSP AAP149BS-M6B-G-LF-TR Tape and Reel 3500
Halogen Free

Pin Description
Pin Designator Description
CLK ADC Clock input of 1MHz to 3MHz
GND Ground
DATA Data Output pin, selectable by L/R
VDD Power input, 1.6V to 3.6V
IN Analog signal input for Electret Condenser Microphone
L/R Left or Right Channel Select. L/R sets low for Left channel, VDD for Right channel

2 May 2015 Rev. 1.0


Absolute Maximum Ratings

Absolute Maximum Ratings


Parameter Min Max Units
Power Supply (VDD) -0.5 5 V
Analog Input (IN) -0.5 0.5 V
Voltage on CLK ( without loading clock) 5 V
Voltage on L/R 5 V
Maximum Operating Ambient Temperature -40 85 °C
Maximum storage temperature -65 100 °C
Peak package solder reflow temperature (40 seconds maximum exposure) 260 °C
Note: Exceeding any Absolute Maximum ratings could cause damage to the device. All voltages are with respect to GND. Currents are
positive into, negative out of specified terminal. These are stress ratings only and functional operation of the device at these, or
any other conditions beyond those indicated under “Recommended Operating Conditions” are not implied. Exposure to “Absolute
Maximum Ratings” for extended periods may affect device reliability.

Typical Operating Conditions


Parameter Symbol Min. Typ. Max. Unit
Supply Voltage Range VDD 1.6 3.3 3.6 V
Operating Temperature Range TA -4 45 °C
Clock Rise and Fall Time 10 ns

May 2015 Rev. 1.0 3


AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output

Electrical Characteristics
Note: Unless otherwise specified, all limits are guaranteed for TA = 25°C, VDD= 3.3V, VIN = -44dBVRMS,
fCLK=2.4MHz, 50% duty, CMIC =5pF

Parameter Test Conditions Min Typ Max Units


POWER SUPPLY
Supply Voltage (VDD) 1.6 3.3 3.6 V
Supply Current IN=GND, CLK=2.4MHz, No Load
Normal Mode (IDD) VDD=1.8V 510 µA
VDD=3.3V 600 µA
Sleep Mode ( ISB) VDD=1.8V, fCLK=GND 8.2 40 µA
VDD=3.3V, fCLK=GND 15.5 40 µA
PERFORMANCE
Transfer Function (TF) 20 dBV/dBFS
Nominal Sensitivity IN=1kHz, -44dBV -24 dBFS
Signal-to-Noise Ratio (SNR) IN=1kHz, -44dBV, A-weighted 60 dB(A)
Input Referred Noise (EIN) 20Hz to 20kHz, A-weighted, 5 µVRMS
Derived from EIN and max
Dynamic Range 90 dB
acoustic input
Band Width 25 20000 Hz
Frequency Response Low Frequency -3dB point 33 Hz
High Frequency -3dB point 20 kHz
THD & Noise ( THD+N) 0.21 %
Overload Margin @1% THD+N 81 mVpk
@5% THD+N 91 mVpk
Input Capacitance ( CIN) 0.2 pF
Input Resistance ( RIN) >20 GΩ
Maximum Acoustic Input 120 dBSPL
IN=GND, 217Hz, 100mVpp
Power Supply Rejection Ratio
square wave superimposed on -70 dBFS
(PSRR)
VDD=1.8V
DIGITAL INPUT/OUTPUT CHARACTERISTICS
Input Voltage High (VIH) IOUT=1.8mA 0.65*VDD VDD+0.3 V
Input Voltage Low (VIL) IOUT=1.8mA -0.3 0.35*VDD V
Output Voltage High (VOH) IOUT=1.8mA 0.65*VDD VDD+0.3 V
Output Voltage Low (VOL) IOUT=1.8mA -0.3 0.35*VDD V
Noise Floor 20Hz to 20kHz, A-weighted -83 dBFS
TIMING CHARACTERISTICS
(Note1)
Start-Up Period 5 ms
(Note 3)
Sleep time (tSL) Time from CLK Falling < 100kHz 10 ms
(Note 2) Time from CLK Rising > 100kHz,
Wake-Up time(tWU) 10 ms
Power On
Clock Frequency ( fCLK) 1 2.4 3 MHz
Clock Duty Ratio 40 50 60 %

4 May 2015 Rev. 1.0


Electrical Characteristics

Parameter Test Conditions Min Typ Max Units

Clock Rise/Fall time (tCF, tCR) RL=1MΩ & CL=15pF 10 ns


Time from CLK transition to On falling edge of CLK,
20 ns
data becoming valid (TDV) L/R=GND, CL=15pF
Time from CLK transition to On Rising edge of CLK,
15 ns
data becoming Hi-Z (TDH) L/R=GND, CL=15pF
Time from CLK transition to On Rising edge of CLK,
26 ns
data becoming valid (TDV) L/R=VDD, CL=15pF
Time from CLK transition to On falling edge of CLK,
14 ns
data becoming Hi-Z (TDH) L/R=VDD, CL=15pF
Load capacitance on Data (CL) 100 pF

Notes:
(1) Start-up period is measured when VDD becomes 3.3V to the time when transfer function settles within 1dB
of its final value. After start-up period, the device can handle equivalent of 1Pa with THD <10%.
(2) The wake-up period is measured when the clock frequency is higher than 100kHz and the transfer function
is settles within 1dB of its final value.
(3) Fall-sleep period is measured when the clock frequency falls below 100kHz and current drops to the stand-
by current ISB.
(4) The stand-by mode is entered when the clock frequency is below the specified clock frequency.

TIMING DIAGRAM
tCLK

CLK

tDH
tDV
DATA1 HI-Z

tDH

tDV HI-Z
DATA2

Timing diagram of CLK and DATA terminals

May 2015 Rev. 1.0 5


AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output

Applications Information
VDD is required to decouple using 0.1µF ceramic capacitor. It should be placed very close to the VDD pin and
GND. Due to very high input impedance, careful consideration should be taken to remove all flux used during the
reflow soldering process.
A 100Ω resistance is recommended on the clock output of the device driving AAP149B to minimize ringing and
improve signal integrity.
For optimal PSRR, route a trace to the VDD pin. DO not place a VDD plane under the device.

Vsupply

VDD

LDO
PDM input
IN Pre- DATA Audio
ECM
Amp SELECT SDI Amplifier
CLK
CLK GND L/R
Vsupply

Mono Microphone Application Circuit

Vsupply

VDD

LDO
PDM input
IN Pre- DATA Audio
ECM
Amp SELECT SDI Amplifier
CLK
CLK GND L/R
Vsupply

Vsupply

VDD

LDO

ECM IN Pre- DATA


Amp SELECT

CLK GND L/R

Stereo Microphone Application Circuit

6 May 2015 Rev. 1.0


Package Outline Dimensions

Package Outline Dimensions


The package is halogen free and meets RoHS2 and REACH standards.

MILLIMETERS INCHES
Dim MIN MAX MIN MAX
A 0.252 0.352 0.0099 0.0139
Øb
E A1 E1 A1 0.065 0.095 0.0026 0.0037
6X
A2 0.175 0.225 0.0069 0.0089
b 0.105 0.0041
D1 0.970 BSC 0.0382 BSC
D D1 D 1.200 1.225 0.0472 0.0482

e
e 0.485 BSC 0.0191 BSC
E1 0.570 BSC 0.0224 BSC
E 0.810 0.835 0.0319 0.0329
A2
A Note:

1. Solder ball composition is SnAg


2. Dimensions are in mm, inches for
reference only.

Figure 3 · 6 Bump X2CSP Micro SMD Package Dimensions

May 2015 Rev. 1.0 7


AAP149B Electret condenser Microphone Pre- Amplifer with Digital Output

Tape (Pocket) Pitch

Ø0.140mm
Solder Mask Opening
Carrier
1
Tape Pin
Ø0.080mm
Cu Pad
0.970mm

0.485mm Feed Direction

 Carrier tape width 8mm


0.570mm
 Reel Diameter 7”
 Devices per reel 3,500

Figure 4 · PCB Layout Footprint / Tape and Reel Information

8 May 2015 Rev. 1.0


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and system solutions for communications, defense & security, aerospace and industrial
markets. Products include high-performance and radiation-hardened analog mixed-signal
integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and
synchronization devices and precise time solutions, setting the world’s standard for time; voice
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anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design
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approximately 3,400 employees globally. Learn more at www.microsemi.com.
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AAP149B-1.0/05.15

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