NCV8675

350mA Very Low Iq Low

Dropout Linear Regulator
with Reset and Reset Delay
The NCV8675 is a precision 5.0 V fixed output, low dropout
integrated voltage regulator with an output current capability of http://onsemi.com
350 mA. Careful management of light load current consumption,
combined with a low leakage process, achieve a typical quiescent MARKING
ground current of 34 mA. DIAGRAM
NCV8675 is pin for pin compatible with NCV4275 and it could
replace this part when very low quiescent current is required.
The output voltage is accurate within ±2.0%, and maximum dropout
NC
voltage is 600 mV at full rated load current.
V8675-50
It is internally protected against input transients, input supply AWLYWWG
reversal, output overcurrent faults, and excess die temperature. No D2PAK 5
external components are required to enable these features. DS SUFFIX
Features CASE 936A
•5 V Fixed Output (3.3 V and 2.5 V Versions Available Upon Request)
•±2.0% Output Accuracy, Over Full Temperature Range A = Assembly Location
WL = Wafer Lot
•34 mA Typical Quiescent Current at IOUT = 100 mA, 50 mA Y = Year
Maximum up to 85°C WW = Work Week
•600 mV Maximum Dropout Voltage at 350 mA Load Current G = Pb-Free Package

•Wide Input Voltage Operating Range of 5.5 V to 45 V

•Internal Fault Protection
♦-42 V Reverse Voltage
♦Short Circuit/Overcurrent ORDERING INFORMATION
See detailed ordering and shipping information in the package
♦Thermal Overload
dimensions section on page 12 of this data sheet.
•AEC-Q100 Qualified
•EMC Compliant
•DPAK Version Available Upon Request
•NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
•These are Pb-Free Devices
IN OUT

Error Current Limit and

Amplifier Saturation Sense
Bandgap
+
Reference
-

Thermal
Shutdown
Reset
D Generator

GND

RO
Figure 1. Block Diagram

© Semiconductor Components Industries, LLC, 2007 1 Publication Order Number:

August, 2007 - Rev. 1 NCV8675/D
 NCV8675

PIN DESCRIPTIONS
Symbol Function
VIN Unregulated Input Voltage; 5.5 V to 45 V; Battery Input Voltage. Bypass to GND with a Ceramic Capacitor.
RO Reset Output; Open Collector Active Reset (Accurate when VIN > 1.0 V)
GND Ground; Pin 3 Internally Connected to Tab
D Reset Delay; Timing Capacitor to GND for Reset Delay Function
VOUT Output; ±2.0%, 350 mA. 22 mF, ESR < 9 W

MAXIMUM RATINGS
Pin Symbol, Parameter Symbol Min Max Unit
Input Voltage VIN -42 45 V
Output Voltage VOUT -0.3 16 V
Reset Output Voltage VRO -0.3 25 V
Reset Output Current IRO -5.0 5.0 mA
Reset Delay Voltage VD -0.3 7.0 V
Reset Delay Current ID -2.0 2.0 mA
Storage Temperature TStg -55 +150 °C
ESD Capability
-Human Body Model - 4 kV
-Machine Model - 200 V
Storage Temperature TStg -55 +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

OPERATING RANGE
Pin Symbol, Parameter Symbol Min Max Unit
Input Voltage Operating Range VIN 5.5 45 V
Junction Temperature TJ -40 150 °C

THERMAL RESISTANCE
Parameter Symbol Min Max Unit
Junction Ambient D2PAK Rthja 85.4
°C/W
Junction Case D2PAK Rthjc 6.8
1. 1 oz., 100 mm2 copper area.

Pb SOLDERING TEMPERATURE AND MSL

Parameter Symbol Min Max Unit
Lead Temperature Soldering Tsld °C
Reflow (SMD styles only), Pb-Free (Note 2) 265 pk

Moisture Sensitivity Level MSL 1 -

2. Pb-Free, 60 sec – 150 sec above 217°C, 40 sec maximum at peak.

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 NCV8675

ELECTRICAL CHARACTERISTICS VIN = 13.5 V, TJ = -40°C to +150°C, unless otherwise specified

Parameter Symbol Test Conditions Min Typ Max Unit
OUTPUT
Output Voltage VOUT 0.1 mA v IOUT v 350 mA (Note 3) 4.900 5.000 5.100 V
6.0 V v VIN v 16 V

Output Voltage VOUT 0.1 mA v IOUT v 200 mA (Note 3) 4.900 5.000 5.100 V
6.0 V v VIN v 40 V

Line Regulation DVOUT IOUT = 5 mA -25 5 +25 mV

Versus VIN 6.0 V v VIN v 28 V

Load Regulation DVOUT 1.0 mA v IOUT v 350 mA (Note 3) -40 5 +40 mV

Versus. IOUT
Dropout Voltage VIN - VOUT IOUT = 200 mA (Note 3 and 4) 215 500 mV
IOUT = 350 mA (Note 3 and 4) 310 600

Quiescent Current Iq IOUT v 100 mA

TJ = 25°C 34 45 mA
TJ = -40°C to +85°C 34 50 mA
TJ = 125°C 54 60 mA
Active ground Current IG (ON) IOUT = 50 mA (Note 3) 1.8 3.5 mA
IOUT = 350 mA (Note 3) 20 40
Power Supply Rejection PSRR VRIPPLE = 0.5 VPP, F = 100 Hz 70 %/V
Output Capacitor for Stability COUT IOUT = 0.1 mA to 350 mA 22 mF
ESR 9 W
RESET TIMING D AND OUTPUT RO
Reset Switching Threshold VOUT, rt - 4.50 4.65 4.80 V
Reset Output Low Voltage VROL RExt > 5.0k, VOUT > 1.0V - 0.20 0.40 V
Reset Output Leakage Current IROH VROH = 5.0 V - 0 10 mA
Reset Charging Current ID,C VD = 1.0 V 2.0 4.0 6.5 mA
Upper Timing Threshold VDU - 1.2 1.3 1.4 V
Lower Timing Threshold VLU 1.24 V
Reset Delay Time trd CD = 47 nF 10 16 22 ms
Reset Reaction Time trr CD = 47 nF 1.5 4.0 ms
PROTECTION
Current Limit IOUT(LIM) VOUT = 4.5 V (Note 3) 350 mA
Short Circuit Current Limit IOUT(SC) VOUT = 0 V (Note 3) 100 600 mA
Thermal shutdown threshold TTSD (Note 5) 150 200 °C
3. Use pulse loading to limit power dissipation.
4. Dropout voltage = (VIN – VOUT), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with
VIN = 13.5 V.
5. Not tested in production. Limits are guaranteed by design.

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 NCV8675

TYPICAL CHARACTERISTIC CURVES

12 6
Unstable Region
10 5

OUTPUT VOLTAGE (V)

8 4
ESR (W)

6 3

4 2

2 1
Vin = 13.5 V Vin = 13.5 V
Stable Region CLOAD w 22 mF Load = 5 mA
0 0
0 100 200 300 0 10 20 30 40 50

OUTPUT LOAD (mA) INPUT VOLTAGE (V)

Figure 2. NCV8675 Stability Curve Figure 3. NCV8675 Input Voltage vs. Output
Voltage (Full Range)

6 0.6

5 0.5 125°C
DROPOUT VOLTAGE (V)
OUTPUT VOLTAGE (V)

4 0.4
25°C
3 0.3
-40 °C

2 0.2

1 Vin = 13.5 V 0.1

Load = 5 mA
0 0
0 2 4 6 8 10 0 100 200 300 400

INPUT VOLTAGE (V) LOAD CURRENT (mA)

Figure 4. NCV8675 Input Voltage vs. Output Figure 5. NCV8675 Dropout Voltage vs. Load
Voltage (Low Voltage) Current
25 0.5
0.45
25°C
QUIESCENT CURRENT (mA)

QUIESCENT CURRENT (mA)

20 0.4
25°C 0.35 125°C
125°C -40 °C
15 0.3
-40 °C 0.25
10 0.2
0.15
5 0.1
Vin = 13.5 V Vin = 13.5 V
0.05
0 0
0 100 200 300 400 0 5 10 15 20 25

LOAD CURRENT (mA) LOAD CURRENT (mA)

Figure 6. NCV8675 Quiescent Current vs. Load Figure 7. NCV8675 Quiescent Current vs. Load
Current (Full Range) Current (Light Load)

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 NCV8675

TYPICAL CHARACTERISTIC CURVES

6 0.07

Load = 50 mA
QUIESCENT CURRENT (mA)

QUIESCENT CURRENT (mA)

5 0.06

0.05
4
0.04
3
0.03
2
0.02

1 0.01 Vin = 13.5 V

Load = 100 mA
0 0
0 10 20 30 40 50 -50 0 50 100 150

INPUT VOLTAGE (V) TEMPERATURE (°C)

Figure 8. NCV8675 Quiescent Current vs. Figure 9. NCV8675 Quiescent Current vs.
Input Voltage Temperature

5
OUTPUT VOLTAGE (V)

1
Vin =6.0 V
0
0 100 200 300 400 500
OUTPUT LOAD (mA)

Figure 10. NCV8675 Output Voltage vs. Output Figure 11. Reset vs. Vout (Vin Rising)
Load
80

70

60

50
MAG (dB)

40

30

20 Iout = 100 mA
Vin = 13.5 V
10 TA = 25°C
Cout = 22 mA
0
10 100 1000 10k 100k
FREQUENCY (Hz)
Figure 12. Reset vs. Vout (Vin Falling) Figure 13. Power Supply Rejection Ratio

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 NCV8675

TYPICAL CHARACTERISTIC CURVES

80 80

70 70

60 60

50 50
MAG (dB)

MAG (dB)
40 40

30 30
Iout = 200 mA Iout = 350 mA
20 Vin = 13.5 V 20 Vin = 13.5 V
TA = 25°C TA = 25°C
10 Cout = 22 mA 10 Cout = 22 mA
0 0
10 100 1000 10k 100k 10 100 1000 10k 100k

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 14. Power Supply Rejection Ratio Figure 15. Power Supply Rejection Ratio

5.10 5.10
5.08 5.08
5.06 5.06
OUTPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

5.04 5.04
5.02 Iout = 100 mA 5.02
5.00 5.00 25°C
4.98 4.98
125°C
4.96 Iout = 200 mA 4.96
-40 °C
4.94 Iout = 350 mA 4.94
4.92 4.92
Vin = 13.5 V Vin = 6.0 V
4.90 4.90
-50 -25 0 25 50 75 100 125 150 0 50 100 150 200 250 300 350 400 450 500
TEMPERATURE (°C) OUTPUT CURRENT (mA)
Figure 16. NCV8675 Vout vs. Temperature Figure 17. NCV8675 Vout vs. Iout

5.10 18
5.08
17.5
5.06
RESET VOLTAGE (V)

RESET VOLTAGE (ms)

5.04
17
5.02
5.00 16.5
4.98
16
4.96
4.94 Iout = 100 mA
15.5 Vin = 13.5 V
Iout = 100 mA
4.92 Cdelay = 47 nF
Vin = 13.5 V
4.90 15
-50 -25 0 25 50 75 100 125 150 -50 0 50 100 150
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 18. NCV8675 Reset Voltage vs. Figure 19. NCV8675 Reset Delay Time vs.
Temperature Temperature

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 NCV8675

TYPICAL CHARACTERISTIC CURVES

4.7 860
4.68 840
820
RESET THRESHOLD (V)

4.66
800

CURRENT LIMIT (mA)

4.64 780
760
4.62
740
4.6
720
4.58 700
Iout = 100 mA 680
4.56
Vin = 13.5 V 660
4.54 Rdelay = 5.0 kW 640
Vin = 13.5 V
4.52 620
-50 0 50 100 150 -50 -25 0 25 50 75 100 125 150
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 20. NCV8675 Reset Delay Threshold vs. Figure 21. NCV8675 Current Limit Threshold
Temperature vs. Temperature

Output Voltage

Cout = 22 mF
Vin = 13.5 V

Output Load

Figure 22. NCV8675 100 mA - 350 mA Load

Transient

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 NCV8675

IN OUT IOUT
VIN 1 5 VOUT
CIN COUT
REXT
100 nF NCV8675 22 mF 5.0 K
ID
D RO
4 2 VRO
CD IRO
3
47 nF GND
IG

Figure 23. Application Circuits

Circuit Description Figure 2 for specific ESR ratings. The aluminum

The NCV8675 is an integrated low dropout regulator that electrolytic capacitor is the least expensive solution, but, if
provides 5.0 V, 350 mA protected output and a signal for the circuit operates at low temperatures (-25°C to -40°C),
power on reset. The regulation is provided by a PNP pass both the capacitance and ESR of the capacitor will vary
transistor controlled by an error amplifier with a bandgap considerably. The capacitor manufacturer's data sheet
reference, which gives it the lowest possible drop out usually provides this information. The value for the output
voltage and best possible temperature stability. The output capacitor COUT shown in Figure 13, Test Circuit, should
current capability is 350 mA, and the base drive quiescent work for most applications; however, it is not necessarily the
current is controlled to prevent over saturation when the optimized solution.
input voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal Reset Output
shutdown. Thermal shutdown occurs above 150°C to The reset output is used as the power on indicator to the
protect the IC during overloads and extreme ambient microcontroller. This signal indicates when the output
temperatures. The delay time for the reset output is voltage is suitable for reliable operation of the controller. It
adjustable by selection of the timing capacitor. See pulls low when the output is not considered to be ready. RO
Figure 23, Test Circuit, for circuit element nomenclature is pulled up to VOUT by an external resistor, typically 5.0 kW
illustration. in value. The input and output conditions that control the
Reset Output and the relative timing are illustrated in
Regulator Figure 24, Reset Timing. Output voltage regulation must be
The error amplifier compares the reference voltage to a maintained for the delay time before the reset output signals
sample of the output voltage (VOUT) and drives the base of a valid condition. The delay for the reset output is defined as
a PNP series pass transistor by a buffer. The reference is a the amount of time it takes the timing capacitor on the delay
bandgap design to give it a temperature-stable output. pin to charge from a residual voltage of 0 V to the upper
Saturation control of the PNP is a function of the load current timing threshold voltage VDU of 1.8 V. The charging current
and input voltage. Oversaturation of the output power for this is ID of 5.5 mA. By using typical IC parameters with
device is prevented, and quiescent current in the ground pin a 47 nF capacitor on the D Pin, the following time delay is
is minimized. derived:
Regulator Stability Considerations t RD + C D * V DUńI D
The input capacitor (CIN) is necessary to stabilize the t RD + 47 nF * (1.8 V)ń5.5 mA + 15.4 ms
input impedance to avoid voltage line influences. The output
capacitor helps determine three main characteristics of a Other time delays can be obtained by changing the CD
linear regulator: startup delay, load transient response and capacitor value. The Delay Time can be reduced by
loop stability. The capacitor value and type should be based decreasing the capacitance of CD. Using the formula above,
on cost, availability, size and temperature constraints. Delay can be reduced as desired. Leaving the Delay Pin
Ceramic, tantalum, or electrolytic capacitors of 22 mF, or open is not desirable as it can result in unwanted signals
greater, are stable with very low ESR values. Refer to being coupled onto the pin.

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 NCV8675

VI

< Reset Reaction Time

VOUT

VOUT,rt

t
dVD Reset Charge Current
+
dt CD
VD Upper Timing Threshold VDU

Lower Timing Threshold VDL

t
Reset Reset
Delay Time Reaction
VRO Time

Power-on-Reset Thermal Voltage Dip Undervoltage Secondary Overload

Shutdown at Input Spike at Output

Figure 24. Reset Timing

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 NCV8675

Calculating Power Dissipation Heatsinks

in a Single Output Linear Regulator A heatsink effectively increases the surface area of the
The maximum power dissipation for a single output package to improve the flow of heat away from the IC and
regulator (Figure 25) is: into the surrounding air.
PD(max) + [VI(max) * VOUT(min)] IOUT(max) (1) Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
) VI(max)Iq
series electrical resistances, these resistances are summed to
where determine the value of RqJA:
VI(max) is the maximum input voltage, RqJA + RqJC ) RqCS ) RqSA (3)
VOUT(min) is the minimum output voltage, where
IOUT(max) is the maximum output current for the
application, RqJC is the junction-to-case thermal resistance,
Iq is the quiescent current the regulator RqCS is the case-to-heatsink thermal resistance,
consumes at IQ(max). RqSA is the heatsink-to-ambient thermal resistance.
Once the value of PD(max) is known, the maximum RqJC appears in the package section of the data sheet. Like
permissible value of RqJA can be calculated: RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
RqJA + 150°C * A
T
(2) between them. These values appear in heatsink data sheets
PD
The value of RqJA can then be compared with those in the of heatsink manufacturers.
package section of the data sheet. Those packages with Thermal, mounting, and heatsinking considerations are
RqJA's less than the calculated value in Equation 23 will discussed in the ON Semiconductor application note
keep the die temperature below 150°C. AN1040/D.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
II IOUT
VI SMART VOUT
REGULATOR®

} Control
Features

Iq

Figure 25. Single Output Regulator with Key

Performance Parameters Labeled
THERMAL RESISTANCE JUNCTION-TO-AIR

100 100

75
10
R(t), (°C/W)

D2PAK
D2PAK 1 oz
(°C/W)

50 D2PAK 2 oz

1
25

Single Pulse
0 0.1
0 100 200 300 400 500 600 700 800 900
0.000001 0.0001 0.01 1 100
COPPER AREA (mm2) PULSE TIME (sec)
Figure 26. Figure 27. NCV8675 @ PCB Cu Area 100 mm2
PCB Cu thk 1 oz

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 NCV8675

EMC-Characteristics: Conducted Susceptibility Acceptance Criteria

All EMC-Characteristics are based on limited samples Amplitude Dev. max 4% of Output Voltage
and no part of production test according to 47A/658/CD Reset outputs remain in correct state + -1 V
IEC62132-4 (direct Power Injection). 1. dBm means dB milli-Watts, P(dBm) = 10 log
Test Conditions (P(mW))
2. A global pin carries a signal or power which enters
Supply Voltage Vin = 12 V
or leaves the application board
Temperature TA = 23°C + -5°C
3. A local pin carries a signal or power which does
Load RL = 100 W not leave the application board. It remains on the
Direct power Injection application board as a signal between two
33d Bm (Note 1) forward power CW for global pin (Note 2) components
17 dBm (Note 1) forward power CW for local pin (Note 3)

L1 L3

FERRITE FERRITE
X1 X5
VIN_DC VOUT_DC

X6
X2
C2 C1 C4 C5 VOUT_HF
VIN_HF
15 mF 100 nF 47 nF 22 mF

NCV8675
VOUT
1 I O 5

2 RO 4
D
GND
L2 3 L4
U1

FERRITE FERRITE
X3 X7
RO_DC D_DC

R1
C6 X8
X4 4.99k
47 nF D_HF
RO_HF
VOUT

Figure 28. Test Circuit

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 NCV8675

40 40

30 Vin Pass 33 dBm 30 Vout Pass 33 dBm

(dBm)

(dBm)
20 20

10 10

0 0
1 10 100 1000 1 10 100 1000
FREQUENCY (MHz) FREQUENCY (MHz)
Figure 29. Typical Vin Pin Susceptibility Figure 30. Typical Vout Pin Susceptibility
25 25

20 20

15 RO Pass 17 dBm 15 Delay Pass 17 dBm

(dBm)

(dBm)
10 10

5 5

0 0
1 10 100 1000 1 10 100 1000
FREQUENCY (MHz) FREQUENCY (MHz)
Figure 31. Typical RO Pin Susceptibility Figure 32. Typical Delay Pin Susceptibility

ORDERING INFORMATION
Device Package Shipping†
NCV8675DS50G D2PAK 50 Units / Rail
(Pb-Free)

NCV8675DS50R4G D2PAK 800 / Tape & Reel

(Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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 NCV8675

PACKAGE DIMENSIONS

D2PAK 5
CASE 936A-02
ISSUE C

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
-T- TERMINAL 6 2. CONTROLLING DIMENSION: INCH.
OPTIONAL 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
A CHAMFER E AND K.
U
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
K S 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
V FLASH OR GATE PROTRUSIONS. MOLD FLASH
B AND GATE PROTRUSIONS NOT TO EXCEED 0.025
H (0.635) MAXIMUM.
1 2 3 4 5
M INCHES MILLIMETERS
L DIM MIN MAX MIN MAX
A 0.386 0.403 9.804 10.236
D B 0.356 0.368 9.042 9.347
N P C 0.170 0.180 4.318 4.572
0.010 (0.254) M T D 0.026 0.036 0.660 0.914
G R E 0.045 0.055 1.143 1.397
G 0.067 BSC 1.702 BSC
H 0.539 0.579 13.691 14.707
K 0.050 REF 1.270 REF
L 0.000 0.010 0.000 0.254
M 0.088 0.102 2.235 2.591
N 0.018 0.026 0.457 0.660
C
P 0.058 0.078 1.473 1.981
R 5 _ REF 5 _ REF
S 0.116 REF 2.946 REF
SOLDERING FOOTPRINT* U 0.200 MIN 5.080 MIN
V 0.250 MIN 6.350 MIN

8.38
0.33

1.702
0.067

10.66
0.42

1.016
3.05 0.04
0.12
16.02
0.63
SCALE 3:1 ǒinches
mm Ǔ

5-LEAD D2PAK
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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