W-5200-5 Low Noise Regulated Charge Pump DC-DC Converter: V V V V V V V V V V V V
W-5200-5 Low Noise Regulated Charge Pump DC-DC Converter: V V V V V V V V V V V V
W-5200-5 Low Noise Regulated Charge Pump DC-DC Converter: V V V V V V V V V V V V
Features GND IN
v Constant HighFrequency(2 MHz) Operation SHDN CNEG
v 100 mAOutput Current (Top Views)
v Regulated OutputVoltage (5 VFixed
v Low Quiescent Current (1.7 mA Typ.)
v InputVoltageOperation down to 2.7 V
v Soft Start, Slew Rate Control
v Thermal Overload Shutdown Protection
v LowValue External Capacitors (1ȝF)
v Foldback Current Overload Protection
v ShutdownCurrent less than 1ȝA ORDERING INFORMATION
v Low Profile (1 mm Thin)ïl eadTSO7ï2 3 Package Device Package Shipping
v These Devices are PbïFree, Halogen Free/BFR Freeand are RoHS :7',ï*73 TSOT23ï6 3,000 / Tape &
Compliant (Note 1) (PbïFree) Reel
Applications
v 3 V to 5 V Boost Conversion
v White LED Driver
v USB OnïTheïGo 5 V Supply
v Local 5 V Supply from Lower Rail
v Battery Backup Systems
v Handheld Portable Devices
MARKING DIAGRAMS
VA = W-5200TDI-GT3
Y = Production Year (Last Digit)
VAYM M = Production Month (1-9, A, B, C or O, N, D)
R = Production Revision
Typical Application
1 F
CNEG CPOS 5V VOUT
VIN IN OUT
100 mA
:ï
+ ON OFF SHDN
3.3 V GND
ï 1 F 1 F
VOUT = 5 V
IOUT b 50 mA, for VIN r 2.8 V
IOUT b 90 mA, for VIN r 3 V
StressesexceedingMaximumRatingsmaydamagethedevice.MaximumRatingsarestressratingsonly.Functionaloperationabovethe
RecommendedOperatingConditions is not implied. Extendedexposure to stresses above theRecommended OperatingConditions may affect
device reliability.
2
W-5200ï5
3
W-5200ï5
1.2 2.2
1.1
SHUTDOWN THRESHOLD (V)
0.9 1.8
0.8
0.7 1.6
0.6
1.4
0.5
0.4 1.2
2.7 3.0 3.3 3.6 3.9 4.2 4.5 2.7 3.0 3.3 3.6 3.9 4.2 4.5
INPUT VOLTAGE (V) INPUT VOLTAGE (V)
Figure . Shutdown Input Threshold vs. Figure . Ground Current vs. Supply Voltage
SupplyVoltage (NoLoad)
5.2 5.2
OUTPUT VOLTAGE (V)
5.1 5.1
20 mA Load
5.0 5.0 VIN = 3.2 V
100 mA Load
4.9 4.9
VIN = 3.0 V
VIN = 2.7 V
4.8 4.8
2.7 3.0 3.3 3.6 3.9 4.2 4.5 0 50 100 150
INPUTVOLTAGE(V) LOADCURRENT(mA)
Figure.LineRegulation Figure.LoadRegulation
2.6 100
OSCILLATOR FREQUENCY (MHz)
90 VIN = 2.7 V
2.4
80 VIN = 3.2 V
EFFICIENCY (%)
60
2.0
50 VIN = 4.5 V
1.8
40
1.6 30
2.7 3.0 3.3 3.6 3.9 4.2 4.5 1 10 100
INPUT VOLTAGE (V) LOADCURRENT(mA)
Figure . Oscillator Frequency vs. Supply Figure . Efficiency vs. Load Current
Voltage
4
W-5200ï5
250
200
CURRENT LIMIT (mA)
150
100
50
0
2.7 3.0 3.3 3.6 3.9 4.2 4.5
INPUT VOLTAGE (V)
Figure1. Output Ripple Figure 1. Short Circuit Current vs. Supply
(100 mA Load, 3.3 V Input) Voltage
2 4
OUTPUT VOLTAGE CHANGE (%)
1 2
10 mA Load
0 0
ï1 ï2
ï2 ï4
ï40 ï20 0 20 40 60 80 100 ï40 ï20 0 20 40 60 80 100
TEMPERATURE ($C) TEMPERATURE ($C)
Figure 1. Output Voltage Change vs. Figure 1. Oscillator Frequency Change vs.
Temperature Temperature
5
W-5200ï5
Block Diagram
CNEG CPOS
2 MHz 2VIN
IN Voltage
Doubler
SHDN
EN
+
ï
1.25 V 5V
OUT
300 k 100 mA
100 k
GND
Pin Functions
IN is the power supply. During normal operation the device a low ESR ceramic bypass capacitor (1 F to 4.7 F) in close
draws a supply current which is almost constant. A very proximity to the OUT pin. The ESR of the output capacitor
brief interval of nonïconduction will occur at the switching will directly influence the output ripple voltage.
frequency. The duration of the nonïconduction interval is When the shutdown mode is entered, the output is
set by the internal nonïoverlapping “breakïbeforeïmake” immediately isolated from the input supply, however, the
timing. IN should be bypassed with a 1 F to 4.7 F low output will remain connected to the internal feedback
ESR (Equivalent Series Resistance) ceramic capacitor resistor network (400 k ). The feedback network will result
For filtering, a low ESR ceramic bypass capacitor (1 F) in a reverse current of 10 A to 20 A to flow back through
in close proximity to the IN pin prevents noise from being the device to ground.
injected back into the power supply. Whenever the device is taken out of shutdown mode, the
SHDN is the logic control input (Active LOW) that places output voltage will experience a slew rate controlled
the device into shutdown mode. The internal logic is CMOS powerïup. Full operating voltage is typically achieved in
and the pin does not use an internal pullïdown resistor. The less than 0.5 msec.
SHDN pin should not be allowed to float. GND is the ground reference for all voltages on :ï
CPOS, CNEG are the positive and negative connections devices.
respectively for the charge pump flying capacitor. A low
ESR ceramic capacitor (1 F) should be connected between
these pins. During initial powerïup it may be possible for the
capacitor to experience a voltage reversal and for this reason,
avoid using a polarized (tantalum or aluminum) flying
capacitor.
OUT is the regulated output voltage to power the load.
During normal operation, the device will deliver a train of
current pulses to the pin at a frequency of 2 MHz. Adequate
filtering on the pin can typically be achieved through the use
6
W-5200ï5
Device Operation
The:ïuseaswitchedcapacitorchargepump to The:ïwillcycleinandoutofthermal shutdown
boost the voltage at IN to a regulated output voltage. indefinitely without latchïu p or damage until a
Regulation is achieved by sensing the outputYRODWDJH shortïcircuit on OUT is removed.
throughaninternalresistordivider(:ï and
modulatingthechargepump outputcurrent based onthe
error signal. A 2ïphase nonïoverlapping clock activates the
charge pump switches. The flying capacitor is charged from
the IN voltage on the first phase of the clock. On the second
phase of the clock it is stacked in series with the input voltage
and connected to OUT. The charging and discharging the
flying capacitor continues at a free running frequency of
typically 2 MHz.
In shutdown mode all circuitry is turned off and the
:ï5 draw only leakage current from the VIN
supply.OUTisdisconnectedfromIN.TheSHDNpinis a
CMOS input with a threshold voltage of approximately
0.8V.The:ïisinshutdownwhenalogicLOWis
applied to the SHDN pin. The SHDN pin is a high
impedanceCMOSinput.SHDNdoesnothavean
internal pullïdown resistor and should not be allowed to
float and. It must always be driven with a valid logic level.
7
W-5200ï5
8
W-5200ï5
Typical Applications
1 F 1 F
4 6 4 6
4 V ) VIN ) 5 V
5 IN OUT 1 5 1
IN OUT
3.3 V ( 10%
3 3
SHDN VOUT SHDN 1 F
1 F VOUT
1 F W-5200ï5 5 V ( 4% 1 F W-5200ï5 5 V ( 4%
100 mA
GND GND
2 2
Figure 1. 3.3 V Supply to 5 V Figure 1. USB Port to Regulated 5 V Power Supply
1 F
4 6
Cï C+
Drive up to 5 LEDs
5 1
IN OUT
+
3 V to 4.4 V 1 F 1 F 100 1 100 1 100 1 100 1 100 1
W-5200ï5
Liïion
Battery
3 2
ON OFF SHDN SGND
9
W-5200ï5
PACKAGE DIMENSIONS
TSOTï23, 6 LEAD
CASE 419AFï01
ISSUE O
A2 A
L
b A1 c L2
L1
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-193.
10
W-5200ï5
W - 5200 TD I ïG T3
Package
TD: TSOTï23
Z: MSOP
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NIDEC COPAL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NIDEC COPAL assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in NIDEC COPAL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
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NIDEC COPAL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
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W-5200/(