VEML7700

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High Accuracy Ambient Light Sensor With I2C Interface
FEATURES
• Package type: surface-mount
• Package: side view
• Dimensions (L x W x H in mm): 6.8 x 2.35 x 3.0
• Integrated modules: ambient light sensor (ALS)
• Supply voltage range VDD: 2.5 V to 3.6 V
• Communication via I2C interface
• Floor life: 72 h, MSL 4, according to J-STD-020
4
• Low shut down current consumption: typ. 0.5 μA
3
• Material categorization: for definitions of compliance
2 please see www.vishay.com/doc?99912
1
AMBIENT LIGHT FUNCTION
Pinning • 16-bit dynamic range for ambient light detection from
1: SCL 0 lx to about 140 klx with resolution down to 0.0042 lx/ct,
2: VDD supports low transmittance (dark) lens design
3: GND • 100 Hz and 120 Hz flicker noise rejection
4: SDA • Excellent temperature compensation
• High dynamic detection resolution
DESCRIPTION • Software shutdown mode control
VEML7700 is a high accuracy ambient light digital 16-bit
resolution sensor in a miniature transparent 6.8 mm x APPLICATIONS
2.35 mm x 3.0 mm package. It includes a high sensitive • Ambient light sensor for backlight dimming of e.g. TV
photo diode, a low noise amplifier, a 16-bit A/D converter displays, smart phones, touch phones, PDA, GPS
and supports an easy to use I2C bus communication
• Ambient light sensor for industrial on- / off-lighting
interface.
operation
The ambient light result is as digital value available.
• Optical switch for consumer, computing, and industrial
devices and displays

PRODUCT SUMMARY
OPERATING I2C BUS
AMBIENT LIGHT AMBIENT LIGHT ADC RESOLUTION
VOLTAGE VOLTAGE OUTPUT
PART NUMBER RANGE RESOLUTION PROXIMITY /
RANGE RANGE CODE
(lx) (lx) AMBIENT LIGHT
(V) (V)
VEML7700 2.5 to 3.6 1.7 to 3.6 0 to 140 000 0.0042 16 bit, I2C - / 0.0042

ORDERING INFORMATION
ORDERING CODE PACKAGING VOLUME (1) REMARKS
VEML7700-TR Tape and reel MOQ: 2300 (MOQ is one reel) Side view
VEML7700-TT Tape and reel MOQ: 2200 (MOQ is one reel) Top view
Note
(1) MOQ: minimum order quantity

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ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT
Supply voltage VDD 0 4 V
Operation temperature range Tamb -25 +85 °C
Storage temperature range Tstg -25 +85 °C
Total power dissipation Tamb ≤ 25 °C Ptot - 50 mW
Junction temperature Tj - 100 °C

BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT
Supply voltage VDD 2.5 3.3 3.6 V
Shut down current (2) VDD is 3.3 V Isd - 0.5 - μA
VDD is 3.3 V, PSM = 11, refresh time 4100 ms IDD - 2 - μA
Operation mode current (1) VDD is 3.3 V, PSM = 00, refresh time 600 ms IDD - 8 - μA
VDD is 3.3 V, PSM_EN = 0, refresh time 100 ms IDD 45 - μA
I2C clock rate range fSCL 10 - 400 kHz
I2C bus input H-level range VDD is 3.3 V Vih 1.3 - 3.6 V
I2C bus input L-level range VDD is 3.3 V Vil -0.3 - 0.4 V
Digital current out (low, current sink) Iol 3 - - mA
Digital resolution (LSB count) (3) With ALS_GAIN = x 2, ALS_IT = 800 ms - 0.0042 - lx/step
Detectable maximum illuminance (3) With ALS_GAIN = x 1/8, ALS_IT = 25 ms EV max. - 140 000 - lx
Dark offset (2) With ALS_GAIN = x 2, ALS_IT = 800 ms - 3 - step
Notes
(1) Light source: white LED
(2) Light conditions: dark
(3) Refer to the application note for resolution table at different settings

CIRCUIT BLOCK DIAGRAM

VEML7700

SCL 1 Temperature
compensation
control
INT

VDD 2 ALS Integrating

registers
I2C interface

ADC
Data

WHITE Integrating
ADC
Command
registers

GND 3
Logic and timing
controller

SDA 4 Oscillator

Fig. 1 - Block Diagram

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I2C TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

STANDARD MODE (1) FAST MODE (1)
PARAMETER SYMBOL UNIT
MIN. MAX. MIN. MAX.
Clock frequency f(SMBCLK) 10 100 10 400 kHz
Bus free time between start and stop condition t(BUF) 4.7 - 1.3 - μs
Hold time after (repeated) start condition;
t(HDSTA) 4.0 - 0.6 - μs
after this period, the first clock is generated
Repeated start condition setup time t(SUSTA) 4.7 - 0.6 - μs
Stop condition setup time t(SUSTO) 4.0 - 0.6 - μs
Data hold time t(HDDAT) 0 3450 0 900 ns
Data setup time t(SUDAT) 250 - 100 - ns
I2C clock (SCK) low period t(LOW) 4.7 - 1.3 - μs
I2C clock (SCK) high period t(HIGH) 4.0 - 0.6 - μs
Detect clock / data low timeout t(TIMEOUT) 25 35 - - ms
Clock / data fall time t(F) - 300 - 300 ns
Clock / data rise time t(R) - 1000 - 300 ns
Note
(1) Data based on standard I2C protocol requirement, not tested in production

t(LOW) t(R) t(F)

I2C bus VIH

clock
(SLCK) VIL

t(HDSTA) t(SUSTA)
t(HIGH)
t(SUSTO)
t(BUF) t(HDDAT) t(SUDAT)
I2C bus VIH
data
(SDAT) VIL
{

{
{
{

P S S P
Stop condition Start condition

Start Stop
t(LOSEXT)

SCLKACK SDAACK
t(LOWMEXT) t(LOWMEXT) t(LOWMEXT)

I2C bus
clock
(SLCK)

I2C bus
data
(SDAT)

Fig. 2 - I2C Timing Diagram

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PARAMETER TIMING INFORMATION

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1
W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)

Start by ACK ACK

master
I2C bus slave address byte Command code

I2C bus
clock
(SCLK)

I2C bus
SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
data
(SDAT)

ACK ACK Stop by

master
Data byte low Data byte high

Fig. 3 - I2C Bus Timing for Sending Word Command Format

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1
W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)

Start by ACK ACK

master
I2C bus slave address byte Command code

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1 R SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)
Start by ACK ACK by
master master
I2C bus slave address byte Data byte low

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

(SDAT)

NACK by Stop by
master master
Data byte high

Fig. 4 - I2C Bus Timing for Receive Word Command Format

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BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

Axis Title
110 10000
s(λ)Φ, rel. - Relative Spectral Sensitivity (%)

100
90
80
1000
70

2nd line
1st line
2nd line

60
50 V(λ)
40
100
30
VEML7700
20
10
0 10
400 500 600 700 800 900 1000
λ - Wavelength (nm)

Fig. 5 - Spectral Response

Axis Title
110 10000
s(λ)Φ, rel. - Relative Spectral Sensitivity (%)

100
90
80
1000
70
2nd line
1st line
2nd line

60
50
40
100
30
20
10
0 10
400 500 600 700 800 900 1000 1100
λ - Wavelength (nm)

Fig. 6 - White Channel Sensitivity Spectrum

0° 20°

1.0
ϕ - Angular Displacement
Srel - Relative Sensitivity

0.9
40°

0.8

0.7
60°
0.6

80°

0.5 0.4 0.3 0.2 0.1 0

22308

Fig. 7 - Relative Sensitivity vs. Angular Displacement

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APPLICATION INFORMATION
VEML7700 is a cost effective solution of ambient light sensor with I2C bus interface. The standard serial digital interface is easy
to access “Ambient Light Signal” without complex calculation and programming by external controller.

1. Application Circuit
2.5 V to 3.6 V R3
1.7 V to 3.6 V
10R C1 C2
10 μF 100 nF R1 R2

VDD (2)

C1 and R3 Host
are optional VEML7700 Micro Controller
for very
disturbed
supply
SDA (4) I2C bus sata SDA
SCL (1) I2C bus clock SCL

GND (3)

Fig. 8 - Application Diagram

Notes
• Proposed values for the pull-up resistor R1 and R2 should be > 1 kΩ, e.g. 2.2 kΩ to 4.7 kΩ.
• For detailed description about set-up and use as well as more application related information see AN: “Designing VEML7700 into an
Application”

2. I2C Interface
The VEML7700 contains actual six 16 bit command codes for operation control, parameter setup, and result buffering. All
registers are accessible via I2C communication. Fig. 10 shows the basic I2C communication with VEML7700.
The built in I2C interface is compatible with I2C modes “standard” and “fast”: 10 kHz to 400 kHz.
I2C H-level range = 1.3 V to 3.6 V.
Please refer to the I2C specification from NXP for details.

Send byte Write command to VEML7700

S Slave address Wr A Command code A Data byte (LSB) A Data byte (MSB) A P

Receive byte Read data from VEML7700

S Slave address Wr A Command code A S Slave address Rd A Data byte (LSB) A Data byte (MSB) N P

S = start condition
P = stop condition Host action
A = acknowledge
VEML7700 response
N = no acknowledge
Fig. 9 - Send Byte / Receive Byte Protocol

Register Addresses According 8 bit the bus address is then 0010 0000 = 20h for
VEML7700 has actual six user accessible 16 bit command write and 0010 0001 = 21h for read.
codes. Auto-Memorization
The addresses are 00h to 06h (03h not defined / reserved). VEML7700 can memorize the last ambient data before
Device Address shutdown and keep this data before waking up.
The VEML7700 has a fix slave address for the host When VEML7700 is in shutdown mode, the host can freely
programming and accessing selection. read this data via read command directly.
The slave address (7 bit) is set to 0010000 = 0x10. When VEML7700 wakes up, the data will be refreshed by
new detection.
The least significant bit (LSB) defines read or write mode.

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Interrupt pin not available for VEML7700

COMMAND REGISTER FORMAT

COMMAND CODE REGISTER NAME BIT FUNCTION / DESCRIPTION R/W
00 ALS_CONF_0 15 : 0 ALS gain, integration time, interrupt, and shutdown R/W
15 : 8 ALS high threshold window setting (MSB) R/W
01 ALS_WH
7:0 ALS high threshold window setting (LSB) R/W
15 : 8 ALS low threshold window setting (MSB) R/W
02 ALS_WL
7:0 ALS low threshold window setting (LSB) R/W
03 Power saving 15 : 0 Set (15 : 3) 0000 0000 0000 0b R/W
15 : 8 MSB 8 bits data of whole ALS 16 bits R
04 ALS
7:0 LSB 8 bits data of whole ALS 16 bits R
15 : 8 MSB 8 bits data of whole WHITE 16 bits R
05 WHITE
7:0 LSB 8 bits data of whole WHITE 16 bits R
06 ALS_INT 15 : 0 ALS INT trigger event R
07 ID 15 : 0 Device ID R
Note
• Command code 0 default value is 01 = devices is shut down

Command Code #0: Configuration Register

Register address = 00h
The command code #0 is for configuration of the ambient light measurements.

TABLE 1 - CONFIGURATION REGISTER #0

REGISTER NAME BIT FUNCTION / DESCRIPTION R/W
Reserved 15 : 13 Set 000b R/W
Gain selection
00 = ALS gain x 1
ALS_GAIN 12 : 11 01 = ALS gain x 2 R/W
10 = ALS gain x (1/8)
11 = ALS gain x (1/4)
reserved 10 Set 0b R/W
ALS integration time setting
1100 = 25 ms
1000 = 50 ms
ALS_IT 9:6 0000 = 100 ms R/W
0001 = 200 ms
0010 = 400 ms
0011 = 800 ms
ALS persistence protect number setting
00 = 1
ALS_PERS 5:4 01 = 2 R/W
10 = 4
11 = 8
Reserved 3:2 Set 00b R/W
ALS interrupt enable setting
ALS_INT_EN 1 0 = ALS INT disable R/W
1 = ALS INT enable
ALS shut down setting
ALS_SD 0 0 = ALS power on R/W
1 = ALS shut down
Note
• Light level [lx] is (ALS OUTPUT DATA [dec.] / ALS Gain x responsivity). Please study also the application note

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Command Code #1: High Threshold Windows Setting
Command code address = 01h. Once enable INT function and use high / low windows threshold, bit 15:0 provides 16 bit register
for high bound threshold windows setting.

TABLE 2 - HIGH THRESHOLD WINDOWS SETTING #1

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Description
ALS high threshold window setting (15:8 MSB 8 bits of whole 16 bits)
ALS high threshold window setting (7:0 LSB 8 bits of whole 16 bits)

Command Code #2: Low Threshold Windows Setting

Command code address = 02h. Once enable INT function and use high / low windows threshold, bit 15:0 provides 16 bit register
for low bound threshold windows setting.

TABLE 3 - LOW THRESHOLD WINDOWS SETTING #2

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Description
ALS low threshold window setting (15:8 MSB 8 bits of whole 16 bits)
ALS low threshold window setting (7:0 LSB 8 bits of whole 16 bits)

Command Code #3: Power Saving Mode: PSM

Command code address = 03h. Bits 2 and 1 define the power saving modes. Bits 15 : 3 are reserved.

TABLE 4 - POWER SAVING MODES

REGISTER NAME BIT FUNCTION / DESCRIPTION R/W
Power saving mode; see table “Refresh time”
00 = mode 1
PSM 2:1 01 = mode 2 R/W
10 = mode 3
11 = mode 4
Power saving mode enable setting
PSM_EN 0 0 = disable R/W
1 = enable

Command Code #4: ALS High Resolution Output Data

Command code address = 04h. To access 16 bit high resolution ALS output, it is suitable to follow read protocol to read from
command code 04 16 bits register.

TABLE 5 - ALS HIGH RESOLUTION OUTPUT DATA #4

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Description
ALS high resolution output data (15 : 8 MSB 8 bits of whole 16 bits)
ALS high resolution output data (7 : 0 LSB 8 bits of whole 16 bits)

Command Code #5: White Channel Output Data

Command code address = 05h. To access 16 bit WHITE output, it is suitable to follow read protocol to read from command
code 05 16 bits register.

TABLE 6 - WHITE CHANNEL OUTPUT DATA #5

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Description
WHITE output data (15 : 8 MSB 8 bits of whole 16 bits)
WHITE output data (7 : 0 LSB 8 bits of whole 16 bits)

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Command Code #6: Interrupt Status
Command code address = 06h. Bit 15 defines interrupt flag while trigger occurred due to data crossing low threshold windows.
Bit 14 defines interrupt flag while trigger occurred due to data crossing high threshold windows.

TABLE 7 - INTERRUPT STATUS #6

Bit 15 Bit 14 Bit 13 to 0
int_th_low int_th_high reserved
Description
int_th_low R bit. Indicated a low threshold exceed
int_th_high R bit. Indicated a high threshold exceed

Command Code #7: ID Register

Command code address = 07h. The low byte of the ID register contains the device specific ID code 81h. The high byte contains
a code that depends on the chosen slave address option: either 0xC4 for a device with slave address 0x20, or 0xD4 for a device
with slave address 0x90

TABLE 8 - DEVICE ID #7
Bit 15 to 8 Bit 7 to 0
Slave address option code Device ID code
Description
Slave address specific ID
Slave address option code For slave address option 0x20: 11000100 = 0xC4
For slave address option 0x90: 11010100 = 0xD4
Device ID code Fixed device ID: 10000001 = 0x81

REFRESH TIME DETERMINATION OF PSM

VEML7700’s refresh time can be determined by PSM and ALS_IT setting in power saving mode (PSM). Cooperating with the
command register setting, the designer has a flexible method in defining the timing, power consumption, and sensitivity for light
data collection.

REFRESH TIME, IDD, AND RESOLUTION RELATION

ALS_GAIN PSM ALS_IT (ms) REFRESH TIME (ms) IDD (μA) RESOLUTION (lx/bit)
x2 Mode 1 100 600 8 0.0336
x2 Mode 2 100 1100 5 0.0336
x2 Mode 3 100 2100 3 0.0336
x2 Mode 4 100 4100 2 0.0336
x2 Mode 1 200 700 13 0.0168
x2 Mode 2 200 1200 8 0.0168
x2 Mode 3 200 2200 5 0.0168
x2 Mode 4 200 4200 3 0.0168
x2 Mode 1 400 900 20 0.0084
x2 Mode 2 400 1400 13 0.0084
x2 Mode 3 400 2400 8 0.0084
x2 Mode 4 400 4400 5 0.0084
x2 Mode 1 800 1300 28 0.0042
x2 Mode 2 800 1800 20 0.0042
x2 Mode 3 800 2800 13 0.0042
x2 Mode 4 800 4800 8 0.0042

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PACKAGE DIMENSIONS in millimeters

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TAPING SIDE VIEW (-TR VERSION) in millimeters

0.3

3.6
16

1.75 7.5

Ø 1.5

Ø 1.5
2
8

Direction of feed
4

technical drawings
Drawing-No.: 9.700-5342.01-4 according to DIN
Issue: 2; 12.06.13 specifications

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TAPING TOP VIEW (-TT VERSION) in millimeters

4°

2.7
0.3
7.1

16

1.75 7.5
4°
3.3

Ø 1.5

Ø 1.5 min.

Direction of feed
2
8

technical drawings
according to DIN
specifications

Drawing-No.: 9.700-5341.01-4
Issue: 2: 23.03.09
21666

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REEL DIMENSIONS in millimeters

16734

LEADER AND TRAILER DIMENSIONS in millimeters

Trailer Leader

no devices devices no devices

End Start

min. 200 min. 400

96 11818

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REFLOW SOLDER PROFILE DRYPACK
Axis Title Devices are packed in moisture barrier bags (MBB) to
300 10000 prevent the products from moisture absorption during
Max. 260 °C transportation and storage. Each bag contains a desiccant.
250 255 °C
245 °C
240 °C
217 °C FLOOR LIFE
Temperature (°C)

200 1000
Floor life (time between soldering and removing from MBB)
Max. 30 s

2nd line
2nd line

1st line
must not exceed the time indicated on MBB label:
150
Floor life: 72 h
Max. 120 s Max. 100 s
100 100 Conditions: Tamb < 30 °C, RH < 60 %
Max. ramp down 6 °C/s
Moisture sensitivity level 4, according to J-STD-020.
50 Max. ramp up 3 °C/s

DRYING
0 10
0 50 100 150 200 250 300
In case of moisture absorption devices should be baked
19841 Time (s)
before soldering. Conditions see J-STD-020 or label.
Devices taped on reel dry using recommended conditions
Fig. 10 - Lead (Pb)-free Reflow Solder Profile 192 h at 40 °C (+ 5 °C), RH < 5 %.
According to J-STD-020

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Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.

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Revision: 01-Jan-2024 1 Document Number: 91000

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