THE MICROPROCESSOR AND ITS Lecture 2

ARCHITECTURE
LECTURE OUTLINE
 Internal Microprocessor Architecture
o The programming model
o Multipurpose Registers
o Special-Purpose Registers

Real Mode Memory Addressing

o Segments and Offsets
o Default Segments and Offsets
oSegments and Offsets Addressing Scheme Allows Relocation
2–1 INTERNAL MICROPROCESSOR ARCHITECTURE

THE PROGRAMMING MODEL

8086 through core2 consider two types of registers:
Program visible registers:
Registers are used during programming and are specified by the
instructions.
Program invisible registers:
Not addressable directly during applications programming but may be
used indirectly during system programming.

Only 80286 and above contain the program-invisible registers to

control and operate protected memory.
FIGURE 2-1: THE PROGRAMMING MODEL OF THE 8086
THROUGH THE CORE2 MICROPROCESSOR INCLUDING
THE 64-BIT EXTENSIONS

• The earlier 8086, 8088, and 80286

contain 16-bit internal architectures.
• The 80386 through the Core2
microprocessors contain full 32-bit
internal architectures.
• The Pentium 4 and Core2
also contain 64-bit registers when
operated in the 64-bit mode.
 The shaded areas in this illustration
represent registers that are found in
early versions of the 8086, 8088, or
80286 microprocessors and are
provided on the 80386–Core2
microprocessors for compatibility to
 MULTIPURPOSE REGISTERS
RAX - a 64-bit register (RAX), a 32-bit register (EAX), a 16-bit register
(AX), or as either of two 8-bit registers (AH and AL).
The (accumulator) is used for instructions such as multiplication, division, and some of
the adjustment instructions.
RBX, addressable as RBX, EBX, BX, BH, BL.
 BX register (base index) sometimes holds offset address of a location in the memory
system in all versions of the microprocessor.
RCX, as RCX, ECX, CX, CH, or CL.
 a (count) general-purpose register that also holds the count for various instructions.
RDX, as RDX, EDX, DX, DH, or DL.
a (data) general-purpose register
 holds a part of the result from a multiplication or part of dividend before a division.
RBP, as RBP, EBP, or BP.
points to a memory (base pointer) location for memory data transfers
RDI addressable as RDI, EDI, or DI.
often addresses (destination index) string destination data for the
string instructions
RSI used as RSI, ESI, or SI.
the (source index) register addresses source string data for the string
instructions
like RDI, RSI also functions as a general-purpose register
R8 - R15 found in the Pentium 4 and Core2 if 64-bit extensions are
enabled.
Most applications will not use these registers until 64-bit processors.
data in these registers are addressed as 64-, 32-, 16-, or 8-bit sizes and are
of general purpose,
SPECIAL-PURPOSE REGISTERS
Include RIP, RSP, and RFLAGS
segment registers include CS, DS, ES, SS, FS, and GS
RIP (instruction pointer) addresses the next instruction in a section of
memory defined as a code segment.
RSP (stack pointer) addresses an area of memory called the stack.
the stack memory stores data through this pointer.
RFLAGS indicate the condition of the microprocessor and control its
operation.
THE EFLAG AND FLAG REGISTER COUNTS FOR THE ENTIRE 8086 AND PENTIUM MICROPROCESSOR
FAMILY.
• The 8086–80286 contain a FLAG register (16 bits).
• The 80386 and above contain an EFLAG register (32-bit extended flag register).
• The 64-bit RFLAGS contain the EFLAG register, which is unchanged in the 64-bit
version.
• The rightmost five and the overflow flag are changed by most arithmetic and logic
operations.
• The flags never change for any data transfer or program control operation.
LIST OF EACH FLAG BIT, WITH A BRIEF DESCRIPTION OF FUNCTION.

 C (carry) holds the carry after addition or borrow after subtraction.

 also indicates error conditions
 P (parity) is the count of ones in a number expressed as even or odd.
Logic 0 for odd parity; logic 1 for even parity.
 if a number contains three binary one bits, it has odd parity; If a number contains
no one bits, it has even parity
 A (auxiliary carry) holds the carry (half-carry) after addition or the
borrow after subtraction between bit positions 3 and 4 of the result.
LIST OF EACH FLAG BIT, WITH A BRIEF DESCRIPTION OF FUNCTION.

Z (zero) shows that the result of an arithmetic or logic operation is

zero.
 If (Z=1), the result is zero; if (Z=0), the result is not zero.
 S (sign) flag holds the arithmetic sign of the result after an arithmetic
or logic instruction executes.
 If (S=1), the sign bit (leftmost bit of a number) is set or negative; if (S=0), the sign
bit is positive.
 T (trap) The trap flag enables trapping through an on-chip
debugging feature. (A program is debugged to find an error or bug.)
 If the T flag is enabled (1), the microprocessor interrupts the flow of the program.
If the T flag is a logic 0, the trapping (debugging) feature is disabled.
LIST OF EACH FLAG BIT, WITH A BRIEF DESCRIPTION OF FUNCTION.

I (interrupt) controls operation of the INTR (interrupt request) input pin.

 If I=1, the INTR pin is enabled; if I=0 , the INTR pin is disabled.
 D (direction) selects increment or decrement mode for the DI and/or SI
registers.
 If D=1, the registers are automatically decremented; if D=0, the registers are
automatically incremented.
 O (overflow) occurs when signed numbers are added or subtracted.
 an overflow indicates the result has exceeded the capacity of the machine
 For example, if 7FH (+127) is added—using an 8-bit addition—to 01H (+1 ), the
result is 80H (–128). This result represents an overflow condition indicated by the
overflow flag for signed addition.
LIST OF EACH FLAG BIT, WITH A BRIEF DESCRIPTION OF FUNCTION.
 IOPL used in protected mode operation to select the privilege level
for I/O devices.
 If the current privilege level is higher or more trusted than the IOPL, I/O
executes without hindrance. If the current privilege level is lower or less trusted
than the IOPL, an interrupt occurs, causing execution to suspend.
Note that an IOPL of 00 is the highest or most trusted and an IOPL of 11 is the
lowest or least trusted.
 NT (nested task) flag indicates the current task is nested within
another task in protected mode operation.
 RF (resume) used with debugging to control resumption of
execution after the next instruction.
LIST OF EACH FLAG BIT, WITH A BRIEF DESCRIPTION OF FUNCTION.
VM (virtual mode) flag bit selects virtual mode operation in a
protected mode system.
AC (alignment check) flag bit activates if a word or doubleword is
addressed on a non-word or non-doubleword boundary.
VIF (virtual interrupt) is a copy of the interrupt flag bit available to the
Pentium 4
VIP (virtual interrupt pending) provides information about a virtual
mode interrupt for Pentium.
-used in multitasking environments to provide virtual interrupt flags
ID (identification) flag indicates that the Pentium microprocessors support
the CPUID instruction.
CPUID instruction provides the system with information about the Pentium
microprocessor, such as its version number and manufacturer.
SEGMENT REGISTERS
Four or six segment registers in various versions of the microprocessor.
Generate memory addresses when combined with other registers in the
microprocessor.
A segment register functions differently in real mode than in protected mode.
Following is a list of each segment register, along with its function in the
system.
CS (code segment): defines the memory location where the program code is
stored.
DS (data segment): defines where data from the program will be stored.
Data are accessed by an offset address or contents of other registers that
hold the offset address
SEGMENT REGISTERS

ES (extra segment): defines an additional data segment used by some

instructions to hold destination data.
SS (stack segment) defines the area of memory used for the stack.
stack entry point is determined by the stack segment and stack
pointer (SP) registers
the base pointer (BP) register also addresses data within the stack
segment
FS and GS segments are supplemental segment registers available in
80386–Core2 microprocessors.
allow two additional memory segments for access by programs
2-2 REAL MODE MEMORY ADDRESSING
80286 and above operate in either the real or protected mode.
Real mode operation allows addressing of only the first 1M byte of
memory space—even in Pentium 4 or Core2 microprocessor.
the first 1M byte of memory is called the real memory, conventional
memory, or DOS memory system

Segments and Offsets

All real mode memory addresses must consist of a segment address plus an
offset address.
• segment address defines the beginning address of any 64K-byte
memory segment
• offset address selects any location within the 64K byte memory
segment
FIGURE 2–3 THE REAL MODE MEMORY-ADDRESSING SCHEME, USING A SEGMENT ADDRESS PLUS AN OFFSET.

– this shows a memory

segment beginning at
10000H, ending at
location IFFFFH
• 64K bytes in length

– also shows how an

offset address, called a
displacement, of
F000H selects location
1F000H in the memory
• Once the beginning address is known, the ending address is found
by adding FFFFH.
• because a real mode segment of memory is 64K in length
• The offset address is always added to the segment starting address
to locate the data.
• Segment and offset address is sometimes written as 1000:2000.
• a segment address of 1000H; an offset of 2000H
DEFAULT SEGMENT AND OFFSET REGISTERS
The microprocessor has rules that apply to segments whenever memory is
addressed. these define the segment and offset register combination
 The code segment register defines the start of the code segment.
The instruction pointer locates the next instruction within the code
segment.
This combination (CS:IP or CS:EIP) locates the next instruction executed by
the microprocessor.
stack data are referenced through the stack segment at the memory
location addressed by either the stack pointer (SP/ESP) or the base
pointer (BP/EBP)
These combinations are referred to as SS:SP (SS:ESP), or SS:BP
(SS:EBP).
FIGURE 2–4 A MEMORY SYSTEM SHOWING THE PLACEMENT OF FOUR MEMORY SEGMENTS.

– A memory segment can touch or

even overlap if 64K bytes of
memory are not required for a
segment.
– think of segments as Windows
that can be moved over any
area of memory to access data
or code
– a program can have more than
four or six segments,
• but can only access four or six
segments at a time
FIGURE 2–5 AN APPLICATION PROGRAM CONTAINING A CODE, DATA, AND STACK SEGMENT
LOADED INTO MEMORY.
– Suppose that an application
program requires 1000H
bytes of memory for its code,
190H bytes of memory for
its data, and 200H bytes for
its stack. This application
does not require an extra
segment.
– The segments show an
overlap because the amount
of data in them does not
require 64K bytes of
memory.
 SEGMENT AND OFFSET ADDRESSING SCHEME ALLOWS RELOCATION

Segment plus offset addressing allows DOS programs to be relocated in memory.

 A relocatable program is one that can be placed into any area of memory
and executed without change.
 Relocatable data are data that can be placed in any area of memory and
used without any change to the program
Because memory is addressed within a segment by an offset address, the
memory segment can be moved to any place in the memory system without
changing any of the offset addresses.
Only the contents of the segment register must be changed to address the
program in the new area of memory.