CSC 197 All Lectures
CSC 197 All Lectures
CSC 197 All Lectures
Lecture 1: orientation
Lecture 2:
Assembly Language:
• Assembly Language is a low-level programming language. It helps in understanding the programming language to
machine code.
• Assembly language is directly influenced by the instruction set and architecture of the processor
• The assembly language code must be processed by a program in order to generate the machine language code.
• Assembler is the program that translates assembly language code into the machine language.
• Here are some Assembly language of Pentium Processor examples:
• inc result
• mov class_size, 45
• and mask1, 128
• add marks, 10
• The first instruction increments the variable result. This assembly language instruction is equivalent to result++;
• The second instruction initializes class_size to 45. The equivalent statement in C is class_size = 45;
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• The third instruction performs the bitwise and operation on mask1 and can be expressed in C as
mask1 = mask1 & 128;
• The last instruction updates marks by adding 10. This is equivalent to
marks = marks + 10;
• In contrast, the MIPS instructions use three addresses as shown below:
• andi $t2,$t1,15
• addu $t3,$t1,$t2
• move $t2,$t1
• The operands in these instructions are in processor registers. The processor registers t1, t2, and t3 are identified by $.
• The andi instruction performs bitwise and of t1 contents with 15 and writes the result in t2.
• The second instruction adds contents of t1 and t2 and stores the result in t3.
• The last instruction copies the t1 value into t2.
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Advantages of High-Level Languages
• Program development is faster
• Programs written in a high-level language are relatively small
• These programs are also easier to code and debug
• Programs are easier to maintain.
• easier to understand and when good programming practices are followed easier to maintain
• Programs are portable.
• can be used with little or no modification on different computer systems
Advantages of assembly language
• 1. It allows complex jobs to run in a simpler way.
• 2. It is memory efficient, as it requires less memory
• 3. It is faster in speed, as its execution time is less.
• 4. It is mainly hardware oriented.
• 5. It requires less instruction to get the result.
• 6. It is used for critical jobs i.e. time-critical jobs
• 7. It is not required to keep track of memory locations.
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• 8. It is a low-level embedded system
Advantages of assembly language
• Having an understanding of assembly language makes one aware of −
• How programs interface with OS, processor, and BIOS;
• How data is represented in memory and other external devices;
• How the processor accesses and executes instruction;
• How instructions access and process data;
• How a program accesses external devices.
disadvantages of assembly language
• It takes a lot of time and effort to write the code for the same.
• The syntax is difficult to remember
• It has a lack of portability between different computers
Lecture 3:
Why Program in the Assembly Language?
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• Assembly language programming is referred to as low-level programming
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• Programming in the assembly language also requires knowledge about system internal details such as the processor
architecture, memory organization etc.
• Machine language in Level 2 is a close relative of the assembly language
• The processor understands only the machine language, whose instructions consist of strings of 1’s and 0’s.
• Our operating system hides several of the low-level details so that the assembly language programmer can work easily
• System hardware, which consists of digital logic circuits and the associated support electronics execute the machine
language instructions.
Overview of Computer Systems
• A user’s view of a computer system depends on the degree of abstraction provided by the underlying software.
• At the highest level 5, the user interaction is limited to the interface
• At the level 4, problem solving is done in one of the high-level languages such as C and Java
• Both levels 4 and 5 are system-independent, i.e., independent of a particular processor used in the system
• By contrast, software development done at all levels below level 4 is system-dependent.
CISC PROCESSOR
• CISC means Complex Instruction Set Computers
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• CISC is a type of processor where single instructions can execute several low-level operations (such as a load from
memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes
within single instructions. This makes the CISC instructions short but ‘complex’.
• CISC processors were helpful in simplifying the code and making it shorter in order to reduce the memory requirement.
• Microprocessors and microcontrollers that have CISC architecture includes Motorola 6800, 6809 and 68000-families;
the Intel 8080, and x86-family; Intel 8051-family.
• Advantages:
• The code size is comparatively shorter which minimizes the memory requirement.
• Execution of a single instruction accomplishes several low-level tasks.
• Complex addressing mode makes the memory access flexible.
• CISC instruction can directly access memory locations.
• Disadvantages:
• Though the code size is minimized but it requires several clock cycles to execute a single instruction. Thereby
reduce the overall performance of the computer.
• Implementing pipelining for CISC instruction is a bit complicated.
• The hardware structure needs to be more complex to simplify software implementation.
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• Designed to minimize the memory requirement when memory was smaller and costlier. But today the scenario
has changed nowadays memory is inexpensive and mostly all computers have a large amount of memory.
RISC PROCESSOR:
• RISC means Reduced Instruction Set Computers
• RISC is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a
more specialized set of instructions.
• RISC systems assume that the required operands are in the processor’s registers, not in the main memory
• RISC designs use uniform instruction length for almost all instructions, and employ strictly separate load/store-
instructions.
• The many varieties of RISC designs include MIPS, SPARC, IBM POWER instruction set, Alpha, RISC-V, ARM architecture,
ARC.
• RISC processors are also used in supercomputers, Unix workstation, embedded processors in laser printers, routers and
similar products
• The use of ARM architecture processors in smartphones and tablet computers such as the iPad and Android devices
provided a wide user base for RISC-based systems.
• Advantages of RISC Processor
• RISC instructions are simpler and fewer machine instruction.
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• RISC instructions are hardwired to fasten the execution.
• RISC instruction has simple addressing modes.
• RISC instruction executes faster because most of instruction operates on processor register and there is no need
to access memory for each instruction.
• RISC instructions execute one instruction per clock cycle.
• Disadvantages of RISC Processor
• RISC instruction size is reduced but more instructions are required to perform an operation when compared with
CISC.
• The machine instructions are hardwired in RISC so, it would cost if any instruction needs modification.
• It finds is difficulty in processing complex instruction and complex addressing mode.
• RISC instructions do not allow direct memory to memory transfer, it requires Load and Store instructions to do so.
Cisc vs risc
CISC RISC
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Memory-to-memory: "LOAD" and "STORE" Register to register: "LOAD" and "STORE
incorporated in instructions are independent instructions
Small code sizes, high cycles per second Low cycles per second, large code sizes
Transistors used for storing complex instructions Spends more transistors on memory reg
The machine language instructions of CISC processors RISC processors use fixed-length machin
vary in length
language instructions
Programming Language
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⚫Machine language
⚫Bit strings
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Programming Language (1)
⚫Assembly language
⚫Assembler
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Assembly language program
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Lecture 4:
Representation of Numbers and Characters
Learning Outcomes
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⚫ Hexadecimal number system
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⚫ Hexadecimal Number System
⚫ 16 bits are needed to represent the contents of a memory word in an 8086-based computer.
⚫ Assembly language programs tend to use both binary, decimal, and a third number system
⚫ Hexadecimal
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⚫ Conversion between binary and hex is easy
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Conversion Between Number systems
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⚫ Similarly, the binary number 11101 may be written as
⚫ Multiply the first hex digit by 16, and add the second hex digit.
⚫ Multiply that result by 16, and add the third hex digit.
⚫ Multiply the result by 16, add the next hex digit, and so on.
Exercises
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⚫ Convert 2BD4h to decimal.
⚫ Convert 95 to binary.
⚫ To convert a hex number to binary, we need only express each hex digit in binary.
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⚫ Binary to hex, just reverse this process; that is, group the binary digits in fours starting from the right.
⚫ Addition
To compute Bh + 9h, for example, just intersect the row containing Bh and the column containing 9h, and read 14h.
Hexadecimal Addition Table
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Addition and Subtraction
⚫ Subtraction
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⚫ Let's begin with the decimal subtraction
Unsigned Integers
⚫ The largest unsigned integer that can be stored in a byte is 11111111 = FFh = 255.
⚫ The biggest unsigned integer a 16 bit word can hold is 1111111111111111 = FFFFh =65535.
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Signed Integers
⚫ Negative integers are stored in a computer in a special way known as two's complement.
⚫ One's Complement
⚫ an integer is obtained by complementing each bit; that is, replace each 0 by a 1 and each 1 by a 0.
⚫ 5 = 0000000000000101
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⚫ Find the one's complement of 18.
⚫ Two's Complement
⚫ To get the two's complement of an integer, just add 1 to its one's complement.
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Character Representation
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⚫ the video monitor and printer are character oriented
⚫ ASCII code
⚫ This system uses seven bits to code each character, so there are a total of 2 7= 128 ASCII codes.
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Lecture 5:
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Basic Computer Organization
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• Processing units (processors)
• Executes instructions in a program
• A processor has an architecture that determines the form and sequence of instructions
• A processor has an organization that explains how circuits are organized
• Memory
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• The storage area in which programs are kept when they are running and that contains the data needed by the
running programs
• The architecture of a memory defines the methods by which data may be taken from and placed in the memory
• Structure of the elements that the memory hold
• The organization of a memory defines it’s physical structure , the physical layout of data elements into memory
units
• Input/output (I/O)
• The I/O architecture defines the form and conventions that must be used in a program in order to move elements
between I/O devices and memory
• The I/O organization defines structure of an I/O subsystems, how functions are distributed between the
elements, the various speeds of different elements
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• The main three components are interconnected by a system bus.
• The term “bus” is used to represent a group of electrical signals or the wires that carry these signals
• the three major components of the system bus are the address bus, data bus, and control bus.
• The control bus consists of a set of control signals include memory read, memory write, I/O read, I/O write, interrupt,
interrupt acknowledge, bus request, and bus grant.
The Processor
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• Decoding involves identifying the instruction that has been fetched from the memory. To facilitate the decoding
process, machine language instructions follow a particular instruction encoding scheme.
• To execute an instruction, the processor contains hardware consisting of control circuitry and an arithmetic and logic
unit (ALU). The ALU is mainly responsible for performing arithmetic operations (such as add, divide) and logical
operations (such as and, or) on data.
Number of Addresses:
• Most operations can be divided into binary or unary operations
• Binary operations such as addition and multiplication require two input operands whereas the unary operations such as
the logical NOT need only a single operand
• The division operation produces two outputs: a quotient and a remainder
• We need a total of three addresses: two addresses to specify the two input operands and one to specify where the
result should go.
• Most processors use either two or three addresses
• Three-Address Machines
• A=B+C*D-E+F+A
is converted to the following code:
mult T,C,D ; T = C*D
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add T,T,B ; T = B + C*D
sub T,T,E ; T = B + C*D - E
add T,T,F ; T = B + C*D - E + F
add A,A,T ; A = B + C*D - E + F + A
• Two-Address Machines
• A=B+C*D-E+F+A
load T,C ;T=C
mult T,D ; T = C*D
add T,B ; T = B + C*D
sub T,E ; T = B + C*D - E
add T,F ; T = B + C*D - E + F
add A,T ; A = B + C*D - E + F + A
• One-Address Machines
• In accumulator machines, most operations are performed on the contents of the accumulator and the operand
supplied by the instruction.
• Thus, instructions for these machines need to specify only the address of a single operand.
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• There is no need to store the result in memory
• Zero-Address Machines
• the locations of both operands are assumed to be at a default location.
• These machines use the stack as the source of the input operands and the result goes back into the stack
• Stack is a LIFO (last-in–first-out) data structure that all processors support
• All operations on this type of machine assume that the required input operands are the top two values on the
stack.
• The result of the operation is placed on top of the stack
• The Load/Store Architecture
• instructions operate on values stored in internal processor registers.
• Only load and store instructions move data between the registers and memory
• X=B+C*D-E+F+A
is converted to the following code:
• load R1,B ; load B
• load R2,C ; load C
• load R3,D ; load D
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• load R4,E ; load E
• load R5,F ; load F
• load R6,A ; load A
⚫ Family consists of the IBM PC, PC XT, PC AT, PS/l, and PS/2 models.
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⚫ Based on the Intel 8086 family
⚫ Includes the 8086, 8088, 80186, 80188, 80286, 80386, 80386SX, 80486, and 80486SX.
⚫ Family consists of the IBM PC, PC XT, PC AT, PS/l, and PS/2 models.
⚫ Includes the 8086, 8088, 80186, 80188, 80286, 80386, 80386SX, 80486, and 80486SX.
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Contents
LearningOutcomes 54
AssemblyLanguageSyntax 56
AssemblyLanguageSyntax(4) 62
AssemblyLanguageSyntax(5) 64
ProgramData(2) 72
Variables(3) 78
Variables(4) 80
AFewBasicInstructions 82
AFewBasicInstructions(4) 88
AFewBasicInstructions(7) 100
ProgramStructure(3) 112
DisplayingaString(2) 136
Lecture 6:
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Processor Registers
Data Registers: AX, BX, CX,DX
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⚫ Available to the programmer for general data manipulation.
⚫ Instruction is faster (requires fewer clock cycles) if the data are stored in registers.
⚫ Modern processors
⚫ High and low bytes of the data registers can be accessed separately.
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• Processors have a number of registers to hold data, instructions, and state information
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• We can divide the registers into general-purpose or special-purpose registers.
• Special-purpose registers can be further divided into those that are accessible to the user programs and those reserved
for the system use.
• RISC processors typically have a large number of registers.
Lecture 7:
Lecture 9:
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LearningOutcomes
⚫ Learnaboutessentialstepsincreating,assembling,andexe
cutinganassemblylanguageprogram.
⚫ Toknowthesyntax,whichforassemblylanguage.
⚫ variablesdeclaration.
⚫ Basicdatamovementandarithmeticinstructions.
⚫ Toexploretheprogramorganization.
⚫ code,data,andthestack,justlikeamachinelanguage
program.
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2
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AssemblyLanguageSyntax
⚫ Generally,notcasesensitive,butuseupper caseto
differentiatecodefromtherestof thetext.
⚫ Eachstatementiseitheraninstructionoranassembler directive
⚫ theassemblertranslatesintomachinecode.
⚫ instructs the assembler to perform some specific
task,suchasallocatingmemoryspaceforavariable.
⚫ Bothinstructionsanddirectiveshaveuptofourfields:
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AssemblyLanguageSyntax(2)
⚫ An exampleofaninstructionis:
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4
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AssemblyLanguageSyntax(3)
Anexampleofanassemblerdirectiveis
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Directivecreates
aproc
edurecalled
MAIN
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AssemblyLanguageSyntax(4)
⚫ NameField
⚫ Use for instruction labels, procedure names, and
variable names.
⚫ Translatesnamesintomemoryaddresses.
⚫ 1to 31 characters long and may consist of letters, digits, and
thespecialcharacters ? . @ _ $ %.
⚫ Ifaperiodisused,itmustbethefirstcharacter.
⚫ Notbeginwithadigit.
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AssemblyLanguageSyntax(5)
⚫ Examplesoflegalnames
COUNTER1
?character
SUM_OF_DIGITS
$1000
DONE?
.TEST
⚫ Examplesofillegalnames
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7
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AssemblyLanguageSyntax(6)
OperationField
⚫ Containsasymbolicoperationcode(opcode).
⚫ Oftendescribetheoperation'sfunction;forexample,MOV,
ADD, SUB.
⚫ Theoperationfieldcontainsapseudo-operationcode (pseudo-
op).
⚫ Nottranslatedintomachinecode.
⚫ PROCpseudo-opisusedtocreateaprocedure.
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8
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AssemblyLanguageSyntax(7)
OperandField
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ProgramData
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Number Type
11011 decimal
11011B binary
64223 decimal
-21843D decimal
1,234 illegal-containsanondig1tcharacter
1B4BH hex
1B4D illegalhexnumberdoesn'tendin"H"
FFFFH illegal hex number-doesn't begin with adecimal digit
0FFFFH hex
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ProgramDat ⚫ Characters
⚫ must be enclosed
in single
or example, "A"
or 'hello'.
a(2)
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quotes: for
⚫ translatedintotheirASCIIcodesbytheassembler.
⚫ nodifferencebetweenusing"A"and41hinaprogram.
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es Variabl
⚫ Eachvariablehasadatatypeandisassignedamemory address
by the program.
⚫ Data-defining pseudo-ops and their meanings as
below:
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2) Variables(
ByteVariables
Uninitialized
WordVariables
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Variables(3)
⚫ Arrays
⚫ asequenceofmemorybytesorwords.
B_ARRAYisassociatedwiththefirstofthesebytes
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Variables(4)
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AFewBasicInstructions
⚫ Morethan100instructionsets
⚫ Therearesomemoreinstructionsformoreadvanced
processors.
⚫ Onlysixofthemostusefulinstructionstransferring data
and doing arithmetic.
⚫ Useseitherwordorbyteoperands.
⚫ MOVandXCHG
⚫ Use to transfer data betweenregisters, between a register and
a memory location, or to movea number
directlyintoaregisterormemorylocation.
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AFewBasicInstructions(2)
⚫ Thesyntax is:
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⚫ MOVAX,BX
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AFewBasicInstructions(3)
⚫ LegalCombinationsofOperandsforMOV
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AFewBasicInstructions(4)
⚫ XCHGoperationisusedtoexchangethecontentsoftwo
registersoraregisterandamemorylocation.
⚫ Thesyntaxis:
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AFewBasicInstructions(5)
LegalCombinationsofOperandsforXCHG
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RestrictionsonMOVandXCHG
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AFewBasicInstructions(6)
⚫ ADD,SUB, INC,andDEC
⚫ ADDandSUBinstructionsareusedtoaddorsubtract
⚫ Contentsoftworegisters,
⚫ Aregisterandamemorylocation,or
⚫ To add(subtract)a number to (from)a register or memorylocation.
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AFewBasicInstructions(6)
⚫ SUBAX, DX
⚫ INCis used toadd1 to the contents of a register or memory
location and DEC subtracts 1 from a registeror memory
location.
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AFewBasicInstructions(6)
⚫ Thesyntaxis
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AFewBasicInstructions(7)
⚫ NEGisusedtonegatethecontentsofthedestination.
NEGBX
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TranslationofHighlevelLanguage
to OnlyMOV,ADD,SUB,INC,DEC,andNEGareused
Assembly Language
totranslateassemblylanguage.
⚫ Notethat,adirectmemory-memorymoveisillegal.
⚫ ThecontentsofAintoaregisterbeforemovingittoB.
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TranslationofHighlevelLanguage
to Forinstance,statement,A=5–A
Assembly Language (2)
MO AX,5 ;Keep5inAX
V
SUB AX,A ;AX=5-A
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MO A,AX ;keepA=AX
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TranslationofHighlevelLanguage
toAssemblyLanguage(3)
Example shows how to do multiplication by a
constant.
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e ProgramStructur
⚫ Thecode,data,andstackare structuredas program segments.
⚫ Programsegmentistranslatedintoamemorysegment by
theassembler.
⚫ MicrosoftMacroAssembler(MASM).
⚫ MemoryModels
⚫ Sizeofcodeanddataaprogramcanhaveisdetermined
byspecifyingamemorymodel(.Modeldirective)
⚫ FrequentlyusedmemorymodelsareSMALL,MEDIUM,
COMPACT,andLARGE.
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) ProgramStructure(2
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ProgramStructure(3)
⚫ Datasegmentcontainsallthevariabledefinition.
⚫ .DATA
⚫ Stack segmentdeclaration is to set aside a block
ofmemory(thestackarea) tostorethestack.
⚫ .STACK size
⚫ Code segment contains a program's instructions. The
declarationsyntaxis:
⚫ .CODE name
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Lecture 10:
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) ProgramStructure(4
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InputandOutputInstructions
Therearetwoinstructions,INandOUT,thataccess
theportsdirectly.
⚫ Usewhen fast I/O essential; forexample, inagame
program.
⚫ theBasicInput/OutputSystem(BIOS)routinesandthe
DOSrou
tines.
TheINTInstruction
⚫ ToinvokeaDOSorBIOSroutine
⚫ INTinterrupt_number
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InputandOutputInstructions(2)
⚫ INT21h
⚫ InvokealargenumberofDOSfunctions
⚫ Function is requested by placing a function number in
theAH registerand invoking INT 21h
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InputandOutputInstructions(3)
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InputandOutputInstructions(4)
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m FirstProgra
⚫ The first program will reada character from the
keyboardanddisplay itat the beginning of thenext line.
⚫ startbydisplayinga questionmark:
⚫ Nextreadacharacter:
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) FirstProgram(2
⚫ todisplaythecharacteronthenextline,thecharacter
mustbesavedinanotherregister.
⚫ tomovethecursortothebeginningofthenextline,
executeacarriagereturnand linefeed.
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CreatingandRunningaProgram
1. Useatexteditororwordprocessortocreateasource program
file.
2. Useanassemblertocreateamachinelanguage object file.
3. UsetheLINKprogram(seedescriptionlater)tolink
oneormoreobjectfilestocreatearunfile.
4. Executetherunfile.
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ProgrammingSteps
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DisplayingInputCharacteratthe
Beginning of the Next Line
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g DisplayingaStrin
⚫ INT 21h function that can be used to display a
character string:
MSG DB‘Hello!$’
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DisplayingaString(2)
⚫ TheLEAInstruction
⚫ Puts a copy of the source offset address into the
destination.
⚫ LEAdestination,source
⚫ LEADXMSG
⚫ OffsetaddressofthevariableMSGintoDX
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DisplayingaString(3)
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ACaseConversionProgram
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Lecture 11:
Data Allocation for RISC:
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Immediate Addressing Mode
• In this addressing mode, data are specified as part of the instruction
itself. As a result, even though the data are in memory, it is located in the
code segment, not in the data segment.
mov AL, 75
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• In this case, this mode can only specify the source operand. In addition,
the immediate data are always a constant
Direct Addressing Mode
• Operands specified in a memory-addressing mode require access to the
main memory, usually to the data segment.
• In the direct addressing mode, the offset value is specified directly as part
of the instruction. In an assembly language program, this value is usually
indicated by the variable name of the data item.
• The assembler will translate this name into its associated offset value
during the assembly process. To facilitate this translation, the assembler
maintains a symbol table.
Indirect Addressing Mode
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• In this addressing mode, the offset or effective address of the data is in
one of the general registers. For this reason, this addressing mode is
sometimes referred to as the register indirect addressing mode.
• The indirect addressing mode is not required for variables having only a
single element. But for variables like table1 containing several elements.
• the starting address of the data structure can be loaded into a register
and then the register acts as a pointer to an element in table1. By
manipulating the contents of the register, we can access different
elements of table1.
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Lecture 12:
The stack
What Is a Stack?
• Conceptually, a stack is a last-in–first-out (LIFO) data structure.
• There are two operations associated with a stack: insertion and deletion.
• insert and delete operations are referred to as push and pop operations,
respectively.
• When the numbers are deleted from the stack, the numbers will come
out in the reverse order of insertion.
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Pentium Implementation of the Stack
• The memory space reserved in the stack segment is used to implement
the stack. The registers SS and ESP are used to implement the Pentium
stack
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• The SS register pointing to the beginning of the stack segment, and the
ESP register giving the offset value of the last item inserted.
• Only words (i.e., 16-bit data) or doublewords (i.e., 32-bit data) are saved
on the stack, never a single byte.
• The stack grows toward lower memory addresses
• Top-of-stack (TOS) always points to the last data item placed on the
stack. TOS always points to the lower byte of the last word inserted into
the stack.
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Pentium Implementation of the Stack
• Figure 5.3a shows an empty stack TOS points to the byte just outside the
reserved stack area. It is an error to read from an empty stack as this
causes Stack underflow.
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• The stack full condition is indicated by the zero offset value (i.e., ESP = 0).
• If we try to insert a data item into a full stack, stack overflow occurs
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Lecture 13
Stack Operations
• The Pentium allows the push and pop operations on word or doubleword
data items. The syntax is
push source
pop destination
• The operand of these two instructions can be a 16- or 32-bit general-
purpose register, segment register, or a word or doubleword in memory.
• In addition, source for the push instruction can be an immediate operand
of size 16, or 32 bits.
Uses of the Stack
• Temporary Storage of Data
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• The stack can be used as a scratchpad to store data on a temporary
basis.
• The code requires more memory operations. However, due to the
limited number of general-purpose registers, finding spare registers
that can be used for temporary storage is nearly impossible in
almost all programs.
• An elegant way of exchanging the two values is
push value1
push value2
pop value1
pop value2
• Transfer of Control
• The stack is also used by some instructions to store data
temporarily. In particular, when a procedure is called, the return
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address of the instruction is stored on the stack so that the control
can be transferred back to the calling program
• Parameter Passing
• Act as a medium to pass parameters to the called procedure.
Lesson 16
In this addressing mode, processor’s internal registers contain the data to be manipulated by the
instruction.
In this example, the mov instruction is operating on 32-bit data. However, it can also work on 16- and 8-bit
data, as shown below:
mov BX, CX
mov AL, CL
Register-addressing mode is the most efficient way of specifying data because the data are within the
processor and, therefore, no memory access is required.
In this addressing mode, data are specified as part of the instruction itself. As a result, even though the data are
in memory, it is located in the code segment, not in the data segment. This addressing mode is typically used
in instructions that require at least two data items to manipulate. In this case, this mode can only specify the
source operand.
In addition, the immediate data are always a constant, given either directly or via the EQU directive.
mov AL,75
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the source operand 75 is specified in the immediate addressing mode and the destination operand is specified
in the register-addressing mode. Such instructions are said to use mixed mode addressing.
The remainder of the addressing modes we discuss here deal with operands that are located in the data
segment. These are called the memory addressing modes. We discuss two memory addressing modes here:
direct and indirect.
Operands specified in a memory-addressing mode require access to the main memory, usually to the data
segment. As a result, they tend to be slower than either of the two previous addressing modes.
Recall that to locate a data item in the data segment, we need two components: the segment start address and
an offset value within the segment. The start address of the segment is typically found in the DS register.
The offset value is often called the effective address. In the direct addressing mode, the offset value is
specified directly as part of the instruction.
In an assembly language program, this value is usually indicated by the variable name of the data item. The
assembler will translate this name into its associated offset value during the assembly process. To facilitate
this translation, the assembler maintains a symbol table. The symbol table stores the offset values of all
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variables in the assembly language program. This addressing mode is the simplest of all the memory-
addressing modes.
A restriction associated with the memory-addressing modes is that these can be used to specify only one
operand. The examples that follow assume the following data definition statements in the program.
In NASM, we write
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mov EBX, table1
If we want the value, we should use [ ] as in the previous examples. For example, the statement
mov EBX,[table1]
The direct addressing mode can be used in a straightforward way but is limited to accessing simple variables.
For example, it is not useful in accessing the second element of table1 as in the following C statement:
table1[1] = 99
The indirect addressing mode remedies this deficiency. In this addressing mode, the offset or effective address
of the data is in one of the general registers. For this reason, this addressing mode is sometimes referred to as
the register indirect addressing mode.
The indirect addressing mode is not required for variables having only a single element (e.g., response). But
for variables like table1 containing several elements, the starting address of the data structure can be loaded
into, say, the EBX register and then EBX acts as a pointer to an element in table1.
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By manipulating the contents of the EBX register, we can access different elements of table1. The following
code assigns 100 to the first element and 99 to the second element of table1. Note that EBX is incremented by
4 because each element of table1 requires four bytes.
● Arrays
Arrays are useful in organizing a collection of related data items, such as test marks of a class, salaries of
employees, and so on. We have used arrays of characters to represent strings. Such arrays are one-
dimensional: only a single subscript is necessary to access a character in the array.
● One-dimensional Arrays
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In C, the subscript always starts at zero. Thus, the mark of the first student is given by test_marks[0] and that
of the last student by test_marks[9].
From this information, the amount of storage space required for the array can be easily calculated. Storage
space in bytes is given by
In our example, it is equal to 10 * 4 = 40 bytes. In assembly language, arrays are implemented by allocating
the required amount of storage space.
To access an element we need to know its displacement value in bytes relative to the beginning of the array.
Since we know the element size in bytes, it is rather straightforward to compute the displacement from the
subscript value:
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displacement = subscript * element size in bytes
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Each element of the test_marks array, declared on line 9, requires four bytes. The array size NO_STUDENTS
is computed on line 10 using the predefined location counter symbol $. The symbol $ is always set to the
current offset in the segment. Thus, on line 10, $ points to the byte after the array storage space. Therefore, ($-
test_marks) gives the storage space in bytes, and dividing this value by four gives the number of elements in
the array. The indexed addressing mode with a scale factor of four is used on lines 19 and 22. Remember that
the scale factor is only allowed in the 32-bit mode. As a result, we have to use ESI rather than the SI register.
Lesson 17
In assembly language, status flags are special bits set by the CPU after arithmetic or logical operations.
Common status flags include:
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Examples:
The Auxiliary Carry Flag (AC) is set when there is a carry or borrow from the lower nibble (4 bits) to the
higher nibble in an operation. It is mainly used in Binary-Coded Decimal (BCD) arithmetic operations.
Example:
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○ Result = 0x10 (16 in decimal), carry from the 4th bit, so the AC flag is set.
The Parity Flag (P) is used to indicate whether the number of 1-bits in the result of an operation is even or
odd. It helps with error detection in data transmission.
Example:
● Result = 0x05 (00000101 in binary): There are two 1-bits (even), so Parity Flag is set (P = 1).
● Result = 0x03 (00000011 in binary): There are two 1-bits (even), so P = 1.
Parity flags are mainly useful in communication systems for simple error detection.
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Compare Instruction
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Lesson 18
Multiplication Instructions
Multiplication is more complicated than the addition and subtraction operations for two reasons:
1. First, multiplication produces double-length results. That is, multiplying two n-bit values produces a 2n-bit
result. To see that this is indeed the case, consider multiplying two 8-bit numbers. Assuming unsigned
representation, FFH (255D) is the maximum number that the source operands can take. Thus, the
multiplication produces the maximum result, as shown below:
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Similarly, multiplication of two 16-bit numbers requires 32 bits to store the result, and two 32-bit numbers
requires 64 bits for the result.
2. Second, unlike the addition and subtraction operations, multiplication of signed numbers should be treated
differently from that of unsigned numbers. This is because the resulting bit pattern depends on the type of
input, as illustrated by the following example:
We have just seen that treating FFH as the unsigned number results in multiplying 255D × 255D.
Now, what if FFH represents a signed number? In this case, FFH represents −1D and
the result should be 1, as shown below:
As you can see, the resulting bit patterns are different for the two cases.
Thus, the instruction set provides two multiplication instructions: one for unsigned numbers and the other for
signed numbers. We first discuss the unsigned multiplication instruction, which has the format
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mul source
The source operand can be in a general-purpose register or in memory. Immediate operand specification is not
allowed. Thus,
mul 10 ; invalid
is an invalid instruction. The mul instruction works on 8-, 16-, and 32-bit unsigned numbers. But, where is the
second operand? The instruction assumes that it is in the accumulator register. If the source operand is a byte,
it is multiplied by the contents of the AL register. The 16-bit result is placed in the AX register as shown
below:
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For example, the code
mov AL,10
mov DL,25
mul DL
clears both the carry and overflow flags as the result is 250, which can be stored in the AL register; in this
case, the AH register contains 00000000. On the other hand, executing
mov AL,10
mov DL,26
mul DL
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sets the carry and overflow flags, indicating that the result is more than 255. For signed
numbers, we have to use the imul (integer multiplication) instruction, which has the
same format1 as the mul instruction imul source The behavior of the imul instruction is
similar to that of the mul instruction. The only difference to note is that the carry and
overflow flags are set if the upper half of the result is not the sign extension of the
lower half. To understand sign extension in signed numbers, consider the following
example. We know that −66 is represented using 8 bits as
10111110.
Now, suppose that we can use 16 bits to represent the same number. Using 16 bits,
−66 is represented as
1111111110111110.
● Division Instructions
The division operation is even more complicated than multiplication for two reasons:
2. In multiplication, by using double-length registers, overflow never occurs. In division, divide overflow is a
real possibility.
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. As with the multiplication, two versions are provided to work on unsigned and signed numbers.
The source operand specified in the instruction is used as the divisor. As with the multiplication instruction,
both division instructions can work on 8-, 16-, or 32-bit numbers. All six status flags are affected and are
undefined. None of the flags is updated. We first consider the unsigned version. If the source operand is a
byte, the dividend is assumed to be in the AX register and 16 bits long. After division, the quotient is returned
in the AL register and the remainder in the AH register as shown below:
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Lesson 19
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Lesson 20
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Lesson 21
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Large Register Set
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The eight general-purpose registers in the Intel 32-bit processors are a limiting factor in providing such
support. Itanium, which is the Intel’s 64-bit processor, provides a large register set (128 registers), and most
procedure calls on Itanium can completely avoid accessing memory.
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The best way to understand RISC is to treat it as a concept to design processors. While initial RISC processors had
fewer instructions compared to their CISC counterparts, the new generation of RISC processors have hundreds of
instructions, some of which are as complex as the CISC instructions. It could be argued that such systems are really
hybrids of CISC and RISC. In any case, there are certain principles most RISC designs follow. We identify the
important ones in this section. Note that some of these characteristics are intertwined. For example, designing an
instruction set in which each instruction execution takes only one clock cycle demands register-based operands, which
in turn suggests that we need a large number of registers.
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Lesson 22
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Memory Usage
MIPS uses a conventional memory layout. A program’s address space consists of three parts: code, data, and stack. The
memory layout of these three components is shown in Figure 12.3. The text segment, which stores the instructions, is
placed at the bottom of the user address space (at 4000000H). The data segment is placed above the text segment and
starts at 10000000H. The data segment is divided into static and dynamic areas. The dynamic area grows as memory is
allocated to dynamic data structures. The stack segment is placed at the end of the user address space at 7FFFFFFFH. It
grows downward toward lower memory address. This placement of segments allows sharing of unused memory by
both data and stack segments.
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