Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
0% found this document useful (0 votes)
4 views22 pages

DS6585C 01

Download as pdf or txt
Download as pdf or txt
Download as pdf or txt
You are on page 1/ 22

®

RT6585C

Dual-Channel Synchronous DC-DC Step-Down Controller


with 5V/3.3V LDOs
General Description Features
The RT6585C is a dual-channel step-down, controller  Support Connected Standby Mode for Ultrabook
generating supply voltages for battery-powered systems.  CCRCOT Control with 100ns Load Step Response
It includes two Pulse-Width Modulation (PWM) controllers  PWM Maximum Duty Ratio > 98%
adjustable from 2V to 5.5V, and two fixed 5V/3.3V linear  5V to 25V Input Voltage Range
regulators. Each linear regulator provides up to 100mA  Dual Adjustable Output :
output current and 3.3V linear regulator provides 1%  CH1 : 2V to 5.5V

accuracy under 35mA. The RT6585C provides a mode  CH2 : 2V to 4V

selection pin, SKIPSEL, to select Diode-Emulation Mode  5V/3.3V LDOs with 100mA Output Current
(DEM) or Audio Skipping Mode (ASM). Other features  1% Accuracy on 3.3V LDO Output
include on-board power-up sequencing, a power-good  Internal Frequency Setting
output, internal soft-start, and soft-discharge output that  500kHz/600kHz (CH1/CH2)

prevents negative voltage during shutdown.  Internal Soft-Start and Soft-Discharge


 4700ppm/°°C RDS(ON) Current Sensing
A constant current ripple PWM control scheme operates
 Independent Switcher Enable Control
without sense resistors and provides 100ns response to
 Built in OVP/UVP/OCP/OTP
load transient. For maximizing power efficiency, the
 Non-latch UVLO
RT6585C automatically switches to the diode-emulation
 Power Good Indicator
mode in light load applications. The RT6585C is available
 20-Lead WQFN Package
in the WQFN-20L 3x3 package.
 RoHS Compliant and Halogen Free

Simplified Application Circuit


VIN

VIN UGATE2
RT6585C
BOOT2
UGATE1
PHASE2 VOUT2
BOOT1
LGATE2
VOUT1 PHASE1

LGATE1 FB2
CS1

BYP1 CS2

LDO5 5V
FB1

Channel 1 Enable EN1


PGOOD PGOOD Indicator
Channel 2 Enable EN2
On LDO3 3.3V

Off
GND

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


1
RT6585C
Applications Pin Configuration
 Notebook and Sub-Notebook Computers (TOP VIEW)
 System Power Supplies

SKIPSEL

UGATE1
PHASE1
BOOT1
 3-Cell and 4-Cell Li+ Battery-Powered Devices

EN1
Ordering Information 20 19 18 17 16
CS1 1 15 LGATE1
RT6585C
FB1 2 14 BYP1
Package Type LDO3 3 GND 13 LDO5
FB2 4 21 12 VIN
QW : WQFN-20L 3x3 (W-Type)
CS2 5 11 LGATE2
Lead Plating System 6 7 8 9 10

G : Green (Halogen Free and Pb Free)

PGOOD
EN2

PHASE2
BOOT2
UGATE2
Note :
Richtek products are :
WQFN-20L 3x3
 RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020. Marking Information
 Suitable for use in SnPb or Pb-free soldering processes. RE= : Product Code
RE=YM YMDNN : Date Code
DNN

Functional Pin Description


Pin No. Pin Name Pin Function
Current limit setting. Connect a resistor to GND to set the threshold for channel 1
synchronous RDS(ON) sense. The GND  PHASE1 current limit threshold is 1/8th
1 CS1
the voltage seen at CS1 over a 0.2V to 2V range. There is an internal 50A
current source from LDO5 to CS1.
Feedback voltage input for channel 1. Connect FB1 to a resistive voltage divider
2 FB1
from VOUT1 to GND to adjust output from 2V to 5.5V.
3.3V linear regulator output. It is always on when VIN is higher than VINPOR
3 LDO3
threshold.
Feedback voltage input for channel 2. Connect FB2 to a resistive voltage divider
4 FB2
from VOUT2 to GND to adjust output from 2V to 4V.
Current limit setting. Connect a resistor to GND to set the threshold for channel 2
synchronous RDS(ON) sense. The GND  PHASE2 current limit threshold is 1/8th
5 CS2
the voltage seen at CS2 over a 0.2V to 2V range. There is an internal 50A
current source from LDO5 to CS2.
6 EN2 Enable control input for channel 2.
7 PGOOD Power good indicator output for channel 1 and channel 2. (Logical AND)
Switch node of channel 2 MOSFETs. PHASE2 is the internal lower supply rail for
8 PHASE2 the UGATE2 high-side gate driver. PHASE2 is also the current-sense input for the
channel 2.
Bootstrap supply for channel 2 high-side gate driver. Connect to an external
9 BOOT2
capacitor according to the typical application circuits.
High-side gate driver output for channel 2. UGATE2 swings between PHASE2
10 UGATE2
and BOOT2.
Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


2
RT6585C
Pin No. Pin Name Pin Function
Low-side gate driver output for channel 2. LGATE2 swings between GND and
11 LGATE2
LDO5.
12 VIN Power input for 5V and 3.3V LDO regulators and buck controllers.
5V linear regulator output. LDO5 is also the supply voltage for the low-side
13 LDO5
MOSFET and analog supply voltage for the device.
14 BYP1 Switch-over source voltage input for LDO5.
Low-side gate driver output for channel 1. LGATE1 swings between GND and
15 LGATE1
LDO5.
High-side gate driver output for channel 1. UGATE1 swings between PHASE1
16 UGATE1
and BOOT1.
Bootstrap supply for channel 1 high-side gate driver. Connect to an external
17 BOOT1
capacitor according to the typical application circuits.
Switch node of channel 1 MOSFETs. PHASE1 is the internal lower supply rail for
18 PHASE1 the UGATE1 high-side gate driver. PHASE1 is also the current sense input for the
Channel 1.
PWM operating mode selection.
19 SKIPSEL Diode-emulation mode : connect to LDO5
Audio skipping mode : short to GND
20 EN1 Enable control input for channel 1.
21 Ground. The exposed pad must be soldered to a large PCB and connected to
GND
(Exposed Pad) GND for maximum power dissipation.

Functional Block Diagram

BOOT1 BOOT2

UGATE1 UGATE2

PHASE1 PHASE2
LDO5 LDO5
Channel 1 Channel 2
Buck Buck
Controller Controller
LGATE1 LGATE2

FB1 FB2
CS1 CS2

PGOOD

GND
SKIPSEL
SW5 Threshold
BYP1 Power-On EN1
Sequence
Clear Fault Latch EN2

LDO5 REF LDO3 LDO3

LDO5 BYP1
VIN

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


3
RT6585C
Operation
The RT6585C includes two constant on-time synchronous current to the load exceeds the average output inductor
step-down controllers and two linear regulators. current, the output voltage falls and eventually crosses
the under-voltage protection threshold, inducing IC
Buck Controller shutdown.
In normal operation, the high-side N-MOSFET is turned
on when the output is lower than VREF, and is turned off Over-Voltage Protection (OVP) & Under-Voltage
after the internal one-shot timer expires. While the high- Protection (UVP)
side N-MOSFET is turned off, the low-side N-MOSFET is The two channel output voltages are continuously
turned on to conduct the inductor current until next cycle monitored for over-voltage and under-voltage conditions.
begins. When the output voltage exceeds over-voltage threshold
(113% of VOUT), UGATE goes low and LGATE is forced
Soft-Start high. When it is less than 52% of reference voltage, under-
For internal soft-start function, an internal current source voltage protection is triggered and then both UGATE and
charges an internal capacitor to build the soft-start ramp LGATE gate drivers are forced low. The controller is latched
voltage. The output voltage will track the internal ramp until ENx is reset or LDO5 is re-supplied.
voltage during soft-start interval.
LDO5 and LDO3
PGOOD When the VIN voltage exceeds the POR rising threshold,
The power good output is an open-drain architecture. When LDO3 and LDO5 will default turn-on. The linear regulator
the two channels soft-start are both finished, the PGOOD LDO5 and LDO3 provide 5V and 3.3V regulated output.
open-drain output will be high impedance.
Switching Over
Current Limit The BYP1 is connected to the Channel 1 output. After the
The current limit circuit employs a unique “valley” current Channel 1 output voltage exceeds the set threshold
sensing algorithm. If the magnitude of the current sense (4.66V), the output will be bypassed to the LDO5 output
signal at PHASE is above the current limit threshold, the to maximize the efficiency.
PWM is not allowed to initiate a new cycle. Thus, the

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


4
RT6585C
Absolute Maximum Ratings (Note 1)
 VIN to GND ---------------------------------------------------------------------------------------------------------------- −0.3V to 30V
 BOOTx to GND
DC --------------------------------------------------------------------------------------------------------------------------- −0.3V to 36V
<100ns --------------------------------------------------------------------------------------------------------------------- −5V to 42V
 BOOTx to PHASEx
DC --------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns --------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 PHASEx to GND
DC --------------------------------------------------------------------------------------------------------------------------- −5V to 30V
<100ns --------------------------------------------------------------------------------------------------------------------- −10V to 42V
 UGATEx to GND
DC --------------------------------------------------------------------------------------------------------------------------- −5V to 36V
<100ns --------------------------------------------------------------------------------------------------------------------- −10V to 42V
 UGATEx to PHASEx
DC --------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns --------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 LGATEx to GND
DC --------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
<100ns --------------------------------------------------------------------------------------------------------------------- −5V to 7.5V
 Other Pins ----------------------------------------------------------------------------------------------------------------- −0.3V to 6.5V
 Power Dissipation, PD @ TA = 25°C
WQFN-20L 3x3 ----------------------------------------------------------------------------------------------------------- 3.33W
 Package Thermal Resistance (Note 2)
WQFN-20L 3x3, θJA -----------------------------------------------------------------------------------------------------30°C/W
WQFN-20L 3x3, θJC -----------------------------------------------------------------------------------------------------7.5°C/W
 Junction Temperature ---------------------------------------------------------------------------------------------------150°C
 Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------260°C
 Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Model) -------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)


 Supply Voltage, VIN -----------------------------------------------------------------------------------------------------5V to 25V
 Junction Temperature Range ------------------------------------------------------------------------------------------ −40°C to 125°C

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


5
RT6585C
Electrical Characteristics
(VIN = 12V, VEN1 = VEN2 = 3.3V, VCS1 = VCS2 = 2V, No Load, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Input Supply
Rising threshold -- 4.6 4.9
VIN Power On Reset VIN_POR V
Falling threshold 3.2 3.7 --
VIN Standby Supply Both buck controllers off,
IVIN_SBY -- 35 55 A
Current VEN1 = VEN2 = GND
Both buck controllers on,
VIN Quiescent Current IVIN_nosw -- 15 25 A
VFBx = 2.05V, VBYP1 = 5.05V
Both buck controllers on,
BYP1 Supply Current IBYP1_nosw -- 120 180 A
VFBx = 2.05V, VBYP1 = 5.05V
Soft-Start
Soft-Start Time tSSx VOUT ramp-up time -- 0.9 -- ms
Buck Controllers Output and FB Voltage
FBx Valley Trip Voltage VFBx CCM operation 1.98 2 2.02 V
BYP1 Discharge Current IDCHG_BYP1 VBYP1 = 0.5V 10 45 -- mA
PHASEx Discharge
IDCHG_LX VPHASEx = 0.5V 5 8 -- mA
Current
Switching Frequency
VIN = 20V, VOUT1 = 5V 400 500 600
Switching Frequency f SWx kHz
VIN = 20V, VOUT2 = 3.33V 480 600 720
Minimum Off-Time tOFF(MIN) VFBx = 1.9V -- 200 275 ns
Current Sense
CSx Source Current ICSx VCSx = 1V 47 50 53 A
CSx Current Temperature
TCICSx In comparison with 25°C -- 4700 -- ppm/C
Coefficient
Zero-Current Threshold VZC VFBx = 2.05V, GND  PHASEx -- 1 -- mV
Internal Regulator
VIN = 12V, no load 4.9 5 5.1
VIN > 7V, ILDO5 < 100mA 4.8 5 5.1
LDO5 Output Voltage VLDO5 V
VIN > 5.5V, ILDO5 < 35mA 4.8 5 5.1
VIN > 5V, ILDO5 < 20mA 4.5 4.75 5.1
VIN = 12V, no load 3.267 3.3 3.333
VIN > 7V, ILDO3 < 100mA 3.217 3.3 3.383
LDO3 Output Voltage VLDO3 V
VIN > 5.5V, ILDO3 < 35mA 3.267 3.3 3.333
VIN > 5V, ILDO3 < 20mA 3.217 3.3 3.383

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


6
RT6585C
Parameter Symbol Test Conditions Min Typ Max Unit
VLDO5 = 4.5V, VBYP1 = GND,
LDO5 Output Current ILDO5 100 175 -- mA
VIN = 7.4V
LDO3 Output Current ILDO3 VLDO3 = 3V, VIN = 7.4V 100 175 -- mA
LDO5 Switch-over
VSWTH Rising edge at BYP1 regulation point -- 4.66 -- V
Threshold to BYP1
LDO5 Switch-over
RSW LDO5 to BYP1, 10mA -- 1.5 3 
Equivalent Resistance
SKIP Mode Selection
ASM operation -- -- 0.8 V
SKIPSEL Input Voltage VSKIPSEL
DEM operation 1.2 -- --
UVLO
Rising edge -- 4.3 4.6 V
LDO5 UVLO Threshold VUVLO5
Falling edge 3.7 3.9 4.1
LDO3 UVLO Threshold VUVLO3 Channel x off -- 2.5 -- V
Power Good
PGOOD detect, VFBx rising edge 84 88 92
PGOOD Threshold VPGxTH %
Hysteresis -- 8 --
PGOOD Leakage
High state, VPGOOD = 5.5V -- -- 1 A
Current
PGOOD Output Low
ISINK = 4mA -- -- 0.3 V
Voltage
Fault Detection
OVP Trip Threshold VOVP FBx with respect to internal reference 109 113 117 %
OVP Propagation Delay -- 1 -- s
UVP Trip Threshold VUVP UVP detect, FBx falling edge 47 52 57 %
UVP Shutdown Blanking
tSHDN_UVP From ENx enable -- 1.3 -- ms
Time
Thermal Shutdown
Thermal Shutdown
TSD -- 150 -- °C
Threshold
Logic Inputs
VENx_H SMPS on 1.6 -- --
ENx Threshold Voltage V
VENx_L SMPS off -- -- 0.4
Internal Boost Switch
Internal Boost Switch
RBST LDO5 to BOOTx -- 80 -- 
On-Resistance

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


7
RT6585C
Parameter Symbol Test Conditions Min Typ Max Unit
Power MOSFET Drivers
High state, VBOOTx  VUGATEx = 0.25V,
-- 3 --
VBOOTx  VPHASEx = 5V
UGATEx On-Resistance RUG 
Low state, VUGATEx  VPAHSEx = 0.25V,
-- 2 --
VBOOTx  VPHASEx = 5V
High state, VLDO5  VLGATEx = 0.25V,
-- 3 --
LGATEx On-Resistance RLG VLDO5 = 5V 
Low state, VLGATEx  GND = 0.25V -- 1 --
LGATEx rising -- 20 --
Dead-Time td ns
UGATEx rising -- 30 --

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-
thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the
exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precautions are recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


8
RT6585C
Typical Application Circuit
VIN
5.2V to 25V
R8
C1 0 RT6585C C13 C12
10µF 12 10 R10 0 Q2 10µF 10µF
VIN UGATE2 BSC0909
C10 NS
0.1µF 9 R9 0
BOOT2
Q1 R4 0 16 C11
BSC0909 UGATE1 L2
NS 0.1µF 2.2µH
R3 0 17 8 VOUT2
BOOT1 PHASE2
Q4 C17 3.3V
L1 C2 11
LGATE2 BSC0909 R11* 220µF
3.3µH 0.1µF NS
VOUT1 18
PHASE1 C14*
5V
C3 Q3 15
220µF R5* BSC0909 LGATE1 R14 C21*
NS 130k
C4* FB2 4
14 R15
BYP1
R12 C23 200k
C18* 0.1µF 13
150k LDO5 5V
2 C9
FB1
1µF
R13
100k PGOOD 7 PGOOD Indicator
DEM : 5V 19 3
SKIPSEL LDO3 3.3V Always On
ASM : GND
C16
1µF
20 R1
Channel 1 Enable EN1
1 16k
CS1
6
Channel 2 Enable EN2 R2
On 5 16k
CS2
Off

21 (Exposed Pad)
GND

* : Optional

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


9
RT6585C
Typical Operating Characteristics
VOUT1 Efficiency vs. Output Current VOUT2 Efficiency vs. Output Current
100 100
95
95 90
85
90 80
VIN = 7.4V
Efficiency (%)

Efficiency (%)
VIN = 7.4V
VIN = 11.1V 75
85 VIN = 11.1V
VIN = 14.8V 70 VIN = 14.8V
VIN = 20.5V 65 VIN = 20.5V
80
60
75 55
50
70 45
DEM, EN1 = LDO3, EN2 = 0V, BYP1 on 40 DEM, EN1 = 0V, EN2 = LDO3, BYP1 on
65 35
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Output Current (A) Output Current (A)

VOUT1 Switching Frequency vs. Output Current VOUT2 Switching Frequency vs. Output Current
600 700
DEM, EN1 = LDO3, EN2 = 0V, BYP1 on DEM, EN1 = 0V, EN2 = LDO3, BYP1 on
Switching Frequency (kHz)1

600
Switching Frequency (kHz)1

500
VIN = 19V
500 VIN = 19V
VIN = 11.1V
400 VIN = 11.1V
VIN = 7.4V
VIN = 7.4V
400
300
300
200
200

100
100

0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Output Current (A) Output Current (A)

VOUT1 Switching Frequency vs. Input Voltage VOUT2 Switching Frequency vs. Input Voltage
600 700
Switching Frequency (kHz)1

600
Switching Frequency (kHz)1

500

500
400
400
300
300
200
200

100
100
DEM, EN1 = LDO3, EN2 = 0V, IOUT1 = 6A, BYP1 on DEM, EN1 = 0V, EN2 = LDO3, IOUT2 = 6A, BYP1 on
0 0
5 7 9 11 13 15 17 19 21 23 25 5 7 9 11 13 15 17 19 21 23 25
Input Voltage (V) Input Voltage (V)

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


10
RT6585C

VOUT1 Output Voltage vs. Output Current VOUT2 Output Voltage vs. Output Current
5.05 3.33

5.04

5.03 3.32
Output Voltage (V)

Output Voltage (V)


5.02
3.31
5.01
VIN = 20.5V
5.00 VIN = 14.8V
VIN = 20.5V 3.30
4.99 VIN = 14.8V VIN = 11.1V
VIN = 11.1V VIN = 7.4V
4.98 VIN = 7.4V 3.29
4.97
DEM, EN1 = LDO3, EN2 = 0V, BYP1 on DEM, EN1 = 0V, EN2 = LDO3, BYP1 on
4.96 3.28
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Output Current (A) Output Current (A)

VLDO5 vs. ILDO5 VLDO3 vs. ILDO3


5.020 3.300

5.018 3.298
5.016 3.296
5.014 3.294
VLDO5 (V)

VLDO3 (V)

5.012 3.292
5.010 3.290
5.008 3.288
5.006 3.286
5.004 3.284
5.002 3.282
DEM, VIN = 12V, EN1 = LDO3, EN2 = 0V, BYP1 off DEM, VIN = 12V, EN1 = 0V, EN2 = LDO3, BYP1 off
5.000 3.280
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100
ILDO5 (mA) ILDO3 (mA)

Quiescent Current vs. Input Voltage BYP1 Supply Current vs. Input Voltage
30 160

25 150
Quiescent Current (µA)

Supply Current (µA)

20 140

15 130

10 120

5 110

DEM, EN1 = EN2 = LDO3, BYP1 on DEM, EN1 = EN2 = LDO3, BYP1 on
0 100
5 7 9 11 13 15 17 19 21 23 25 5 7 9 11 13 15 17 19 21 23 25
Input Voltage (V) Input Voltage (V)

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


11
RT6585C

Power On from EN Power Off from EN


EN EN
(5V/Div) (5V/Div)

VOUT1 VOUT1
(5V/Div) (5V/Div)

VOUT2 VOUT2
(5V/Div) (5V/Div)

LDO5 LDO5
(5V/Div) (5V/Div)
DEM, EN1 = EN2 = LDO3, VIN = 12V, No Load DEM, EN1 = EN2 = LDO3, VIN = 12V, No Load

Time (400μs/Div) Time (20ms/Div)

VOUT1 Load Transient Response at DEM VOUT1 Load Transient Response at ASM
EN1 = LDO3, EN2 = 0V, VIN = 12V, IOUT1 = 0A to 6A EN1 = LDO3, EN2 = 0V, VIN = 12V, IOUT1 = 0A to 6A

UGATE1
UGATE1
(20V/Div)
(20V/Div)

LGATE1 LGATE1
(5V/Div) (5V/Div)

IOUT1 IOUT1
(5A/Div) (5A/Div)
VOUT1 VOUT1
(50mV/Div) (50mV/Div)

Time (40μs/Div) Time (40μs/Div)

VOUT2 Load Transient Response at DEM VOUT2 Load Transient Response at ASM
EN1 = 0V, EN2 = LDO3, VIN = 12V, IOUT1 = 0A to 6A EN1 = 0V, EN2 = LDO3, VIN = 12V, IOUT1 = 0A to 6A

UGATE1 UGATE1
(20V/Div) (20V/Div)

LGATE1 LGATE1
(5V/Div) (5V/Div)

IOUT1 IOUT1
(5A/Div) (5A/Div)
VOUT1 VOUT1
(50mV/Div) (50mV/Div)

Time (40μs/Div) Time (40μs/Div)

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


12
RT6585C
VOUT1 OVP VOUT1 UVP

VOUT1
(5V/Div)
VOUT1 IL1
(2V/Div) (10A/Div)

PGOOD UGATE1
(5V/Div) (20V/Div)

LGATE1 LGATE1
(5V/Div) (5V/Div)
DEM, EN1 = EN2 = LDO3, VIN = 12V, No Load DEM, EN1 = EN2 = LDO3, VIN = 12V

Time (100μs/Div) Time (400μs/Div)

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


13
RT6585C
Application Information
The RT6585C is a dual-channel, low quiescent, Mach on-time is inversely proportional to the input voltage as
ResponseTM DRVTM mode synchronous Buck controller measured by VIN and proportional to the output voltage.
targeted for Ultrabook system power supply solutions. The inductor ripple current operating point remains
Richtek's Mach ResponseTM technology provides fast relatively constant, resulting in easy design methodology
response to load steps. The topology solves the poor load and predictable output voltage ripple. The frequency of 3V
transient response timing problems of fixed frequency output controller is set higher than the frequency of 5V
current mode PWMs, and avoids the problems caused output controller. This is done to prevent audio frequency
by widely varying switching frequencies in CCR (constant “ beating” between the two sides, which switch
current ripple) constant on-time and constant off-time asynchronously for each side.
PWM schemes. A special adaptive on-time control trades The RT6585C adaptively changes the operation frequency
off the performance and efficiency over wide input voltage according to the input voltage. Higher input voltage usually
range. The RT6585C includes 5V (LDO5) and 3.3V (LDO3) comes from an external adapter, so the RT6585C operates
linear regulators. The LDO5 linear regulator steps down with higher frequency to have better performance. Lower
the battery voltage to supply both internal circuitry and input voltage usually comes from a battery, so the
gate drivers. The synchronous switch gate drivers are RT6585C operates with lower switching frequency for
directly powered by LDO5. When VOUT1 rises above 4.66V, lower switching losses. For a specific input voltage range,
an automatic circuit disconnects the linear regulator and the switching cycle period is given by :
allows the device to be powered by VOUT1 via the BYP1
For 5V VOUT,
pin.
VIN  1.62
Period (μsec.) =
PWM Operation VIN  3.79
The Mach ResponseTM DRVTM mode controller relies on For 3.3V VOUT,
the output filter capacitor's Effective Series Resistance VIN  1.45
Period (μsec.) =
(ESR) to act as a current sense resistor, so that the output VIN  2.59
ripple voltage provides the PWM ramp signal. Referring to where the VIN is in volt.
the RT6585C's Function Block Diagram, the synchronous
The on-time guaranteed in the Electrical Characteristics
high-side MOSFET is turned on at the beginning of each
table is influenced by switching delays in the external
cycle. After the internal one-shot timer expires, the
high-side power MOSFET.
MOSFET will be turned off. The pulse width of this one-
shot is determined by the converter's input output voltages Operation Mode Selection
to keep the frequency fairly constant over the entire input The RT6585C supports two operation modes : diode
voltage range. Another one-shot sets a minimum off-time emulation mode (DEM) and ultrasonic mode (ASM). The
(200ns typ.). The on-time one-shot will be triggered if the operation mode can be set via the SKIPSEL pin. When
error comparator is high, the low-side switch current is the SKIPSEL pin voltage is higher than 1.2V, the RT6585C
below the current limit threshold, and the minimum off- operates in DEM. When the SKIPSEL pin Voltage is lower
time one-shot has timed out. than 0.8V, the RT6585C operates in ASM.

PWM Frequency and On-time Control Diode Emulation Mode


For each specific input voltage range, the Mach In diode emulation mode, the RT6585C automatically
ResponseTM control architecture runs with pseudo constant reduces switching frequency at light load conditions to
frequency by feed forwarding the input and output voltage maintain high efficiency. This reduction of frequency is
into the on-time one-shot timer. The high-side switch achieved smoothly. As the output current decreases from

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


14
RT6585C
heavy load condition, the inductor current is also reduced, Ultrasonic Mode (ASM)
and eventually comes to the point that its current valley The RT6585C activates a unique type of diode emulation
touches zero, which is the boundary between continuous mode with a minimum switching frequency of 25kHz,
conduction and discontinuous conduction modes. To called ultrasonic mode. This mode eliminates audio-
emulate the behavior of diodes, the low-side MOSFET frequency modulation that would otherwise be present
allows only partial negative current to flow when the when a lightly loaded controller automatically skips
inductor free wheeling current becomes negative. As the pulses. In ultrasonic mode, the low-side switch gate driver
load current is further decreased, it takes longer and longer signal is “OR”ed with an internal oscillator (>25kHz).
time to discharge the output capacitor to the level that Once the internal oscillator is triggered, the controller will
requires the next “ON” cycle. The on-time is kept the turn on UGATE and give it shorter on-time.
same as that in the heavy load condition. In reverse, when
When the on-time expired, LGATE turns on until the
the output current increases from light load to heavy load,
inductor current goes to zero crossing threshold and keep
the switching frequency increases to the preset value as
both high-side and low-side MOSFET off to wait for the
the inductor current reaches the continuous conduction.
next trigger. Because shorter on-time causes a smaller
The transition load point to the light load operation is shown
pulse of the inductor current, the controller can keep output
in Figure 1. and can be calculated as follows :
voltage and switching frequency simultaneously.
IL
Slope = (VIN - VOUT) / L The on-time decreasing has a limitation and the output
IPEAK voltage will be lifted up under the slight load condition.
The controller will turn on LGATE first to pull down the
output voltage. When the output voltage is pulled down to
ILOAD = IPEAK / 2
the balance point of the output load current, the controller
will proceed the short on-time sequence as the above
description.
t
0 tON
Linear Regulators (LDOx)
Figure 1. Boundary Condition of CCM/DEM
The RT6585C includes 5V (LDO5) and 3.3V (LDO3) linear
(VIN  VOUT ) regulators. The regulators can supply up to 100mA for
ILOAD(SKIP)   t ON
2L external loads. Bypass LDOx with 1μF(min) to 4.7μF
where tON is the on-time. (max), and the recommended value is 1μF. ceramic
The switching waveforms may appear noisy and capacitor. When VOUT1 is higher than the switch over
asynchronous when light load causes diode emulation threshold (4.66V), an internal 1.5Ω P-MOSFET switch
operation. This is normal and results in high efficiency. connects BYP1 to the LDO5 pin while simultaneously
Trade offs in PFM noise vs. light load efficiency is made disconnects the internal linear regulator.
by varying the inductor value. Generally, low inductor values
Current Limit Setting
produce a broader efficiency vs. load curve, while higher
The RT6585C has cycle-by-cycle current limit control and
values result in higher full load efficiency (assuming that
the OCP function only operation at CCM, it is disabled at
the coil resistance remains fixed) and less output voltage
DEM in order to reduce quiescent current. The current
ripple. Penalties for using higher inductor values include
limit circuit employs a unique “valley” current sensing
larger physical size and degraded load transient response
algorithm. If the magnitude of the current sense signal at
(especially at low input voltage levels).
PHASEx is above the current limit threshold, the PWM
is not allowed to initiate a new cycle (Figure 2). The actual
peak current is greater than the current limit threshold by

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


15
RT6585C
an amount equal to the inductor ripple current. Therefore, drive current is supplied by the flying capacitor between
the exact current limit characteristic and maximum load the BOOTx and PHASEx pins. A dead-time to prevent
capability are a function of the sense resistance, inductor shoot through is internally generated from high-side
value, battery and output voltage. MOSFET off to low-side MOSFET on and low-side
MOSFET off to high-side MOSFET on.
IL
The low-side driver is designed to drive high current low
IPEAK
RDS(ON) N-MOSFET(s). The internal pull down transistor
ILOAD that drives LGATEx low is robust, with a 1Ω typical on-
resistance. A 5V bias voltage is delivered from the LDO5
ILIMIT supply. The instantaneous drive current is supplied by an
input capacitor connected between LDO5 and GND.
t For high current applications, some combinations of high
Figure 2. “Valley” Current Limit and low-side MOSFETs may cause excessive gate drain
coupling, which leads to efficiency killing, EMI producing,
The RT6585C uses the on resistance of the synchronous
and shoot through currents. This is often remedied by
rectifier as the current sense element and supports
adding a resistor in series with BOOTx, which increases
temperature compensated MOSFET RDS(ON) sensing. The
the turn-on time of the high-side MOSFET without
RILIM resistor between the CSx pin and GND sets the current
degrading the turn-off time. See Figure 3.
limit threshold. The resistor RILIM is connected to a current
source from CSx which is 50μA (typ.) at room temperature. VIN

The current source has a 4700ppm/°C temperature slope UGATEx


to compensate the temperature dependency of the RBOOT
BOOTx
RDS(ON). When the voltage drop across the sense resistor
or low-side MOSFET equals 1/8 the voltage across the
PHASEx
RILIM resistor, positive current limit will be activated. The
high-side MOSFET will not be turned on until the voltage
Figure 3. Increasing the UGATEx Rise Time
drop across the MOSFET falls below 1/8 the voltage across
the RILIM resistor.
Soft-Start
Choose a current limit resistor according to the following The RT6585C provides an internal soft-start function to
equation : prevent large inrush current and output voltage overshoot
VLIMIT = (RLIMIT x 50μA − 35mV) / 8 = ILIMIT x RDS(ON) when the converter starts up. The soft-start (SS)
RLIMIT = ((ILIMIT x RDS(ON)) x 8 + 35mV) / 50μA automatically begins once the chip is enabled. During soft-
start, it clamps the ramping of internal reference voltage
Carefully observe the PC board layout guidelines to ensure
which is compared with FBx signal. The typical soft-start
that noise and DC errors do not corrupt the current sense
duration is 0.9ms. An unique PWM duty limit control that
signal at PHASEx and GND. Mount or place the IC close
prevents output over-voltage during soft-start period is
to the low-side MOSFET.
designed specifically for FBx floating.
MOSFET Gate Driver (UGATEx, LGATEx)
UVLO Protection
The high-side driver is designed to drive high current, low
The RT6585C has LDO5 under-voltage lock out protection
RDS(ON) N-MOSFET(s). When configured as a floating driver,
(UVLO). When the LDO5 voltage is lower than 3.9V (typ.)
5V bias voltage is delivered from the LDO5 supply. The
and the LDO3 voltage is lower than 2.5V (typ.), both switch
average drive current is also calculated by the gate charge
power supplies are shut off. This is a non-latch protection.
at VGS = 5V times switching frequency. The instantaneous

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


16
RT6585C
Power Good Output (PGOOD) Thermal Protection
PGOOD is an open-drain output and requires a pull-up The RT6585C features thermal shutdown to prevent
resistor. PGOOD is actively held low in soft-start, standby, damage from excessive heat dissipation. Thermal
and shutdown. For RT6585C, PGOOD is released when shutdown occurs when the die temperature exceeds
both output voltages are above 88% of nominal regulation 150°C. All internal circuitries are turned off during thermal
point. The PGOOD signal goes low if either output turns shutdown. The RT6585C triggers thermal shutdown if
off or is 20% below or 13% over its nominal regulation LDO5 is not supplied from VOUT1, while input voltage on
point. VIN and drawing current from LDO5 are too high.
Nevertheless, even if LDO5 is supplied from VOUT1,
Output Over-Voltage Protection (OVP) overloading LDO5 can cause large power dissipation on
The output voltage can be continuously monitored for over- automatic switches, which may still result in thermal
voltage condition. If the output voltage exceeds 13% of shutdown.
its set voltage threshold, the over-voltage protection is
triggered and the LGATEx low-side gate drivers are forced Discharge Mode (Soft Discharge)
high. This activates the low-side MOSFET switch, which When ENx is low the output under-voltage fault latch is
rapidly discharges the output capacitor and pulls the output set, the output discharge mode will be triggered. During
voltage downward. discharge mode, an internal switch creates a path for
The RT6585C is latched once OVP is triggered and can discharging the output capacitors' residual charge to GND.
only be released by either toggling ENx or cycling VIN.
Standby Mode
There is a 1μs delay built into the over-voltage protection
When VIN rises POR threshold and ENx < 0.4V, RT6585C
circuit to prevent false transition.
operate in standby mode, CH1 and CH2 is OFF state. For
Note that latching LGATEx high will cause the output RT6585C, LDO5 and LDO3 are ON state and approximately
voltage to dip slightly negative due to previously stored consumes 30μA while in standby mode.
energy in the LC tank circuit. For loads that cannot tolerate
a negative voltage, place a power Schottky diode across Power-Up Sequencing and On/Off Controls (ENx)
the output to act as a reverse polarity clamp. EN1 and EN2 control the power-up sequencing of the two
If the over-voltage condition is caused by a shorted in channels of the Buck converter. The 0.4V falling edge
high-side switch, turning the low-side MOSFET on 100% threshold on ENx can be used to detect a specific analog
will create an electrical shorted circuit between the battery voltage level and to shutdown the device. Once in
and GND to blow the fuse and disconnecting the battery shutdown, the 1.6V rising edge threshold activates,
from the output. providing sufficient hysteresis for most applications.

Output Under-Voltage Protection (UVP)


The output voltage can be continuously monitored for under-
voltage condition. If the output is less than 52% (typ.) of
its set voltage threshold, the under-voltage protection will
be triggered and then both UGATEx and LGATEx gate
drivers will be forced low. The UVP is ignored for at least
1.3ms (typ.) after a start-up or a rising edge on ENx. Toggle
ENx or cycle VIN to reset the UVP fault latch and restart
the controller.

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


17
RT6585C
Table 1. Operation Mode Truth Table
Mode Condition Comment
LDO Over Transitions to discharge mode after VIN POR. LDO5
LDOx < UVLO threshold
Current Limit and LDO3 remain active.
Run ENx = high, VOUT1 or VOUT2 are enabled Normal Operation.
Over-Voltage LGATEx is forced high. LDO3 and LDO5 are active.
Either output >113% of the nominal level.
Protection Exit by VIN POR or by toggling ENx.
Either output < 52% of the nominal level Both UGATEx and LGATEx are forced low and enter
Under-Voltage
after 1.3ms time-out expires and output is discharge mode. LDO3 and LDO5 are active. Exit by
Protection
enabled VIN POR or by toggling ENx.
During discharge mode, there is one path to
Discharge Either output is still high in standby mode discharge the output capacitors’ residual charge to
GND via an internal switch.
Standby VIN > POR ENx < 0.4V LDO3, LDO5 are active.
Thermal
TJ > 150C All circuitries are off. Exit by VIN POR.
Shutdown

Table 2. Enabling/PGOOD State


EN1 EN2 LDO5 LDO3 CH1 (5VOUT) CH2 (3.3VOUT) PGOOD
OFF OFF ON ON OFF OFF Low
ON OFF ON ON ON OFF Low
OFF ON ON ON OFF ON Low
ON ON ON ON ON ON High

VIN POR threshold


VIN
2.5V

LDO3

LDO5

EN threshold
Start-Up Time
EN1

Soft-Start Time
5V VOUT

EN threshold
EN2
Start-Up Time
3.3V VOUT

PGOOD
Soft-Start Time PGOOD
Delay

Figure 4. RT6585C Timing

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


18
RT6585C
Output Voltage Setting (FBx) Output Capacitor Selection
Connect a resistive voltage divider at the FBx pin between The capacitor value and ESR determine the amount of
VOUTx and GND to adjust the output voltage from 2V to output voltage ripple and load transient response. Thus,
5.5V for CH1 and 2V to 4V for CH2, as shown in Figure 5. the capacitor value must be greater than the largest value
The recommended R2 is between 100kΩ to 200kΩ, VOUT calculated from the equations below :
(vally) and solve for R1 using the equation below : (ILOAD )2  L  (tON + t OFF(MIN) )
VSAG 
  R1   2  COUT   VIN  tON  VOUTx (t ON + tOFF(MIN) )
VOUT(Valley)  VFBx   1 +  
  R2  
(ILOAD )2  L
VSOAR 
where VFBx is 2V (typ.). 2  COUT  VOUTx
VIN  1 
VP P  LIR  ILOAD(MAX)   ESR + 
 8  COUT  f 
UGATEx
where VSAG and VSOAR are the allowable amount of
PHASEx VOUTx
undershoot and overshoot voltage during load transient,
LGATEx
R1
Vp-p is the output ripple voltage, and tOFF(MIN) is the
minimum off-time.
FBx
R2 Thermal Considerations
GND
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
Figure 5. Setting VOUTx with a resistive voltage divider under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
Output Inductor Selection dissipation depends on the thermal resistance of the IC
The switching frequency (on-time) and operating point package, the PCB layout, the rate of surrounding airflow,
(% ripple or LIR) determine the inductor value as shown and the difference between the junction and ambient
below : temperatures. The maximum power dissipation can be
tON  (VIN  VOUTx ) calculated using the following formula :
L
LIR  ILOAD(MAX) PD(MAX) = (TJ(MAX) − TA) / θJA
where LIR is the ratio of the peak-to-peak ripple current to where TJ(MAX) is the maximum junction temperature, TA is
the average inductor current. the ambient temperature, and θJA is the junction-to-ambient
Find a low-loss inductor having the lowest possible DC thermal resistance.
resistance that fits in the allotted dimensions. Ferrite cores For continuous operation, the maximum operating junction
are often the best choice, although powdered iron is temperature indicated under Recommended Operating
inexpensive and can work well at 200kHz. The core must Conditions is 125°C. The junction-to-ambient thermal
be large enough not to saturate at the peak inductor resistance, θJA, is highly package dependent. For a
current, IPEAK : WQFN-20L 3x3 package, the thermal resistance, θJA, is
IPEAK = ILOAD(MAX) + [ (LIR / 2) x ILOAD(MAX) ] 30°C/W on a standard JEDEC 51-7 high effective-thermal-
conductivity four-layer test board. The maximum power
The calculation above shall serve as a general reference.
dissipation at TA = 25°C can be calculated as below :
To further improve transient response, the output
inductance can be further reduced. Of course, besides PD(MAX) = (125°C − 25°C) / (30°C/W) = 3.33W for a
the inductor, the output capacitor should also be WQFN-20L 3x3 package.
considered when improving transient response. The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


19
RT6585C
resistance, θJA. The derating curves in Figure 6 allows  Place ground terminal of VIN capacitor(s), V OUTx
the designer to see the effect of rising ambient temperature capacitor(s), and Source of low-side MOSFETs as close
on the maximum power dissipation. to each other as possible. The PCB trace of PHASEx
4.0 node, which connects to Source of high-side MOSFET,
Maximum Power Dissipation (W)1

Four-Layer PCB
3.5 Drain of low-side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.
3.0

2.5

2.0

1.5

1.0

0.5

0.0
0 25 50 75 100 125
Ambient Temperature (°C)

Figure 6. Derating Curve of Maximum Power Dissipation

Layout Considerations
Layout is very important in high frequency switching
converter design. Improper PCB layout can radiate
excessive noise and contribute to the converter’s
instability. Certain points must be considered before
starting a layout with the RT6585C.
 Place the filter capacitor close to the IC, within 12mm
(0.5 inch) if possible.
 Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high-voltage switching node.
 Connections from the drivers to the respective gate of
the high-side or the low-side MOSFET should be as
short as possible to reduce stray inductance. Use
0.65mm (25 mils) or wider trace.
 All sensitive analog traces and components such as
FBx, PGOOD, and should be placed away from high
voltage switching nodes such as PHASEx, LGATEx,
UGATEx, or BOOTx nodes to avoid coupling. Use
internal layer(s) as ground plane(s) and shield the
feedback trace from power traces and components.

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS6585C-01 April 2022


20
RT6585C
Outline Dimension

1 1

2 2

DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,


but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches


Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 2.900 3.100 0.114 0.122
D2 1.650 1.750 0.065 0.069
E 2.900 3.100 0.114 0.122
E2 1.650 1.750 0.065 0.069
e 0.400 0.016
L 0.350 0.450 0.014 0.018

W-Type 20L QFN 3x3 Package

Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS6585C-01 April 2022 www.richtek.com


21
RT6585C
Footprint Information

Number of Footprint Dimension (mm)


Package Tolerance
Pin P Ax Ay Bx By C D Sx Sy
V/W/U/XQFN3*3-20 20 0.40 3.80 3.80 2.10 2.10 0.85 0.20 1.70 1.70 ±0.05

Richtek Technology Corporation


14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

www.richtek.com DS6585C-01 April 2022


22

You might also like