®

RT8065

3A, 2MHz, Synchronous Step-Down Converter

General Description Features
The RT8065 is a high efficiency synchronous, step-down z High Efficiency : Up to 95%
DC/DC converter. Its input voltage range is from 2.7V to z Adjustable Frequency : 200kHz to 2MHz
5.5V and provides an adjustable regulated output voltage z No Schottky Diode Required
from 0.8V to 5V while delivering up to 3A of output current. z 0.8V Reference Allows Low Output Voltage
z Low Dropout Operation : 100% Duty Cycle
The internal synchronous low on-resistance power
z Enable Function
switches increase efficiency and eliminate the need for
z External Soft-Start
an external Schottky diode. The default switching
z Power Good Function
frequency is set at 2MHz, if the RT pin is left open. It can
z RoHS Compliant and Halogen Free
also be varied from 200kHz to 2MHz by adding an external
resistor. Current mode operation with external
compensation allows the transient response to be Applications
optimized over a wide range of loads and output capacitors. z LCD TV and Monitor
z Notebook Computers
z Distributed Power Systems
Ordering Information
z IP Phones
RT8065
z Digital Cameras
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
QW : WDFN-8L 3x3 (W-Type)
Marking Information
Lead Plating System
Z : ECO (Ecological Element with RT8065ZSP
Halogen Free and Pb free) RT8065ZSP : Product Number
RT8065 YMDNN : Date Code
Note : ZSPYMDNN
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
RT8065ZQW
` Suitable for use in SnPb or Pb-free soldering processes. 29 : Product Code
29 YM YMDNN : Date Code
DNN

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RT8065
Pin Configurations
(TOP VIEW)

COMP 8 PGOOD COMP 1 8 PGOOD

GND
SS 2 7 FB SS 2 7 FB
GND
EN 3 6 RT EN 3 6 RT
9
VIN 4 VIN 4 9 5 LX
5 LX

SOP-8 (Exposed Pad) WDFN-8L 3x3

Typical Application Circuit

RT8065 L
VIN 4 5
VIN LX VOUT
2.7V to 5.5V
R3 CIN
10µF R1
100k
7 COUT
8 PGOOD FB
PGOOD
RCOMP
1 R2
ROSC COMP
6 RT
CCOMP
GND 9 (Exposed Pad)
Chip Enable
3
EN SS 2
CSS
10nF

Table 1. Recommended Components Selection for fSW = 1MHz

VOUT (V) R1 (kΩ) R2 (kΩ) R COMP (kΩ) CCOMP (pF) L (μH) COUT (μF)
3.3 75 24 33 560 2 22
2.5 51 24 22 560 2 22
1.8 30 24 15 560 1.5 22
1.5 21 24 13 560 1.5 22
1.2 12 24 11 560 1.5 22
1 6 24 8.2 560 1.5 22

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 RT8065
Functional Pin Description
Pin No.
SOP-8 Pin Name Pin Function
WDFN-8L 3x3
(Exposed Pad)
Error Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. Connect
1 1 COMP
external compensation elements to this pin to stabilize the
control loop.
Soft-Start Control Input. Connect a capacitor from SS to GND
2 2 SS to set the soft-start period. A 10nF capacitor sets the
soft-start period to 800μs (typ.).
Enable Control Input. Float or connect this pin to logic high
3 3 EN
for enable. Connect to GND for disable.
Power Input Supply. Decouple this pin to GND with a
4 4 VIN
capacitor.
Internal Power MOSFET Switches Output. Connect this pin
5 5 LX
to the inductor.
Oscillator Resistor Input. Connect a resistor from this pin to
6 6 RT GND sets the switching frequency. If this pin is floating, the
frequency will be set at 2MHz internally.
Feedback. Receives the feedback voltage from a resistive
7 7 FB
divider connected across the output.
Power Good Indicator. This pin is an open drain logic output
8 8 PGOOD that is pulled to ground when the output voltage is not within
±12.5% of regulation point.
Ground. The exposed pad must be soldered to a large PCB
9 (Exposed Pad) 9 (Exposed Pad) GND
and connected to GND for maximum power dissipation.

Function Block Diagram RT

SD VIN
ISEN

Slope
OSC
Com
COMP
0.8V Output OC
EA Limit
FB Clamp

10µA
Driver
SS Hiccup LX
Control
Logic
0.7V
P-G
NISEN GND
EN Enable 0.4V OTP N-MOSFET ILIM
UV

PGOOD

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RT8065
Absolute Maximum Ratings (Note 1)
z Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- −0.3V to 6V
z LX Pin Switch Voltage ---------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
<10ns ------------------------------------------------------------------------------------------------------------------ −5V to 8.5V
z Other I/O Pin Voltages --------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
z LX Pin Switch Current ---------------------------------------------------------------------------------------------- 5A
z Power Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------- 1.333W

WDFN-8L 3x3 -------------------------------------------------------------------------------------------------------- 1.429W
z Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W

SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W
WDFN-8L 3x3, θJA --------------------------------------------------------------------------------------------------- 70°C/W
WDFN-8L 3x3, θJC --------------------------------------------------------------------------------------------------- 8.2°C/W
z Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
z Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 3)

HBM (Human Body Model) ---------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

z Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- 2.7V to 5.5V
z Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 3.3V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Feedback Reference Voltage VREF 0.784 0.8 0.816 V
Active , VFB = 0.78V, Not Switching -- 460 --
DC Bias Current μA
Shutdown -- -- 10
Output Voltage Line Regulation VIN = 2.7V to 5.5V -- 0.1 -- %/V
Output Voltage Load Regulation 0A < ILOAD < 3A -- 0.25 -- %
Error Amplifier
gm -- 400 -- μA/V
Trans-conductance
Current Sense Trans-resistance RT -- 0.3 -- Ω
R OSC = 330kΩ 0.8 1 1.2
Switching Frequency MHz
Switching 0.2 -- 2
Logic-High VIH 1.6 -- --
EN Input Voltage V
Logic-Low VIL -- -- 0.4

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 RT8065
Parameter Symbol Test Conditions Min Typ Max Unit
Switch On-Resistance, High R DS(ON)_P ILX = 0.5A -- 120 180 mΩ
Switch On-Resistance, Low R DS(ON)_N ILX = 0.5A -- 80 120 mΩ
Peak Current Limit ILIM 3.6 4.5 -- A
Under Voltage Lockout VIN Rising -- 2.4 --
V
Threshold VIN Falling -- 2.2 --
RT Shutdown Threshold VRT VRT Rising -- VIN − 0.7 VIN − 0.4 V
Soft-Start Period tSS C SS = 10nF -- 800 -- μs
PGOOD Trip Threshold -- 87.5 -- %VOUT

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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RT8065
Typical Operating Characteristics
Efficiency vs. Output Current Efficiency vs. Output Current
100 100
90 90
80 80
70 70
Efficiency (%)

Efficiency (%)
60 60
50 50
40 40
30 30
20 20
10 10
VIN = 5V, VOUT = 1.1V, IOUT = 0A to 3A VIN = 5V, VOUT = 3.3V, IOUT = 0A to 3A
0 0
0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3
Output Current (A) Output Current (A)

Output Voltage vs. Output Current Output Voltage vs. Output Current
1.130 3.360

1.120 3.350
Output Voltage (V)
Output Voltage (V)

1.110 3.340

1.100 3.330

1.090 3.320

1.080 3.310

VIN = 5V, VOUT = 1.1V, IOUT = 0A to 3A VIN = 5V, VOUT = 3.3V, IOUT = 0A to 3A
1.070 3.300
0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3
Output Current (A) Output Current (A)

Switching Frequency vs. Temperature Reference Voltage vs. Temperature

1.04 0.84

1.03
Switching Frequency (MHz)1

0.83
Reference Voltage (V)

1.02
0.82
1.01
0.81
1.00
0.99 0.80

0.98 0.79
0.97
0.78
0.96
VIN = 5V, VOUT = 1.1V, IOUT = 0.6A, 0.77
0.95
RRT = 330kΩ VIN = 5V, VOUT = 1.1V
0.94 0.76
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

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 RT8065

VIN UVLO vs. Temperature Enable Voltage vs. Temperature

2.8 1.6
2.7 1.5
2.6 1.4

Enable Voltage (V)

VIN UVLO (V)

2.5 Rising 1.3

2.4 1.2 Rising

2.3 1.1
2.2 1.0
Falling Falling
2.1 0.9
2.0 0.8
1.9 0.7
1.8 0.6
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Load Transient Response Load Transient Response

VOUT VOUT
(200mV/Div) (200mV/Div)

IOUT IOUT
(1A/Div) VIN = 5V, VOUT = 1.1V, IOUT = 1A to 3A, (1A/Div) VIN = 5V, VOUT = 3.3V, IOUT = 1A to 3A,
RCOMP = 10kΩ, CCOMP = 560pF RCOMP = 33kΩ, CCOMP = 560pF

Time (100μs/Div) Time (100μs/Div)

Switching Switching

VLX VLX
(5V/Div) (5V/Div)

VOUT VOUT
(10mV/Div) (10mV/Div)

VIN = 5V, VOUT = 1.1V, IOUT = 3A VIN = 5V, VOUT = 3.3V, IOUT = 3A

Time (500ns/Div) Time (500ns/Div)

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RT8065

Power On from VIN Power Off from VIN

VIN VIN
(5V/Div) (5V/Div)

VOUT VOUT
(1V/Div) (1V/Div)
VPGOOD VPGOOD
(10V/Div) (10V/Div)

IOUT IOUT
(2A/Div) (2A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 3A, EN = High VIN = 5V, VOUT = 1.1V, IOUT = 3A, EN = High

Time (2.5ms/Div) Time (5ms/Div)

Power On from EN Power Off from EN

VEN VEN
(5V/Div) (5V/Div)

VOUT VOUT
(2V/Div) (2V/Div)

VPGOOD VPGOOD
(5V/Div) (5V/Div)
IOUT IOUT
(5A/Div) (5A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 3A VIN = 5V, VOUT = 1.1V, IOUT = 3A

Time (500μs/Div) Time (250μs/Div)

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 RT8065
Application Information
The basic IC application circuit is shown in Typical Soft-Start
Application Circuit. External component selection is The IC contains an external soft-start clamp that gradually
determined by the maximum load current and begins with raises the output voltage. The soft-start timing is
the selection of the inductor value and operating frequency programmed by the external capacitor between SS pin
followed by CIN and COUT. and GND. The chip provides an internal 10μA charge current
for the external capacitor. If 10nF capacitor is used to set
Main Control Loop
the soft-start, the period will be 800μs (typ.).
During normal operation, the internal upper power switch
(P-MOSFET) is turned on at the beginning of each clock Power Good Output
cycle. Current in the inductor increases until the peak The power good output is an open-drain output and requires
inductor current reaches the value defined by the output a pull up resistor. When the output voltage is 12.5% above
voltage (VCOMP) of the error amplifier. The error amplifier or 12.5% below its set voltage, PGOOD will be pulled
adjusts its output voltage by comparing the feedback signal low. It is held low until the output voltage returns to within
from a resistive voltage-divider on the FB pin with an the allowed tolerances once more. During soft-start,
internal 0.8V reference. When the load current increases, PGOOD is actively held low and is only allowed to transition
it causes a reduction in the feedback voltage relative to high when soft-start is over and the output voltage reaches
the reference. The error amplifier increases its output 87.5% of its set voltage.
voltage until the average inductor current matches the new
load current. When the upper power MOSFET shuts off, Operating Frequency
the lower synchronous power switch (N-MOSFET) turns Selection of the operating frequency is a tradeoff between
on until the beginning of the next clock cycle. efficiency and component size. Higher frequency operation
allows the use of smaller inductor and capacitor values.
Output Voltage Setting Lower frequency operation improves efficiency by reducing
The output voltage is set by an external resistive voltage internal gate charge and switching losses but requires
divider according to the following equation : larger inductance and/or capacitance to maintain low output
⎛ R1 ⎞
VOUT = VREF × ⎜ 1 + ⎟ ripple voltage.
⎝ R2 ⎠
The operating frequency of the IC is determined by an
where VREF equals to 0.8V typical.
external resistor, ROSC, that is connected between the
The resistive voltage divider allows the FB pin to sense a RT pin and ground. The value of the resistor sets the ramp
fraction of the output voltage as shown in Figure 1 current that is used to charge and discharge an internal
VOUT timing capacitor within the oscillator. The practical switching
frequency ranges from 200kHz to 2MHz. However, when
R1 the RT pin is floating, the internal frequency is set at 2MHz.
FB
Determine the RT resistor value by examining the curve
RT8065 R2
below. Please notice the minimum on time is about 90ns.
GND

Figure 1. Setting the Output Voltage

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RT8065
2.4
and the power is supplied by a wall adapter through long
Switching Frequency (MHz)1

2.0
wires, a load step at the output can induce ringing at the
input. At best, this ringing can couple to the output and
1.6 be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
1.2
voltage spike at VIN large enough to damage the part.

0.8
Slope Compensation and Peak Inductor Current
0.4 Slope compensation provides stability in constant
frequency architectures by preventing sub- harmonic
0.0 oscillations at duty cycles greater than 50%. It is
0 300 600 900 1200 1500 1800 2100
accomplished internally by adding a compensating ramp
RRT (k Ω)
to the inductor current signal. Normally, the peak inductor
Figure 2. Switching Frequency vs. RT Resistor
current is reduced when slope compensation is added.
For the IC, however, separated inductor current signal is
Inductor Selection used to monitor over current condition, so the maximum
For a given input and output voltage, the inductor value output current stays relatively constant regardless of the
and operating frequency determine the ripple current. The duty cycle.
ripple current, ΔIL, increases with higher VIN and decreases
with higher inductance. Hiccup Mode Under Voltage Protection
⎡V ⎤ ⎡ V ⎤ A Hiccup Mode Under Voltage Protection (UVP) function
ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥
⎣ f ×L ⎦ ⎣ VIN ⎦ is provided for the IC. When the FB voltage drops below
Having a lower ripple current reduces not only the ESR half of the feedback reference voltage, VFB, the UVP
losses in the output capacitors but also the output voltage function is triggered to auto soft-start the power stage
ripple. Highest efficiency operation is achieved by reducing until this event is cleared. The Hiccup Mode UVP reduces
ripple current at low frequency, but attaining this goal the input current in short circuit conditions, but will not be
requires a large inductor. triggered during soft-start process.

For the ripple current selection, the value of ΔIL = 0.4(IMAX)

Under Voltage Lockout Threshold
is a reasonable starting point. The largest ripple current
The RT8065 includes an input under voltage lockout
occurs at the highest VIN. To guarantee that the ripple
protection (UVLO) function. If the input voltage exceeds
current stays below a specified maximum value, the
the UVLO rising threshold voltage, the converter will reset
inductor value needs to be chosen according to the following
and prepare the PWM for operation. However, if the input
equation :
voltage falls below the UVLO falling threshold voltage during
⎡ VOUT ⎤ ⎡ V ⎤
L= ⎢ ⎥ × ⎢1− OUT ⎥ normal operation, the device will stop switching. The UVLO
⎢⎣ f × ΔIL(MAX) ⎥⎦ ⎢⎣ VIN(MAX) ⎥⎦ rising and falling threshold voltage has a hysteresis to
prevent noise-caused reset.
Using Ceramic Input and Output Capacitors
Thermal Considerations
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple For continuous operation, do not exceed absolute
current, high voltage rating and low ESR make them ideal maximum junction temperature. The maximum power
for switching regulator applications. However, care must dissipation depends on the thermal resistance of the IC
be taken when these capacitors are used at the input and package, PCB layout, rate of surrounding airflow, and
output. When a ceramic capacitor is used at the input difference between junction and ambient temperature. The

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 RT8065
maximum power dissipation can be calculated by the Layout Considerations
following formula : Follow the PCB layout guidelines for optimal performance
PD(MAX) = (TJ(MAX) − TA) / θJA of the IC.

where TJ(MAX) is the maximum junction temperature, TA is ` Connect the terminal of the input capacitor(s), CIN, as
the ambient temperature, and θJA is the junction to ambient close to the VIN pin as possible. This capacitor provides
thermal resistance. the AC current into the internal power MOSFETs.

For recommended operating condition specifications, the ` LX node experiences high frequency voltage swings so
maximum junction temperature is 125°C. The junction to should be kept within a small area.
ambient thermal resistance, θJA, is layout dependent. For ` Keep all sensitive small signal nodes away from the LX
SOP-8 (Exposed Pad) packages, the thermal resistance, node to prevent stray capacitive noise pick up.
θJA, is 75°C/W on a standard JEDEC 51-7 four-layer
` Connect the FB pin directly to the feedback resistors.
thermal test board. For WDFN-8L 3x3 packages, the
The resistive voltage-divider must be connected between
thermal resistance, θJA, is 70°C/W on a standard JEDEC
VOUT and GND.
51-7 four-layer thermal test board. The maximum power
Place the feedback
dissipation at TA =25°C can be calculated by the following Place the compensation resistors as close to
components as close to the IC as possible
formulas : the IC as possible

PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for GND

SOP-8 (Exposed Pad) package R2

CCOMP
COMP 8
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for RCOMP
PGOOD
R1
VOUT
SS 2 7 FB
GND
WDFN-8L 3x3 package CSS EN 3
9
6 RT GND
ROSC
VIN 4 5 LX
The maximum power dissipation depends on the operating LX should be connected
GND CIN COUT L1 to inductor by wide and
ambient temperature for fixed T J(MAX) and thermal VIN
short trace, and keep
sensitive components
resistance, θJA. The derating curves in Figure 3 allow the VOUT
away from this trace
Place the input and output capacitors
designer to see the effect of rising ambient temperature as close to the IC as possible
on the maximum power dissipation.
1.5 Place the feedback
Place the compensation
Maximum Power Dissipation (W)1

1.4 Four-Layer PCB resistors as close to

components as close to the IC as possible
1.3 the IC as possible
1.2
1.1 GND
1.0
WDFN-8L 3x3 R2
0.9 CCOMP
0.8 COMP 1 8 PGOOD
RCOMP R1
0.7 VOUT
GND

SS 2 7 FB
0.6 SOP-8 (Exposed Pad) EN 3 6 RT
CSS GND
0.5 4 9 5 LX ROSC
VIN
LX should be connected
0.4 to inductor by wide and
GND CIN COUT L1
0.3 short trace, and keep
0.2 sensitive components
0.1 VIN VOUT away from this trace
0.0 Place the input and output capacitors
0 25 50 75 100 125 as close to the IC as possible

Ambient Temperature (°C)

Figure 4. PCB Layout Guide
Figure 3. Derating Curve of Maximum Power Dissipation

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RT8065
Outline Dimension
H
A

EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B

C
I
D
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

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 RT8065

D2
D

E E2

SEE DETAIL A
1

e
b 2 1 2 1
A
A3
A1 DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.200 0.300 0.008 0.012
D 2.950 3.050 0.116 0.120
D2 2.100 2.350 0.083 0.093
E 2.950 3.050 0.116 0.120
E2 1.350 1.600 0.053 0.063
e 0.650 0.026
L 0.425 0.525 0.017 0.021

W-Type 8L DFN 3x3 Package

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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