2A, 18V, 800Khz Synchronous Step-Down Converter: General Description Features

®
RT7237C
2A, 18V, 800kHz Synchronous Step-Down Converter

General Description Features
The RT7237C is a high efficiency, monolithic synchronous  ±1.5% High Accuracy Reference Voltage
step-down DC/DC converter that can deliver up to 2A  4.5V to 18V Input Voltage Range
output current from a 4.5V to 18V input supply. The  2A Output Current
RT7237C's current mode architecture and external  Integrated N-MOSFET Switches
compensation allow the transient response to be  Current Mode Control
optimized over a wide input range and loads. Cycle-by-  Fixed Frequency Operation : 800kHz
cycle current limit provides protection against shorted  Output Adjustable from 0.8V to 12V
outputs, and soft-start eliminates input current surge during  Stable with Low ESR Ceramic Output Capacitors
start-up. The RT7237C also provides under voltage  Up to 95% Efficiency
protection and thermal shutdown protection. The low  Programmable Soft-Start
current (<3μA) shutdown mode provides output  Cycle-by-Cycle Over Current Limit
disconnection, enabling easy power management in  Input Under Voltage Lockout
battery-powered systems. The RT7237C is available in  Output Under Voltage Protection
an SOP-8 (Exposed Pad) package.  Thermal Shutdown Protection
 RoHS Compliant and Halogen Free
Marking Information
RT7253CHGSP : Product Number Applications
RT7237CH YMDNN : Date Code  Wireless AP/Router
GSPYMDNN
 Set-Top-Box
 Industrial and Commercial Low Power Systems
 LCD Monitors and TVs
 Green Electronics/Appliances
 Point of Load Regulation of High-Performance DSPs
Simplified Application Circuit
VIN VIN BOOT

CIN CBOOT
RT7237C L
SW VOUT
Chip Enable
EN R1
SS FB COUT
CSS CC RC R2
GND COMP
CP
Copyright © 2015 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
DS7237C-05 February 2015 www.richtek.com

1
RT7237C
Ordering Information Pin Configurations
RT7237C (TOP VIEW)
Package Type 8
BOOT SS
SP : SOP-8 (Exposed Pad-Option 2) VIN 2 7 EN
GND
Lead Plating System SW 3 6 COMP
9
G : Green (Halogen Free and Pb Free) GND 4 5 FB
H : UVP Hiccup
SOP-8 (Exposed Pad)
Note :
Richtek products are :
 RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
 Suitable for use in SnPb or Pb-free soldering processes.
Functional Pin Description

Pin No. Pin Name Pin Function
Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic
1 BOOT
capacitor from BOOT to SW pins.
Power Input. The Input Voltage range is from 4.5V to 18V. Must bypass with a
2 VIN
suitable large ceramic capacitor.
3 SW Switch Node. Connect this pin to an external L-C filter.
4, Ground. The exposed pad must be soldered to a large PCB and connected to
GND
9 (Exposed Pad) GND for maximum power dissipation.
Feedback Input. It is used to regulate the output of the converter to a set value
5 FB
via an external resistive voltage divider.
Compensation Node. COMP is used to compensate the regulation control
6 COMP loop. Connect a series RC network from COMP to GND. In some cases, an
additional capacitor from COMP to GND is required.
Enable Input. A logic high enables the converter; a logic low forces the IC into
7 EN
shutdown mode reducing the supply current to less than 3A.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor
8 SS from SS to GND to set the soft-start period. A 0.1F capacitor sets the
soft-start period to 13.5ms.
www.richtek.com DS7237C-05 February 2015

2
RT7237C
Function Block Diagram
VIN
Internal
Regulator Oscillator
Current Sense
Shutdown V V Slope Comp Amplifier
A CC
Comparator Foldback + VA
RSENSE
1.2V + Control -
-
0.4V + BOOT
Lockout -
Comparator UV S Q 150m
5k Comparator SW
EN - +
R Q 130m
1.8V + -
Current GND
Comparator
VCC
6µA
0.8V +
SS +EA
-
FB COMP
Operation
Internal Regulator UV Comparator
Provide internal power for logic control and switch gate As FB voltage is lower than the UV voltage, it will activate
drivers. a UV protect scheme.
Error Amplifier
Shutdown Comparator
Activate internal regulator once EN input level is higher The output voltage COMP of the error amplifier is adjusted
than the target level. Force IC to enter shutdown mode by comparing FB signal with the internal reference voltage
when the EN input level is lower than 0.4V. and SS signal.
Lockout Comparator Current Sense Amplifier
Activate the current comparator, release lock-out logic, RSENSE detects the peak current of the high side switch.
and enable the switches as EN input level is higher than This signal is amplified by the current sense amplifier and
lockout threshold voltage. Otherwise, the switches still added with a slope compensation signal. Then, It controls
lock out. the switches by comparing this signal with the COMP
voltage.
Oscillator
The oscillator provides internal clock and controls the
converter's switching frequency.
Foldback Control
Dynamically adjust the internal clock. It provides a slower
frequency as a lower FB voltage.

3
RT7237C
Absolute Maximum Ratings (Note 1)
 Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- −0.3V to 20V
 Switch Voltage, SW ------------------------------------------------------------------------------------------------ −0.3V to (VIN + 0.3V)
 VBOOT − VSW ---------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Other Pins Voltage ------------------------------------------------------------------------------------------------- −0.3V to 20V
 Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W
 Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
 Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
 Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions (Note 4)

 Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- 4.5V to 18V
 Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Shutdown Supply Current VEN = 0V -- 0.5 3 A
Supply Current VEN = 3V, VFB = 0.9V -- 0.8 1.2 mA
Reference Voltage VREF 4.5V VIN 18V 0.788 0.8 0.812 V
Error Amplifier
GEA IC = ±10A -- 940 -- A/V
Transconductance
High Side Switch
RDS(ON)1 -- 150 -- m
On-Resistance
Low Side Switch
RDS(ON)2 -- 130 -- m
On-Resistance
High Side Switch Leakage
VEN = 0V, VSW = 0V -- 0 10 A
Current
Upper Switch Current Limit Min. Duty Cycle, VBOOT VSW = 4.8V -- 4 -- A
COMP to Current Sense
GCS -- 3.7 -- A/V
Transconductance
Oscillation Frequency fOSC1 -- 800 -- kHz
Short Circuit Oscillation
fOSC2 VFB = 0V -- 270 -- kHz
Frequency
Maximum Duty Cycle DMAX VFB = 0.7V -- 84 -- %

4
RT7237C
Parameter Symbol Test Conditions Min Typ Max Unit
Minimum On-Time tON -- 100 -- ns
EN Input Threshold Logic-High VIH 2 -- 18
V
Voltage Logic-Low VIL -- -- 0.4
Input Under Voltage Lockout
VUVLO VIN Rising 3.8 4.2 4.5 V
Threshold
Input Under Voltage Lockout
VUVLO -- 320 -- mV
Hysteresis
Soft-Start Current ISS VSS = 0V -- 6 -- A
Soft-Start Period tSS CSS = 0.1F -- 13.5 -- ms
Thermal Shutdown TSD -- 150 -- C
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

5
RT7237C
Typical Application Circuit
VIN 2 VIN 1
BOOT
4.5V to 18V CIN CBOOT L
10µF x 2 RT7237C 0.1µF 4.7µH
VOUT
SW 3
Chip Enable 3.3V
7 EN R1
75k
8 SS COUT
FB 5 22µF x 2
CSS CC RC
3.3nF R2
0.1µF 4, 9 (Exposed Pad) 6 17k 24k
GND COMP
CP
Open
Table 1. Suggested Components Selection

VOUT (V) R1 (k) R2 (k) RC (k) CC (nF) L (H) COUT (F)
8 27 3 40 3.3 6.8 22 x 2
5 62 11.8 25 3.3 6.8 22 x 2
3.3 75 24 17 3.3 4.7 22 x 2
2.5 25.5 12 13 3.3 4.7 22 x 2
1.5 10.5 12 7 3.3 3.6 22 x 2
1.2 12 24 6 3.3 2 22 x 2
1 3 12 5 3.3 2 22 x 2

6
RT7237C
Typical Operating Characteristics
Efficiency vs. Load Current Reference Voltage vs. Input Voltage
100 0.820
90 0.815
80 VIN = 12V
Reference Voltage (V)

VIN = 17V 0.810
70
Efficiency (%)
60 0.805
50 0.800
40 0.795
30
0.790
20
0.785
10
VOUT = 3.3V VIN = 4.5V to 17V
0 0.780
0.001 0.01 0.1 1 10 4 6.6 9.2 11.8 14.4 17
Output Current (A) Input Voltage (V)
Reference Voltage vs. Temperature Output Voltage vs. Output Current

0.820 3.38
0.815 3.36
Reference Voltage (V)
0.810 3.34
Output Voltage (V)
0.805 3.32
0.800 3.30
0.795 3.28 VIN = 17V

VIN = 12V
0.790 3.26
0.785 3.24
VIN = 12V, VOUT = 3.3V VOUT = 3.3V
0.780 3.22
-50 -25 0 25 50 75 100 125 0 0.5 1 1.5 2
Temperature (°C) Output Current (A)
Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature

820 800
Switching Frequency (kHz)1
810 790
Switching Frequency (KHz)1
800 780
VIN = 12V
VIN = 17V
790 770
780 760
770 750
760 740
750 730
VIN = 4.5V to 17V, VOUT = 3.3V, IOUT = 0.6A VOUT = 3.3V, IOUT = 0.6A
740 720
4 6 8 10 12 14 16 18 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)

7
RT7237C
Output Current Limit vs. Temperature Output Current Limit vs. Input Voltage
5.0 5
4.5
Output Current Limit (A)

Output Current Limit (A)
4.0 4
3.5
3.0 3
2.5
2.0 2
1.5
VIN = 12V, VOUT = 3.3V VIN = 4.5V to 17V, VOUT = 3.3V
1.0 1
-50 -25 0 25 50 75 100 125 4 6 8 10 12 14 16 18
Temperature (°C) Input Voltage (V)
Load Transient Response Load Transient Response
VOUT VOUT
(200mV/Div) (200mV/Div)
IOUT IOUT
(1A/Div) (1A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 2A VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A
Time (100μs/Div) Time (100μs/Div)
Output Ripple Voltage Output Ripple Voltage
VOUT VOUT
(5mV/Div) (5mV/Div)
VSW VSW
(10V/Div) (10V/Div)
IL IL
(1A/Div) (1A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1A VIN = 12V, VOUT = 3.3V, IOUT = 2A
Time (500ns/Div) Time (500ns/Div)

8
RT7237C
Power On from VIN Power Off from VIN
VIN VIN
(5V/Div) (5V/Div)
VOUT VOUT
(2V/Div) (2V/Div)
IOUT IOUT
(2A/Div) (2A/Div)
Time (10ms/Div) Time (25ms/Div)
Power On from EN Power Off from EN
VEN VEN
(5V/Div) (5V/Div)
VOUT VOUT
(2V/Div) (2V/Div)
IOUT IOUT
(2A/Div) (2A/Div)
Time (10ms/Div) Time (10ms/Div)

9
RT7237C
Application Information
Output Voltage Setting Soft-Start
The resistive divider allows the FB pin to sense the output The RT7237C provides soft-start function. The soft-start
voltage as shown in Figure 1. function is used to prevent large inrush current while
VOUT converter is being powered-up. The soft-start timing can
be programmed by the external capacitor between SS and
R1 GND. An internal current source ISS (6μA) charges an
FB external capacitor to build a soft-start ramp voltage. The
RT7237C R2 VFB voltage will track the internal ramp voltage during soft-
GND start interval. The typical soft-start time is calculated as
follows :
Figure 1. Output Voltage Setting 0.8  CSS
Soft-Start time tSS = , if CSS capacitor
ISS
0.8  0.1
The output voltage is set by an external resistive voltage is 0.1F, then soft-start time = ≒ 13.5ms
divider according to the following equation : 6
VOUT = VREF  1 R1  Chip Enable Operation

 R2 
The EN pin is the chip enable input. Pulling the EN pin
Where VREF is the reference voltage (0.8V typ.).
low (<0.4V) will shut down the device. During shutdown
mode, the RT7237C quiescent current drops to lower than
External Bootstrap Diode
3μA. Driving the EN pin high (>2V, <18V) will turn on the
Connect a 0.1μF low ESR ceramic capacitor between the device again. For external timing control, the EN pin can
BOOT pin and SW pin. This capacitor provides the gate also be externally pulled high by adding a REN resistor
driver voltage for the high side MOSFET. and CEN capacitor from the VIN pin (see Figure 3).
It is recommended to add an external bootstrap diode EN
REN
between an external 5V and BOOT pin for efficiency VIN EN
improvement when input voltage is lower than 5.5V or duty RT7237C
CEN
ratio is higher than 65% .The bootstrap diode can be a
GND
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the Figure 3. Enable Timing Control
RT7237C. Note that the external boot voltage must be
lower than 5.5V An external MOSFET can be added to implement digital
control on the EN pin when no system voltage above 2V
5V
is available, as shown in Figure 4. In this case, a 100kΩ
pull-up resistor, REN, is connected between VIN and the
BOOT
EN pin. MOSFET Q1 will be under logic control to pull
RT7237C 0.1µF
down the EN pin.
SW REN
100k
VIN EN
EN Q1 RT7237C
Figure 2. External Bootstrap Diode
GND
Figure 4. Digital Enable Control Circuit

10
RT7237C
Under Voltage Protection Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
Hiccup Mode
ripple. High frequency with small ripple current can achieve
For the RT7237C, it provides Hiccup Mode Under Voltage the highest efficiency operation. However, it requires a
Protection (UVP). When the VFB voltage drops below 0.4V, large inductor to achieve this goal.
the UVP function will be triggered to shut down switching
For the ripple current selection, the value of ΔIL = 0.24(IMAX)
operation. If the UVP condition remains for a period, the
will be a reasonable starting point. The largest ripple
RT7237C will retry automatically. When the UVP condition
current occurs at the highest VIN. To guarantee that the
is removed, the converter will resume operation. The UVP
ripple current stays below the specified maximum, the
is disabled during soft-start period.
inductor value should be chosen according to the following
Hiccup Mode equation :
 VOUT   VOUT 
L =
f   I   1  VIN(MAX) 
 L(MAX)   
The inductor's current rating (caused a 40°C temperature
VOUT
(2V/Div) rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
ILX see Table 2 for the inductor selection reference.
(2A/Div) Table 2. Suggested Inductors for Typical
Application Circuit
IOUT = Short
Component Dimensions
Series
Time (50ms/Div) Supplier (mm)
Figure 5. Hiccup Mode Under Voltage Protection TDK VLF10045 10 x 9.7 x 4.5
TDK SLF12565 12.5 x 12.5 x 6.5
TAIYO
Over Temperature Protection NR8040 8x8x4
YUDEN
The RT7237C features an Over Temperature Protection
(OTP) circuitry to prevent from overheating due to
CIN and COUT Selection
excessive power dissipation. The OTP will shut down
switching operation when junction temperature exceeds The input capacitance, C IN, is needed to filter the
150°C. Once the junction temperature cools down by trapezoidal current at the source of the high side MOSFET.
approximately 20°C, the converter will resume operation. To prevent large ripple current, a low ESR input capacitor
To maintain continuous operation, the maximum junction sized for the maximum RMS current should be used. The
temperature should be lower than 125°C. approximate RMS current is given :
V VIN
IRMS = IOUT(MAX) OUT 1
Inductor Selection VIN VOUT
The inductor value and operating frequency determine the This formula has a maximum at VIN = 2VOUT, where
ripple current according to a specific input and output I RMS = I OUT/2. This simple worst case condition is
voltage. The ripple current ΔIL increases with higher VIN commonly used for design because even significant
and decreases with higher inductance. deviations do not offer much relief. Choose a capacitor
IL =  OUT   1 OUT 

V V rated at a higher temperature than required. Several
 f L   VIN  capacitors may also be paralleled to meet size or height
requirements in the design. For the input capacitor, two
10μF low ESR ceramic capacitors are suggested. For the

11
RT7237C
suggested capacitor, please refer to Table 3 for more θJA is 75°C/W on the standard JEDEC 51-7 four-layers
details. The selection of COUT is determined by the thermal test board. The maximum power dissipation at
required ESR to minimize voltage ripple. Moreover, the TA = 25°C can be calculated by following formula :
amount of bulk capacitance is also a key for COUT selection P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
to ensure that the control loop is stable. Loop stability (min.copper area PCB layout)
can be checked by viewing the load transient response
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
as described in a later section.
(70mm2copper area PCB layout)
The output ripple, ΔVOUT, is determined by :
The thermal resistance θJA of SOP-8 (Exposed Pad) is
VOUT  IL ESR  1 
 8fCOUT  determined by the package architecture design and the
The output ripple will be the highest at the maximum input PCB layout design. However, the package architecture
voltage since ΔIL increases with input voltage. Multiple design had been designed. If possible, it's useful to increase
capacitors placed in parallel may be needed to meet the thermal performance by the PCB layout copper design.
ESR and RMS current handling requirement. Higher values, The thermal resistance θJA can be decreased by adding
lower cost ceramic capacitors are now becoming available copper area under the exposed pad of SOP-8 (Exposed
in smaller case sizes. Their high ripple current, high voltage Pad) package.
rating and low ESR make them ideal for switching regulator As shown in Figure 6, the amount of copper area to which
applications. However, care must be taken when these the SOP-8 (Exposed Pad) is mounted affects thermal
capacitors are used at input and output. When a ceramic performance. When mounted to the standard
capacitor is used at the input and the power is supplied SOP-8 (Exposed Pad) pad (Figure 6.a), θJA is 75°C/W.
by a wall adapter through long wires, a load step at the Adding copper area of pad under the SOP-8 (Exposed
output can induce ringing at the input, VIN. At best, this Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further,
ringing can couple to the output and be mistaken as loop increasing the copper area of pad to 70mm2 (Figure 6.e)
instability. At worst, a sudden inrush of current through reduces the θJA to 49°C/W.
the long wires can potentially cause a voltage spike at
The maximum power dissipation depends on the operating
VIN large enough to damage the part.
ambient temperature for fixed T J(MAX) and thermal
Thermal Considerations resistance, θJA. The derating curve in Figure 7 of derating
curves allows the designer to see the effect of rising
For continuous operation, do not exceed the maximum
ambient temperature on the maximum power dissipation
operation junction temperature 125°C. The maximum
allowed.
power dissipation depends on the thermal resistance of 2.2
IC package, PCB layout, the rate of surroundings airflow Four-Layer PCB
2.0
and temperature difference between junction to ambient. 1.8
Power Dissipation (W)
The maximum power dissipation can be calculated by 1.6 Copper Area

70mm2
following formula : 1.4
50mm2
1.2 30mm2
PD(MAX) = (TJ(MAX) − TA ) / θJA 10mm2
1.0
Min.Layout
Where T J(MAX) is the maximum operation junction 0.8
temperature , TA is the ambient temperature and the θJA is 0.6
the junction to ambient thermal resistance. 0.4
0.2
For recommended operating condition specifications, the
0.0
maximum junction temperature is 125°C. The junction to 0 25 50 75 100 125
ambient thermal resistance θJA is layout dependent. For Ambient Temperature (°C)
SOP-8 (Exposed Pad) package, the thermal resistance Figure 7. Derating Curve of Maximum Power Dissipation

12
RT7237C
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT7237C.
 Keep the traces of the main current paths as short and
wide as possible.
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W  Put the input capacitor as close as possible to the device
pins (VIN and GND).
 SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pick-up.
 Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
(b) Copper Area = 10mm2, θJA = 64°C/W components near the RT7237C.
 An example of PCB layout guide is shown in Figure 8
for reference.
(c) Copper Area = 30mm2 , θJA = 54°C/W
(d) Copper Area = 50mm2 , θJA = 51°C/W
(e) Copper Area = 70mm2 , θJA = 49°C/W
Figure 6. Thermal Resistance vs. Copper Area Layout

Design

13
RT7237C
GND VIN SW GND VIN
The feedback components
must be connected as close
CBOOT REN to the device as possible.
Input capacitor must CSS
CIN CC
be placed as close
BOOT 8 SS
to the IC as possible.
VIN 2 7 EN CP RC
L GND
VOUT SW 3 6 COMP
9 R1
GND 4 5 FB
R2
VOUT
COUT
GND
SW node is with high frequency voltage swing and should
be kept at small area. Keep analog components away from
the SW node to prevent stray capacitive noise pick-up
Figure 8. PCB Layout Guide
Table 3. Suggested Capacitors for CIN and COUT

Location Component Supplier Part No. Capacitance (F) Case Size
CIN MURATA GRM31CR61E106K 10 1206
CIN TDK C3225X5R1E106K 10 1206
CIN TAIYO YUDEN TMK316BJ106ML 10 1206
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C22M 22 1210

14
RT7237C
Outline Dimension
H
A
EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B
C
I
D
Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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2A, 18V, 800kHz Synchronous Step-Down Converter

Simplified Application Circuit

VIN VIN BOOT

DS7237C-05 February 2015 www.richtek.com

Functional Pin Description

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Lockout Comparator Current Sense Amplifier

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Recommended Operating Conditions (Note 4)

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Table 1. Suggested Components Selection

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Reference Voltage (V)

Reference Voltage vs. Temperature Output Voltage vs. Output Current

0.795 3.28 VIN = 17V

Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature

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Output Current Limit (A)

Load Transient Response Load Transient Response

Time (100μs/Div) Time (100μs/Div)

Output Ripple Voltage Output Ripple Voltage

Time (500ns/Div) Time (500ns/Div)

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Power On from VIN Power Off from VIN

Time (10ms/Div) Time (25ms/Div)

Power On from EN Power Off from EN

Time (10ms/Div) Time (10ms/Div)

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VOUT = VREF  1 R1  Chip Enable Operation

Figure 4. Digital Enable Control Circuit

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IL =  OUT   1 OUT 

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The maximum power dissipation can be calculated by 1.6 Copper Area

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(c) Copper Area = 30mm2 , θJA = 54°C/W

(d) Copper Area = 50mm2 , θJA = 51°C/W

(e) Copper Area = 70mm2 , θJA = 49°C/W

Figure 6. Thermal Resistance vs. Copper Area Layout

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Figure 8. PCB Layout Guide

Table 3. Suggested Capacitors for CIN and COUT

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EXPOSED THERMAL PAD Y

Dimensions In Millimeters Dimensions In Inches

8-Lead SOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

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