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RT8292B

2A, 23V, 1.2MHz Synchronous Step-Down Converter

General Description Features
The RT8292B is a high efficiency, monolithic synchronous  ±1.5% High Accuracy Feedback Voltage
step-down DC/DC converter that can deliver up to 2A  4.5V to 23V Input Voltage Range
output current from a 4.5V to 23V input supply. The  2A Output Current
RT8292B's current mode architecture and external  Integrated N-MOSFET Switches
compensation allow the transient response to be  Current Mode Control
optimized over a wide range of loads and output  Fixed Frequency Operation : 1.2MHz
capacitors. Cycle-by-cycle current limit provides  Adjustable Output from 0.8V to 15V
protection against shorted outputs and soft-start  Up to 95% Efficiency
eliminates input current surge during start-up. The  Programmable Soft-Start
RT8292B also provides under voltage protection and  Stable with Low ESR Ceramic Output Capacitors
thermal shutdown protection. The low current (<3μA)  Cycle-by-Cycle Over Current Protection
shutdown mode provides output disconnction, enabling  Input Under Voltage Lockout
easy power management in battery-powered systems.  Output Under Voltage Protection
The RT8292B is available in a SOP-8 (Exposed Pad)  Thermal Shutdown Protection
package.  RoHS Compliant and Halogen Free

Applications
Ordering Information
RT8292B  Wireless AP/Router
Package Type  Set-Top-Box
SP : SOP-8 (Exposed Pad-Option 1)  Industrial and Commercial Low Power Systems
Lead Plating System  LCD Monitors and TVs
G : Green (Halogen Free and Pb Free)  Green Electronics/Appliances
Z : ECO (Ecological Element with  Point of Load Regulation of High-Performance DSPs
Halogen Free and Pb free)
H : UVP Hiccup Pin Configurations
L : UVP Latch-Off
(TOP VIEW)
Note :
Richtek products are : BOOT 8 SS
 RoHS compliant and compatible with the current require- VIN 2 7 EN
GND
ments of IPC/JEDEC J-STD-020. SW 3 6 COMP
9
 Suitable for use in SnPb or Pb-free soldering processes. GND 4 5 FB

SOP-8 (Exposed Pad)

Marking Information
RT8292BxGSP RT8292BxZSP
RT8292BxGSP : Product Number RT8292BxZSP : Product Number
RT8292Bx x : H or L RT8292Bx x : H or L
GSPYMDNN ZSPYMDNN
YMDNN : Date Code YMDNN : Date Code

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RT8292B
Typical Application Circuit

VIN 2 1
VIN BOOT
4.5V to 23V CIN CBOOT L
10µF RT8292B 100nF 3.6µH
VOUT
SW 3
3.3V/2A
REN 100k 7 EN R1
75k
8 SS COUT
FB 5 22µF x 2
CSS CC RC
0.82nF 32k R2
0.1µF 4, 9 (Exposed Pad) 6 24k
GND COMP

CP
Open

Table 1. Recommended Component Selection

VOUT (V) R1 (k) R2 (k) RC (k) CC (nF) L (H) COUT (F)
8 27 3 75 0.82 10 22 x 2
5 62 11.8 47 0.82 6.8 22 x 2
3.3 75 24 32 0.82 3.6 22 x 2
2.5 25.5 12 25.5 0.82 3.6 22 x 2
1.5 10.5 12 15 0.82 2 22 x 2
1.2 12 24 12 0.82 2 22 x 2
1 3 12 10 0.82 2 22 x 2

Functional Pin Description

Pin No. Pin Name Pin Function
Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic
1 BOOT
capacitor from BOOT to SW pins.
Input Supply Voltage 4.5V to 23V. Must bypass with a suitably large ceramic
2 VIN
capacitor.
3 SW Switch Node. Connect this pin to an external L-C filter.
4, Ground. The exposed pad must be soldered to a large PCB and connected to
GND
9 (Exposed Pad) GND for maximum power dissipation.
Feedback Input. This pin is connected to the converter output. It is used to set
the output of the converter to regulate to the desired value via an internal
5 FB
resistive voltage divider. For an adjustable output, an external resistive
voltage divider is connected to this pin.
Compensation Node. COMP is used to compensate the regulation control
6 COMP loop. Connect a series RC network from COMP to GND. In some cases, an
additional capacitor from COMP to GND is required.
Chip Enable (Active High). A logic low forces the RT8292B into shutdown
7 EN mode reducing the supply current to less than 3A. Attach this pin to VIN with
a 100k pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor
8 SS from SS to GND to set the soft-start period. A 0.1F capacitor sets the
soft-start period to 13.5ms.

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 RT8292B
Function Block Diagram

VIN

Internal
Regulator Oscillator
Current Sense
Shutdown Slope Comp Amplifier
Comparator VA VCC + VA
Foldback
1.2V + Control -
-
0.4V + BOOT
Lockout -
Comparator UV S Q 130m
5k Comparator SW
EN - +
R Q 130m
2.7V + -
3V Current GND
Comparator
VCC

6µA
0.8V +
SS +EA
-

FB COMP

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RT8292B
Absolute Maximum Ratings (Note 1)
 Supply Voltage, VIN ------------------------------------------------------------------------------------------------- −0.3V to 25V
 Input Voltage, SW --------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
 VBOOT - VSW ----------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Other Pin Voltages ------------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W

Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W

SOP-8 (Εxposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C
 Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
 Storage Temperature Range -------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)

HBM (Human Body Mode) ---------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 23V
 Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Shutdown Supply Current VEN = 0V -- 0.5 3 A
Supply Current VEN = 3V, VFB = 0.9V -- 0.8 1.2 mA
Feedback Voltage VFB 4.5V  VIN 23V 0.788 0.8 0.812 V
Error Amplifier
GEA IC = ±10A -- 940 -- A/V
Transconductance
High Side Switch
RDS(ON)1 -- 130 -- m
On-Resistance
Low Side Switch
RDS(ON)2 -- 130 -- m
On-Resistance
High Side Switch Leakage
VEN = 0V, VSW = 0V -- 0 10 A
Current
Upper Switch Current Limit Min. Duty Cycle, V BOOT  VSW = 4.8V -- 4.3 -- A
Lower Switch Current Limit From Drain to Source -- 1.3 -- A
COMP to Current Sense
GCS -- 4 -- A/V
Transconductance
Oscillation Frequency fOSC1 1 1.2 1.4 MHz
Short Circuit Oscillation
fOSC2 VFB = 0V -- 270 -- kHz
Frequency
Maximum Duty Cycle DMAX VFB = 0.7V -- 75 -- %
Minimum On Time tON -- 100 -- ns

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 RT8292B
Parameter Symbol Test Conditions Min Typ Max Unit

EN Input Threshold Logic-High V IH 2.7 -- 5.5

V
Voltage Logic-Low V IL -- -- 0.4
Input Under Voltage Lockout Threshold V UVLO VIN Rising 3.8 4.2 4.5 V
Input Under Voltage Lockout Hysteresis V UVLO -- 320 -- mV
Soft-Start Current ISS VSS = 0V -- 6 -- A
Soft-Start Period tSS CSS = 0.1F -- 13.5 -- ms
Thermal Shutdown TSD -- 150 -- C

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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RT8292B
Typical Operating Characteristics
Efficiency vs. Output Current Reference Voltage vs. Input Voltage
100 0.820
90 0.815
80

Reference Voltage (V)

0.810
70 VIN = 12V
Efficiency (%)

VIN = 23V 0.805

60
50 0.800
40 0.795
30
0.790
20
0.785
10
VOUT = 3.3V
0 0.780
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 4 6 8 10 12 14 16 18 20 22 24
Output Current (A) Input Voltage (V)

Reference Voltage vs. Temperature Output Voltage vs. Output Current

0.820 3.34

0.815 3.33
Reference Voltage (V)

0.810 3.32
Output Voltage (V)

0.805 3.31

0.800 3.30
VIN = 23V
0.795 3.29 VIN = 12V
0.790 3.28

0.785 3.27
VOUT = 3.3V
0.780 3.26
-50 -25 0 25 50 75 100 125 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Temperature (C) Output Current (A)

Switching Frequency vs. Input Voltage Switching Frequency vs. Temperature

1.30 1.40
1.28 1.35
Switching Frequency (MHz)1

Switching Frequency (MHz)1

1.26 1.30
1.24 1.25
1.22 1.20
1.20 1.15
1.18 1.10
1.16 1.05
1.14 1.00
1.12 0.95
VOUT = 3.3V, IOUT = 0A VIN = 12V, VOUT = 3.3V, IOUT = 0A
1.10 0.90
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (C)

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 RT8292B

Output Current Limit vs. Input Voltage Current Limit vs.Temperature

6.0 5.50
5.5 5.25
5.0 5.00
Output Current Limit (A)

4.5 4.75

Current Limit (A)

4.0 4.50
3.5 4.25
3.0 VOUT = 3.3V 4.00
VOUT = 3.3V (Add Bootstrap Diode)
2.5 VOUT = 1.2V 3.75
2.0 3.50
1.5 3.25
1.0 3.00
0.5 2.75
VIN = 12V, VOUT = 3.3V
0.0 2.50
4 6 8 10 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (C)

Load Transient Response Load Transient Response

VOUT VOUT
(50mV/Div) (50mV/Div)

IOUT IOUT
(1A/Div) (1A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 0A to 2A VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A

Time (100μs/Div) Time (100μs/Div)

Switching Switching

VOUT VOUT
(10mV/Div) (10mV/Div)

IL IL
(1A/Div) (1A/Div)

VSW VSW
(10V/Div) (10V/Div)

VIN = 12V, IOUT = 1A VIN = 12V, IOUT = 2A

Time (500ns/Div) Time (500ns/Div)

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RT8292B

Power On from VIN Power Off from VIN

VIN VIN
(5V/Div) (5V/Div)

VOUT
(2V/Div) VOUT
(2V/Div)

IL IL
(2A/Div) (2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 2A

Time (5ms/Div) Time (5ms/Div)

Power On from EN Power Off from EN

VEN VEN
(5V/Div) (5V/Div)

VOUT VOUT
(2V/Div) (2V/Div)

IL IL
(2A/Div) (2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 2A VIN = 12V, VOUT = 3.3V, IOUT = 2A

Time (5ms/Div) Time (5ms/Div)

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 RT8292B
Application Information
The RT8292B is a synchronous high voltage buck converter Soft-Start
that can support the input voltage range from 4.5V to 23V The RT8292B contains an external soft-start clamp that
and the output current can be up to 2A. gradually raises the output voltage. The soft-start timing
can be programmed by the external capacitor between
Output Voltage Setting
SS pin and GND. The chip provides a 6μA charge current
The resistive voltage divider allows the FB pin to sense
for the external capacitor. If 0.1μF capacitor is used to set
the output voltage as shown in Figure 1.
the soft-start, the period will be 13.5ms (typ.).
VOUT
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin
R1
low (<0.4V) will shut down the device. During shutdown
FB
RT8292B
mode, the RT8292B quiescent current will drops below
R2
GND 3μA. Driving the EN pin high (>2.7V, < 5.5V) will turn on
the device again. For external timing control (e.g.RC),
Figure 1. Output Voltage Setting the EN pin can also be externally pulled high by adding a
R EN* resistor and C EN* capacitor from the VIN pin
The output voltage is set by an external resistive voltage (see Figure 5).
divider according to the following equation :
An external MOSFET can be added to implement digital
VOUT = VFB  1 R1  control on the EN pin when no system voltage above 2.5V
 R2  is available, as shown in Figure 3. In this case, a 100kΩ
where VFB is the feedback reference voltage (0.8V typ.). pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
External Bootstrap Diode down the EN pin.
Connect a 100nF low ESR ceramic capacitor between 2 1
VIN VIN BOOT
the BOOT pin and SW pin. This capacitor provides the CIN RT8292B
CBOOT VOUT
REN
gate driver voltage for the high side MOSFET. 100k L
7 EN SW 3
Chip Enable
R1
It is recommended to add an external bootstrap diode Q1 COUT

between an external 5V and BOOT pin for efficiency 8 SS FB 5

improvement when input voltage is lower than 5.5V or duty CSS 4, CC RC R2

6
9 (Exposed Pad) COMP
ratio is higher than 65% .The bootstrap diode can be a GND CP

low cost one such as IN4148 or BAT54. The external 5V

can be a 5V fixed input from system or a 5V output of the
Figure 3. Enable Control Circuit for Logic Control with
RT8292B. Note that the external boot voltage must be
Low Voltage
lower than 5.5V.
To prevent enabling circuit when VIN is smaller than the
5V VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
the EN pin to adjust IC lockout threshold, as shown in
BOOT Figure 4. For example, if an 8V output voltage is regulated
RT8292B 100nF from a 12V input voltage, the resistor, REN2, can be
SW selected to set input lockout threshold larger than 8V.

Figure 2. External Bootstrap Diode

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RT8292B
VIN 2 1 ripple current stays below the specified maximum, the
VIN BOOT VOUT
12V CIN
REN1 10µF RT8292B CBOOT 8V inductor value should be chosen according to the following
100k L
7 EN SW 3
equation :
REN2 R1 COUT  VOUT   VOUT 
L =
f   I   1  VIN(MAX) 
8 SS FB 5  L(MAX)   
CSS 4, CC RC R2
6
9 (Exposed Pad) COMP The inductor's current rating (caused a 40°C temperature
GND CP
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
Figure 4. The Resistors can be Selected to Set IC be greater than the short circuit peak current limit. Please
Lockout Threshold see Table 2 for the inductor selection reference.

Hiccup Mode Table 2. Suggested Inductors for Typical

For the RT8292BH, Hiccup Mode Under Voltage Protection Application Circuit
Component Dimensions
(UVP) it provides. When the FB voltage drops below half Series
Supplier (mm)
of the feedback reference voltage, VFB, the UVP function
TDK VLF10045 10 x 9.7 x 4.5
will be triggered and the RT8292BH will shut down for a
TDK SLF12565 12.5 x 12.5 x 6.5
period of time and then recover automatically. The Hiccup
TAIYO
Mode UVP can reduce input current in short-circuit NR8040 8x8x4
YUDEN
conditions.
CIN and COUT Selection
Latch-Off Mode
The input capacitance, C IN, is needed to filter the
For the RT8292BL, Latch-Off Mode Under Voltage trapezoidal current at the source of the high side MOSFET.
Protection (UVP) it provides. When the FB voltage drops To prevent large ripple current, a low ESR input capacitor
below half of the feedback reference voltage, VFB, UVP sized for the maximum RMS current should be used. The
will be triggered and the RT8292BL will shut down in Latch- RMS current is given by :
Off Mode. In shutdown condition, the RT8292BL can be
V VIN
reset via the EN pin or power input VIN. IRMS = IOUT(MAX) OUT 1
VIN VOUT
Inductor Selection
This formula has a maximum at VIN = 2VOUT, where
The inductor value and operating frequency determine the I RMS = I OUT /2. This simple worst-case condition is
ripple current according to a specific input and output commonly used for design because even significant
voltage. The ripple current ΔIL increases with higher VIN deviations do not offer much relief.
and decreases with higher inductance :
Choose a capacitor rated at a higher temperature than
IL =  OUT   1 OUT 
V V required. Several capacitors may also be paralleled to
 f L   VIN 
meet size or height requirements in the design.

Having a lower ripple current reduces not only the ESR For the input capacitor, one 10μF low ESR ceramic
losses in the output capacitors but also the output voltage capacitors are recommended. For the recommended
ripple. High frequency with small ripple current can achieve capacitor, please refer to table 3 for more detail.
highest efficiency operation. However, it requires a large The selection of COUT is determined by the required ESR
inductor to achieve this goal. to minimize voltage ripple.
For the ripple current selection, the value of ΔIL = 0.24(IMAX) Moreover, the amount of bulk capacitance is also a key
will be a reasonable starting point. The largest ripple for COUT selection to ensure that the control loop is stable.
current occurs at the highest VIN. To guarantee that the Loop stability can be checked by viewing the load transient
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 RT8292B
response as described in a later section. and be mistaken as loop instability. At worst, a sudden
The output ripple, ΔVOUT , is determined by : inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
VOUT  IL ESR  1 
part.
 8fCOUT 

The output ripple will be highest at the maximum input Checking Transient Response
voltage since ΔIL increases with input voltage. Multiple The regulator loop response can be checked by looking
capacitors placed in parallel may be needed to meet the at the load transient response. Switching regulators take
ESR and RMS current handling requirement. Dry tantalum, several cycles to respond to a step in load current. When
special polymer, aluminum electrolytic and ceramic a load step occurs, VOUT immediately shifts by an amount
capacitors are all available in surface mount equal to ΔILOAD (ESR) and COUT also begins to be charged
packages.Special polymer capacitors offer very low ESR or discharged to generate a feedback error signal for the
value. However, it provides lower capacitance density than regulator to return VOUT to its steady-state value. During
other types. Although Tantalum capacitors have the highest this recovery time, VOUT can be monitored for overshoot or
capacitance density, it is important to only use types that ringing that would indicate a stability problem.
pass the surge test for use in switching power supplies.
EMI Consideration
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications Since parasitic inductance and capacitance effects in PCB
for ripple current rating and long term reliability circuitry would cause a spike voltage on SW pin when
considerations. Ceramic capacitors have excellent low high side MOSFET is turned-on/off, this spike voltage on
ESR characteristics but can have a high voltage coefficient SW may impact on EMI performance in the system. In
and audible piezoelectric effects. The high Q of ceramic order to enhance EMI performance, there are two methods
capacitors with trace inductance can also lead to significant to suppress the spike voltage. One way is by placing an
ringing. R-C snubber between SW and GND and locating them as
close as possible to the SW pin (see Figure 5). Another
Higher values, lower cost ceramic capacitors are now
method is by adding a resistor in series with the bootstrap
becoming available in smaller case sizes. Their high ripple
capacitor, CBOOT, but this method will decrease the driving
current, high voltage rating and low ESR make them ideal
capability to the high side MOSFET. It is strongly
for switching regulator applications. However, care must
recommended to reserve the R-C snubber during PCB
be taken when these capacitors are used at input and
layout for EMI improvement. Moreover, reducing the SW
output. When a ceramic capacitor is used at the input
trace area and keeping the main power in a small loop will
and the power is supplied by a wall adapter through long
be helpful on EMI performance. For detailed PCB layout
wires, a load step at the output can induce ringing at the
guide, please refer to the section Layout Considerations.
input, VIN. At best, this ringing can couple to the output
RBOOT*
VIN 2 1
VIN BOOT
4.5V to 23V CIN CBOOT L
10µF RT8292B
REN* 100nF 3.6µH VOUT
Chip Enable SW 3
7 EN 3.3V/2A
RS*
CEN* R1 COUT
CS* 75k 22µFx2
8 SS
FB 5
CSS 4, CC
0.1µF 9 (Exposed Pad) RC R2
0.82nF 32k
GND 6 24k
COMP

CP
* : Optional NC
Figure 5. Reference Circuit with Snubber and Enable Timing Control
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RT8292B
Thermal Considerations resistance θJA. For RT8292B packages, the derating curves
For continuous operation, do not exceed the maximum in Figure 7 allows the designer to see the effect of rising
operation junction temperature 125°C. The maximum ambient temperature on the maximum power dissipation .
power dissipation depends on the thermal resistance of 2.2
Four-Layer PCB
IC package, PCB layout, the rate of surroundings airflow 2.0

and temperature difference between junction to ambient. 1.8

Power Dissipation (W)

1.6 Copper Area
The maximum power dissipation can be calculated by 70mm2
1.4 50mm2
following formula :
1.2 30mm2
PD(MAX) = (TJ(MAX) − TA ) / θJA 1.0 10mm2
Min.Layout
where T J(MAX) is the maximum operation junction 0.8
0.6
temperature , TA is the ambient temperature and the θJA is
0.4
the junction to ambient thermal resistance.
0.2
For recommended operating conditions specification of 0.0
RT8292B, the maximum junction temperature is 125°C. 0 25 50 75 100 125

The junction to ambient thermal resistance θJA is layout Ambient Temperature (°C)
dependent. For SOP-8 (Exposed Pad) package, the Figure 7. Derating Curves for RT8292B Package
thermal resistance θJA is 75°C/W on the standard JEDEC
51-7 four-layer thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
(min.copper area PCB layout)
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
(70mm2copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(b) Copper Area = 10mm2, θJA = 64°C/W
(Exposed Pad) package.
As shown in Figure 6, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 6.a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 6.e) (c) Copper Area = 30mm2 , θJA = 54°C/W
reduces the θJA to 49°C/W.
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
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 RT8292B

(d) Copper Area = 50mm2 , θJA = 51°C/W (e) Copper Area = 70mm2 , θJA = 49°C/W

Figure 6. Themal Resistance vs. Copper Area Layout Design

Layout Considerations
For best performance of the RT8292B, the following layout guidelines must be strictly followed.
 Input capacitor must be placed as close to the IC as possible.
 SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.
 The feedback components must be connected as close to the device as possible

GND VIN SW GND The feedback components

must be connected as close
CIN to the device as possible.
Input capacitor must CSS CC
be placed as close
BOOT 8 SS
to the IC as possible. REN VIN
VIN 2 7 EN CP RC
GND
SW 3 6 COMP
RS CS R1
9
GND 4 5 FB
COUT
R2
L1 VOUT
SW should be connected to inductor by
wide and short trace. Keep sensitive
VOUT components away from this trace. GND

Figure 8. PCB Layout Guide

Table 3. Suggested Capacitors for CIN and COUT

Location Component Supplier Part No. Capacitance (F) Case Size
CIN MURATA GRM31CR61E106K 10 1206
CIN TDK C3225X5R1E106K 10 1206
CIN TAIYO YUDEN TMK316BJ106ML 10 1206
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C22M 22 1210

Copyright © 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8292B-03 March 2011 www.richtek.com

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RT8292B
Outline Dimension
H
A

EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B

C
I
D

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com DS8292B-03 March 2011
14