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    Internal I Dpco

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    Internal I Dpco

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    maheshwari
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    Internal i Dpco

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    Internal I Dpco

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    Register Number:

    INTERNAL TEST I Date/Session 19.09.2024/FN Marks 50


    Course code CS3351 Course Title Digital Principles and Computer Orgonization
    Regulation 2021 Duration 1:30 Hours Academic Year 2024-2025
    CSE, AI&DS,
    Year II Semester III Department
    CSE(CS), IT
    COURSE OUTCOMES
    CO1: To analyze and design combinational circuits.
    CO2: To analyze and design sequential circuits
    CO3: To understand the basic structure and operation of a digital computer.
    CO4: To study the design of data path unit, control unit for processor and to familiarize with the
    hazards.
    CO5: To understand the concept of various memories and I/O interfacing.

    Q.No. Question CO BTS


    PART A
    (Answer all the Questions 10 x 2 = 20 Marks)
    1 Define Karnaugh map. CO1 R
    2 What is a priority encoder? CO1 U
    3 Define Combinational circuit. CO1 R
    4 Draw the circuit for 2 to 1 multiplexer circuit. and Give functional b 2 * 1 MUX CO1 R
    5 List the advantages and disadvantages of BCD code CO1 U
    6 Draw 1:8 Demultiplexer using two 1:4 Demultiplexer. CO1 R
    7 What is magnitude comparator? CO1 U
    8 What is flip-flop? CO2 U
    9 What is meant by triggering of Flip flop? CO2 U
    10 Define SR Flip flop. CO2 U
    PART B
    (Answer all the Questions 5 x 13 = 65 Marks)
    11a i.Design a 4 bit adder / subtractor circuit and explain.
    ii.What is BCD adder? Design an adder to perform arithmetic addition of two CO1
    decimal digits in BCD. U
    OR
    11b Simplify the following switching functions using Karnaugh map method and realize
    expression using gates F(A,B,C,D) = Σ(0,3,5,7,8,9,10,12,15). CO1 A
    12a Simplify the Boolean function in SOP and POS F(A,B,C,D)=∑m(0,1,2,5,8,9,10).
    (ii) plot the following Boolean function in k-map and simplify it. F(w,x,y,z) =
    ∑m(0,1,2,4,5,6,8,9,12,13,14). CO1 A

    OR
    12b Explain the operation of JK FF, SR FF, T -FF and D-FF with a neat diagram. Also
    discuss their characteristic equation and excitation table. CO2 E

    Course Faculty HoD Principal


    (P.MAHESHWARI) (S.PRABAKARAN) (Dr. M. VIJAYAKUMAR)
    Register Number:

    INTERNAL TEST I Date/Session 19.09.2024/FN Marks 50


    Course code CS3351 Course Title Digital Principles and Computer Orgonization
    Regulation 2021 Duration 1:30 Hours Academic Year 2024-2025
    CSE, AI&DS,
    Year II Semester III Department
    CSE(CS), IT
    COURSE OUTCOMES
    CO1: To analyze and design combinational circuits.
    CO2: To analyze and design sequential circuits
    CO3: To understand the basic structure and operation of a digital computer.
    CO4: To study the design of data path unit, control unit for processor and to familiarize with the
    hazards.
    CO5: To understand the concept of various memories and I/O interfacing.

    Q.No. Question CO BTS


    PART A
    (Answer all the Questions 10 x 2 = 20 Marks)
    1 Define the NOR operation with a truth table. CO1 R
    2 Prove the following using Demorgan’ theorem [(X+Y)’+(X+Y)’]’= X+Y CO1 U
    3 State and prove the consensus theorem. CO1 R
    4 Simplify the expression: X = (A’+B)(A+B+D)D’. CO1 R
    5 What is the significance of BCD code. CO1 U
    6 What are Universal Gates? Why are they called so? CO1 R
    7 Define Karnaugh map. CO1 U
    8 What is edge triggered flip flop? CO2 U
    9 What is meant by triggering of Flip flop? CO2 U
    10 Define SR Flip flop. CO2 U
    PART B
    (Answer all the Questions 5 x 13 = 65 Marks)
    11a Simply the function F(w,x,y,z)= ∑m(2,3,12,13,14,15) using K- map .Implement the
    simplified using gates. CO1 U
    OR
    11b Design a code converter thet converts a 8421 to BCD code. CO1 A
    12a Explain in detail about Encoders and Decoders. CO1 A
    OR
    12b Design and implement the S-R Flip flop using NOR,NAND Gates CO2 E

    Course Faculty HoD Principal


    (P.MAHESHWARI) (S.PRABAKARAN) (Dr. M. VIJAYAKUMAR)

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