B.

Tech II-CO-Unit II- CO Tutorials2

Ref 1. “Computer Organization,” by Carl Hamacher, Zvonko Vranesic and

Safwat Zaky. Fifth Edition McGraw-Hill, 2002. (Chapter 2-problems -pps.
98-102)

1) Represent the decimal values 5, —2,14, —10,26, —19,51, and —

43, as signed, 7-bit numbers in the following binary formats:
(a) Sign-and-magnitude
(b) I's-complement
(c) 2's-complement
(

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2) (a) Convert the following pairs of decimal numbers to 5-bit,
signed, 2's-complement,binary numbers and add them. State
whether or not overflow occurs in each case.
(a) 5 and 10
(b) 1 and 13
(c) -14 and 11
(d) -5 and 7
(e) -3 and-8
(f) -10 and-13
(b) Repeat Part a for the subtract operation, where the second
number of each pair is to be subtracted from the first number.
State whether or not overflow occurs in each case.

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3) Given a binary pattern in some memory location, is it possible
to tell whether this pattern represents a machine instruction or
a number?

4) A memory byte location contains the pattern 00101100.What

does this pattern represent when interpreted as a binary
number? What does it represent as an ASGI code?

5) Consider a computer that has a byte-addressable memory

organized in 32-bit words according to the big-endian scheme. A
program reads ASCII characters entered at a keyboard and
stores them in successive byte locations, starting at location
1000. Show the contents of the two memory words at
locations 1000 and 1004 after the name "Johnson" has been
entered.

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6) Repeat Problem 2.5 for the little-endian scheme.

7) A program reads ASCII characters representing the digits

of a decimal numbers they are entered at a key board and
stores the characters in successive memory bytes. Examine the
ASCII code in Appendix E and indicate what operation is needed
to convert each character into an equivalent binary number.

8) Write a program that can evaluate the expression

AxB+CxD
In a single accumulator processor. Assume that the processor
has Load, Store, Multiply , and Add instructions, and that all
values fit in the accumulator.

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9)The list of student marks shown in Figure 2.14 is changed to
contain test scores for each student. Assume that there are n
students. Write an assembly language program for computing
the sums of the scores on each test and store these sums in the
memory word locations at addresses SUM, SUM 4, SUM -f
8.....number of tests, j, is larger than the number of registers in
the processor, so the type of program shown in Figure 2.1S for
the 3-test case cannot be used. Use two nested loops, as
suggested in Section 2.5.3. The inner loop should accumulate the
sum for a particular test, and the outer loop should run over the
number of tests, j. Assume that’s j is stored in memory location
J, placed ahead of location N.

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10)(a) Rewrite the dot product program in Figure 2.33 for an
instruction set in which the arithmetic and logic operations can
only be applied to operands in processor registers. The two
instructions Load and Store are used to transfer operands
between registers and the memory.

(b) Calculate the values of the constants k1 and k2 in the

expression k1+k2n, which represents the number of memory
accesses required to execute your program for Part a, including
instruction word fetches. Assume that each instruction occupies
a single word.

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11)Repeat Problem 2.10for a computer with two-address
instructions, which can perform operations such as
A [A]+[B]
where A and B can be either memory locations or processor
registers. Which computer requires fewer memory accesses?
(Chapter 8 on pipelining gives a different perspective on the
answer to this question.)

12)"Having a large number of processor registers makes it

possible to reduce the number of memory accesses needed to
perform complex tasks." Devise a simple computational task to
show the validity of this statement for a processor that has
four registers compared to another that has only two registers.

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13) Registers R1 andR2of a computer contain the decimal values
1200 and 4600. What is the effective address of the memory
operand in each of the following instructions?
(a) Load 20(R1),R5
(b) Move #3000,R5
(c) Store R5,30(R1,R2)
(d) Add . -(R2),R5
(e) Subtract (R1)+,R5

14) Assume that the list of student test scores shown in Figure
2.14 is stored in the memory as a linked list as shown in Figure
2.36. Write an assembly language program that accomplishes
the same thing as the program in Figure 2.15. The head record
is stored at memory location 1000.

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15)Consider an array of numbers where i = 0 through n - 1
is the row index, and J = 0 through m - 1 is the column index.
The array is stored in the memory of a computer one row after
another, with elements of each row occupying m successive word
locations. Assume that the memory is byte-addressable and that
the word length is 32 bits. Write a subroutine for adding column
x to column y, element by element, leaving the sum elements in
column y. The indices x and y are passed to the subroutine in
registers R1 and R2. The parameters n and m are passed to the
subroutine in registers R3 and R4, and the address of element
A(0,0) is passed in register RO. Any of the addressing modes in
Table 2.1 can be used. At most, one operand of an instruction
can be in the memory.

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16)Both of the following statements cause the value 300 to be
stored in location 1000, but at different times.
ORIGIN 1000
DATAWORD 300 and
Move #300,1000
Explain the difference.

17)Register RS is used in a program to point to the top of a

stack. Write a sequence of instructions using the Index, Auto
increment, and Auto decrement addressing modes to perform
each of the following tasks;
(a) Pop the top two items off the stack, add them, and then
push the result onto the stack.
(b) Copy the fifth item from the top into register R3.
(c) Remove flie top ten items from the stack.

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18)A FIFO queue of bytes is to be implemented in the memory, occupying a
fixed region of k bytes. You need two pointers, an IN pointer and an OUT
pointer. The IN pointer keeps track of the location where die next byte is
to be upended to the queue, and the OUT pointer keeps track of the
location containing the next byte to be removed from the queue.
(a)Asdataitemsareaddedtothequeue,theyareaddedatsuccessivelyhi
gheraddresses until the end of the memory region is reached. What
happens next, when a new item is to be added to the queue?
(b) Choose a suitable definition for the IN and OUT pointers,
indicating what they point to in the data structure. Use a simple diagram to
illustrate your answer.
(c)Showthatifthestateofthequeueisdescribedonlybythetwopointer
s,thesituations when the queue is completely fill and completely empty are
indistinguishable.
(d) What condition would you add to solve the problem in part c?
(e) Propose a procedure for manipulating the two pointers IN and
OUT to append and remove items from the queue.

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19)Consider the queue structure described in Problem2.18. Write
APPEND and REMOVE routines that transfer data between a
processor register and the queue. Be careful to inspect and update
the state of the queue and the pointers each time an operation is
attempted and performed.

20)Consider the following possibilities for saving the return

address of a subroutine:
(a) In a processor register
(b) In a memory location associated with die call, so that a
different location is used when the subroutine is called from
different places
(c) On a stack Which of these possibilities supports
subroutine nesting and which supports subroutine recursion (that
is, a subroutine that calls itself)?

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22)Assume you want to organize subroutine calls on a computer as
follows: When routine Main wishes to call subroutine SUB1, it calls an
intermediate routine, CALLSUB, and passes to it the address of
SUB1 as a parameter in register R1. CALLSUB saves the return
address on a stack, making sure that the upper limit of the stack is
not exceeded. Then it branches to SUB1. To return to the calling
program, subroutine SUB1 calls another intermediate routine,
RETRN. This routine checks that the stack is not empty and then
uses the top element to return to the original calling program.
Write routines CALLSUB and RETRN, assuming that the
subroutine call instruction saves the return address in a link register,
RL. Ihe upper and lower limits of the stack are recorded in memory
locations UPPERLIMIT and LOWERLIMIT, respectively.

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21)The subroutine call instruction of a computer saves the return

address in a processor register called the link register, RL. What
would you do to allow subroutine nesting? Would your scheme allow
the subroutine to call itself?

23)The linked-list insertion subroutine in Figure 2.37 does not

check if the E) of the new record matches that of a record already
in the list. What happens in the execution of the subroutine if this
is the case? Modify the subroutine to return the address of the
matching record in register ERROR if this occurs or return a zero
if the insertion is successful.

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24)The linked-list deletion subroutine in Figure 2.38 assumes that

a record with the ID contained in register RIDNUM is in the list.
What happens in the execution of the subroutine if there is no
record with this ID? Modify the subroutine to return a zero in
RIDNUM if deletion is successful or leave RIDNUM unchanged if
the record is not in the list.

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Ref. Solution manual of “Computer Organization,” by Carl Hamacher, Zvonko
Vranesic and Safwat Zaky. Fifth Edition McGraw-Hill, 2002.( unit ii-pps.1=9)

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