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Lecture 6 - Logic Gate Basics

This document covers the basics of logic gates in CMOS VLSI design, focusing on Boolean algebra and logic with CMOS technology. It explains the operation of basic gates such as AND, OR, and NOT, as well as the structure of CMOS NAND and NOR gates. The summary emphasizes that CMOS gates can perform any inverting function and highlights the limitations of static CMOS gates in implementing certain functions like XOR.

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3 views

Lecture 6 - Logic Gate Basics

This document covers the basics of logic gates in CMOS VLSI design, focusing on Boolean algebra and logic with CMOS technology. It explains the operation of basic gates such as AND, OR, and NOT, as well as the structure of CMOS NAND and NOR gates. The summary emphasizes that CMOS gates can perform any inverting function and highlights the limitations of static CMOS gates in implementing certain functions like XOR.

Uploaded by

vgondal3
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit #1

Lecture 6

Logic Gate Basics

CMOS VLSI Design: A Circuits and Systems Perspective, 4th Edition


by N. Weste and D. Harris, Addison-Wesley Computing (0321547748)
Digital Integrated Circuits: A Design Perspective, 2nd Edition
by J. Rabaey, A. Chandrakasan, and B. Nikolic, Prentice Hall (0130909963)
Highlight

 Boolean algebra
 Boolean logic with CMOS
‒ Elementary gates
‒ Series and parallel connection
‒ General structure
 Reading: Chapter 1.4

2
Digital IC Design

 Digital is an approximation to the analog nature


‒ Example: digital sound is encoded as 44.1 kHz, 16 bit audio

 Digital logic: compute the Boolean values, after the


conversion of an analog signal to the digital one
 Boolean logic gates:
‒ Generate an output based on a combination of the inputs
‒ Have a delay from input to output

3
Boolean Logic

 Logic and math are equivalent


 All Boolean functions can be
determined using these 3
primary logic operators: AND,
George Boole, 1815-1864
OR, and NOT
(“A Calculus of Logic”)

x y And(x,y) x y Or(x,y) x Not(x)


0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

4
CMOS for Boolean Logic

 NMOS: 1 = ON VDD

 PMOS: 0 = ON
 Series: both must be ON (AND) Vin Vout
CL
 Parallel: either can be ON (OR)

X OFF OFF OFF 0


X OFF 0 0 0
0 0 1 1
g1
g1 g2 0 0 0 1 1 0 1 1
g2
0 1 0 1
GND
GND GND GND GND GND
GND GND GND GND

VDD VDD VDD VDD


VDD VDD VDD VDD VDD VDD
0 0 1 1
g1
g1 g2 0 0 0 1 1 0 1 1
g2
0 1 0 1
X
X 1 1 1 0
1 OFF OFF OFF

5
A CMOS NAND Gate

 The name follows the Pull-Down Network (PDN)


 The Pull-UP Network (PUN) is the logic dual of PDN

PDN : AB

A
Rp
B
Rp
PUN : A  B  AB
A B OUT
Rn CL
0 0 1
B
0 1 1
Rn
1 0 1
A
1 1 0

6
A CMOS NOR Gate

PDN : A  B
Rp
B PUN : AB  A  B
Rp
A A B OUT

0 0 1
Rn Rn CL
A B 0 1 0

1 0 0

1 1 0

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General Structure

 Complementary CMOS logic gates


‒ NMOS for PDN; PMOS for PUN; gate named by PDN
‒ PUN is complement of PDN
‒ Parallel → Series, Series → Parallel
 Static: Output is always DC connected to VDD or GND

pMOS
pull-up
network PUN OFF PUN ON
inputs
output PDN OFF Z (float) 1
nMOS
pull-down PDN ON 0 X (crowbar)
network

8
Summary

 CMOS gates can do any inverting function and


implement all digital computation with NAND (or NOR)

INV INV(a) = NAND(a, a)

AND AND(a,b) = NAND(a, b)

OR OR(a,b) = NAND(a, b)

 Implementation with more types of gates improves the


speed and flexibility
9
Quiz 6

 Can you implement XOR with ONE static CMOS


gate?

Answer
 No, that is not possible. A static CMOS gate is only
able to provide an inverting function. XOR is not
in that category. You need more than one CMOS
gate to finish an XOR function.

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