LG_PRO 012
LG_PRO 012
LG_PRO 012
LEARNER MODULE
INTRODUCTION 3
DIGITAL FAULT RECORDER INFORMATION 3
ANALYSIS OF THE ANALOGUE INFORMATION 4
ANALYSIS OF THE BINARY INFORMATION 4
ANALYSIS OF COMPLETE RECORD 5
EXTRACTING ADDITIONAL INFORMATION FROM DIGITAL RECORDS 5
CT AND VT POSITION 7
EXAMPLES 8
Circuit breaker re-strike 8
Line bank transformer tripping 9
Cleared single phase fault 9
Not cleared single phase fault 10
Growing fault current 10
Sudden increase in fault current due to remote end opening 11
Developing fault 11
Reactor ring down 12
Charging current 12
Energising of a transformer 13
CT saturation 14
VT failure 14
VT Transient behavior 15
Slow breaker operations / breaker fail 16
Different opening times of breaker poles 17
3 Phase trip due to trip output not dropping off 18
Pole discrepancy operation due to failure of 1 pole ARC 19
Back-up earth fault operation during single pole dead time 20
Power swings and oscillations 21
Out of step condition 23
Series compensation 24
Delgado effect 26
DC offset 27
Over voltage conditions 29
Frequency recordings 31
Harmonic analysis 32
APPENDIX A 35
2
INTRODUCTION
The analysis of digital records provides possibly the most valuable source of
information during power system disturbances. The in-depth analysis of
disturbance records is however a complex task that requires very good
understanding of power system and protection performance during disturbances.
The purpose of this course is to provide power system and protection personnel
with some knowledge regarding the subject.
A digital record (such as a comtrade file) normally contains binary and analogue
signal sampled values. Binary values are either stored as a ‘0’ or a ‘1’ and
indicates the status of a contact eg. breaker auxiliary contact. Analogue values
indicate the instantaneous magnitude of an analogue signal (voltage or current)
measured at a specific point in time.
Binary information
H – Backup Mho
H–H
YTG – LZ32
YTG – R3Z27
MICROMHO – MICROMHO
TLS – TLS
7SA513 – PXLN
7SA513 – 7SA513
3
SEL351 – SEL351
REL531 - REL531
Slyp-Slcn - Slyp-Slcn
YTG - P40
7SD511 - 7SD511
7SD512 - PXLN
OPTOMHO - 7SD511
OPTOMHO - P10
P10 - PYTS
PYTS - P10
SLS - SLS
THS - TS
YTG - P10/40
H - PYTS
H - YCG
Non scheme specific binaries are also monitored in the form of the circuit breaker
auxiliary contacts.
Analogue information
When analysing a record it is very important to know the position of the CTs and
the VTs, as well as what protection scheme is used. Knowledge of the protection
scheme itself is also important.
From the analysis of the analogue information the following can be detected.
More advanced analysis such as impedance plots and harmonic analysis can
also be done and will be discussed later in the course.
From the analysis of the binary information the following can be detected.
Closer analysis will reveal protection operation times as well as breaker opening
times.
The analysis of the complete record will provide a complete picture about the
event. It is very important to look at analogue and binary information together.
Often information from one can be misleading. For example, the fact that the
current disappears does not mean that the line breaker opened. It could have
been a bus strip incident.
If possible the records from both sides of the feeder should be analysed at the
same time. This gives a very good global picture. If a record is only available
from one end, some very important information regarding the other end can
however be extracted.
5
EXTRACTING ADDITIONAL INFORMATION FROM DIGITAL RECORDS
2
N 1
To extract the complex values: X n0 n
x e jwnTs [2.1]
N
where Ts is the time period between samples, N is the number of samples per
period, Xn is the sample value of the sample n (starting at sample 0 for the first
sample in the period).
2
N 1
To extract the real values: XR n0
x n Sin( wnTS ) [2.2]
N
2
N 1
To extract the imaginary values: XC n0
x n Cos( wnTS ) [2.3]
N
6
CALCULATIONS INVOLVING PHASOR VALUES
Simple calculations may be done with phasor values to determine other useful
information from which graphs may be drawn. Examples of these are
Impedance- and Power plots.
Impedance Plots
Impedance plots are very useful when investigating line impedance protection
relay operations since it displays what the relay “saw” during the incident.
All line impedance protection relays have two types of measuring elements,
those measuring from line to ground and those measuring from line to line.
Normally there are at least 6 measuring elements in a line impedance protection
relay. The elements respectively measure the following quantities.
V LG
Z
I LG K N I N
1 Zo
where K N ( 1) and Z o and Z 1 is protection setting values
3 Z1
and I N I R I W I B
V LL1 V LL 2
Z
I LL1 I LL 2
Dynamic studies can not be done without the help of power plots to assist in the
tuning of dynamic circuits.
For dynamic studies RMS values are of more concern and not measured
quantities. The power transmitted in a single phase is also not used frequently
and the total power transmitted is of more use. However, both formulas used are
given below:
7
For power in a single phase circuit:
S = VI *
VLG I LG VLG I LG cos( )
P = VLG I LG cos( ) cos( ) [WRMS ]
2 2 2
VLG I LG VLG I LG sin( )
Q = VLG I LG sin( ) sin( ) [WRMS ]
2 2 2
S TOTAL = S RG SWG S BG
where
V RG I RG cos( ) V RG I RG sin( )
S RG PRG jQ RG j( ) [MVA RMS ] etc.
2 2
All measured values are divided by the square root of 2 to convert it to RMS
values.
CT and VT position
It is very important to know where the CTs and VTs are placed. On normal
feeders we have CTs on the line with their star point earthed line side. This has
the effect that power flowing out of the busbar on this line during load conditions
will reflect as in phase (depending on the power factor) with the voltage. Power
flowing into the busbar will be reflected as +/- 180º out of phase with the voltage.
Where there is a line reactor on the line the CTs are most commonly on the line
side of the reactor. We use line VTs on all Transmission feeders. The voltage
on the line is thus reflected at both ends. If one end of the line is open, both
ends will still see full voltage.
8
EXAMPLES
The following list of examples is chosen to give the reader a broad insight into
different scenarios that can be identified by correct analysis of digital records.
The list is by no means complete and will never be, as new scenarios appear
nearly every day.
9
Line bank transformer tripping
Tripping of a line bank transformer should not be confused with circuit breaker
re-strikes. The voltage wave can look the same.
The voltage waves are as a result of the discharge of the line bank transformer
and its interaction with the line capacitance.
When single pole tripping is used, one can detect if the secondary arc has been
extinguished by looking at the induced voltage on the open phase during the
open pole dead time. If the arc is extinguished the induced voltage will be a pure
sine wave, if not a lot of harmonics would be present.
10
Not cleared single phase fault
As mentioned previously, one can clearly see if the secondary arc is extinguished
or not by evaluating the induced voltage on the open phase. To sustain the
secondary arc very little voltage is required. Should the breaker close before the
secondary arc is extinguished the fault will reappear and a 3 phase trip will be
issued.
It is often seen that the fault current grows with time. A gradual growth normally
indicates that the arc resistance is changing. A sudden increase in current
indicates that the remote end breaker has opened before the local end and the
infeed from the remote end is now routed through the local end into the fault.
The following examples show the gradual increase of fault current.
11
Sudden increase in fault current due to remote end opening
Developing fault
12
Reactor ring down
When you have a line reactor connected to a line and you open the circuit
breakers at both ends, you find that the voltage does not disappear. An
oscillating voltage waveform can be seen which slowly reduces in magnitude.
This phenomenon is called reactor ring down. It is a result of the interaction
between the reactor and the capacitance of the line. This forms an oscillatory
circuit.
Charging current
When only one end of a feeder is closed, the only current flowing on that feeder
is charging current. The magnitude of the charging current varies but a good
approximation is – 100 A for 100 km long 400 kV line. The most important thing
to realise is that the charging current is a capacitive current, meaning that it will
lead the voltage by +/- 90º. It is a very good way to establish if the remote end
breaker is closed or open, especially if you only have a record from one end.
Because of the fact that we use line VTs you cannot establish the state of the
breakers by only looking at the voltage.
13
Muldersvlei, Droerivier 13/3/97 00:54:00
Ired = 216<80º
Energising of a transformer
14
CT saturation
Saturation of CTs on the Transmission system is quite rare due to the safety
factors used when selecting a CT. The example below shows saturation of the
CT on the Marathon, Komatipoort feeder. This saturation is mainly due to DC
offset and the saturation disappears as the DC offset decays.
VT failure
The following graph shows the secondary voltage on the red phase on the
Kruispunt, Komati feeder. The transient response of the VT normally consist of a
combination of one low frequency oscillation (between 2 and 15 Hz) and one
high frequency oscillation (between 900 and 4000 Hz). The high frequency
oscillation is normally damped very quickly (within 10 ms) while the low
frequency oscillation can remain longer. In this case the VT failed. Very slow
damping of the high and low frequency oscillation can be seen.
15
Kruispunt, Komati 7/3/99 01:29:56
CVT transient behavior is due to the discharge of energy stored in the capacitive
and inductive elements of the CVT when there is a sudden change in the primary
voltage. The transient behavior is seen as oscillations in the secondary voltage.
The transients are influenced by the burden on the CVT. For a resistive burden
the transients are normally very small and die down very quickly. For zero or
small burdens the transients are very prominent as can be seen in the following
example. Some nice examples can also be found in “Power system protection
reference manual”- Reyrolle 1982.
16
Slow breaker operations / Breaker fail
It sometimes happens that a circuit breaker that is required to clear a fault is slow
in doing so, or does not open at all. When this occurs the fault must be cleared
by another breaker to protect the system from long fault duration. Breaker fail or
bus strip protection will trip all other breakers connected to the busbar after
120 ms should a breaker be slow or have failed. In the following example the
main 1 and 2 relays are TLS relays. The 1 phase breaker fail time is 240 ms
(combination of timers T1 and T2) while the 3-phase breaker fail time equals 120
ms (only T2). Should one pole of the breaker fail to open, the first breaker fail
timer would expire (120 ms), resulting in the tripping of the other 2 phases and a
re-trip to the faulted phase. If the faulted phase is still not open a bus strip will be
issued after another 120 ms.
17
Different opening time of breaker poles
18
3 Phase trip due to trip output not dropping off
For phase 1 protection schemes the trip coil parallel timer (TCPT) ensures that
the second trip, within the ARC reclaim time, will be a 3 pole trip. The TCPT
parallels the trip coils after a set time, normally 200 ms. If the single pole trip
output does not drop off after the single pole has opened, the TCPT will time out
and initiate a 3 pole trip.
Tr = Start of fault
C1 = 1 phase trip issued
C2 = Faulted phase breaker opens
C3 = 1 Phase trip output has not dropped off – 200 ms
C4 = Other 2 phases opens
19
Pole discrepancy (PD) operation due to failure of 1 pole ARC
Pole discrepancy protection is there to evaluate the state of the phases of the
breaker with respect to each other. Any discrepancy between the phases is
abnormal. For single phase tripping schemes there will be an accepted
discrepancy between the phases for the duration of the single pole dead time.
For single pole tripping the single pole dead time in Eskom on Transmission
feeders equal 1 second. To allow for this the pole discrepancy timer is set longer
than 1 second. The accepted standard is to set the PD timer to 1.6 seconds.
Should the 1 pole ARC dead time be longer than 1.6 seconds or should the 1
pole ARC fail the DP protection will trip the other two phases.
Tr = Start of fault
C1 = White phase opens
C2 = This is where the white phase should have ARC’d
C3 = Pole discrepancy operates, tripping the Red and Blue phases.
20
Back-up earth fault operation during single pole dead time
When single pole tripping are used there will be earth fault current flowing for the
duration of the single pole dead time. It is very important that the back-up earth
protection must not operate for the duration of the open pole. If the back-up
earth relay were set too sensitive the result would be a 3-phase trip with no ARC.
Tr = Start of fault
C1 = Single phase trip
C2 = Back-up earth fault tripping other phases – set too sensitive.
21
Power swings and oscillations
22
Active and reactive power during a power swing/oscillation
Active Power - MW
23
Out of step condition
A B
VA
VA
VB
The power transfer between two busbars is dependent on the angle between
their voltages. This can clearly be seen from the following formula:
VAVB
P sin
X
If the voltage angle difference exceeds 180˚ we have what is called an out of
step condition. Once the angle has gone past 180˚ the direction of the power
flow will reverse. An out of step condition is dangerous to system and plant
integrity and separation of the system into balanced Generation/Load islands is
necessary.
To determine where the point of out of step occurs, is very difficult. The rule
used is the following: the angle difference between two adjacent busbars must be
close to 180˚ while the current is a maximum.
24
Out of step condition
210 2500
180
2000
150
Degrees
1500
Current
120
90 1000
60
500
30
0 0
1.1 1.425 1.75
T im e (s e co n d s )
Series compensation
Lines that have series capacitors on them needs special mention as the
capacitor can cause transients when it bypasses. A series capacitor must be
bypassed when there is a fault on the line and when the current through the
capacitor causes a voltage across it that is above the insulation capability of the
bank. When the capacitor bypasses the impedance of the line changes which
causes transients in the currents. Analysis of the current waveform gives clear
indication if the fault was in front or behind the capacitor bank.
25
If the capacitor does not bypass, there is no visible effect on the current. In this
case we have to look at the angle between the fault current and the voltage.
Xl
Voltage
R
Xc
A B
As can be seen from the following figure the impedance up to the fault point will
be equal to the line impedance up to the fault point plus any resistance in the
fault. Seeing that the line impedance is predominantly reactive, the vector
relationships will be as follows.
From busbar A
Xl
Measured
impedance
Voltage
R
26
From busbar B
Xl
Measured impedance
Voltage
R
Xc
As can be seen from the above figures, the angle of the measured impedance
will be smaller from busbar B than the angle from busbar A for the same arc
resistance. This helps us to determine the position of the fault.
Delgado effect
During close up single phase to ground faults, it is possible for the relay to
measure the phase to phase impedance loop inside its characteristic resulting in
a 3 phase trip. It can often be seen that the relay first issues a 1-phase trip
followed very shortly by a 3-phase trip.
200
Zr-g
Zw-g
Zb-g
100
Zr-w
XL - ohms
Zw-b
Zb-r
0
-100 0 100 200 300 400 500
-100
R - ohms
27
The above plot shows all 6 impedance measurement loops – 3 phase to ground
and 3 phase to phase. A Red phase to ground fault was simulated on the Apollo-
Pluto 400 kV at 10 % intervals along the line length. For each fault position all
the impedance loops are calculated. It can clearly be seen that the phase to
phase elements for which the Red phase is involved are very close to the actual
line impedance and can easily enter the relay characteristics. As the fault
position moves further away from the local busbar, so does the phase to phase
impedances. The same situation will occur for a phase to ground fault on any of
the other two phases. PSSE was used to simulate this condition.
DC Offset
28
take place. The load current, due to its resistive nature, would be in phase with
the voltage (reference). The fault current would lag the voltage by 90˚.
The change in current is dependent on where on the voltage wave the fault
occurs. The following diagrams will show that if the fault occurs at voltage zero
the current change will be a maximum, thus a maximum DC offset. If the fault
occurs at voltage maximum the change in current will be a minimum, thus a
minimum DC offset.
0.5
0 Voltage
0 0.02 0.04 0.06 0.08 0.1
-0.5
-1
0.5
0
0 0.02 0.04 0.06 0.08 0.1
Load current
-0.5
0.5
0
Prospective
0 0.02 0.04 0.06 0.08 0.1
fault current
-0.5
-1
Fault current
1
Voltage
Max DC
Load current
offset
Magnitude of DC
0.5
0
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
-0.5
Min DC
offset
-1
29
As can be seen from the above waveforms, the minimum DC offset occurs at the
point where the voltage is a maximum and the maximum DC offset occurs where
the voltage is a minimum. There are other factors that affect the DC offset, such
as the impedance angle as well as the fault angle. The ratio of system
resistance and system inductance will determine the time constant of the
decaying DC.
Over-voltage Conditions
30
Ferranti over-voltage
When one end of a transmission line is open, the voltage at the open end will rise
with respect to the closed end. This rise in voltage is due to the Ferranti effect.
The capacitive current that flows during this condition causes a voltage drop on
the line impedance that adds to the sending end voltage, resulting in a rise in
voltage at the receiving end. This is illustrated below.
Capacitive current
Vs Vr
Zline 3090
The capacitive current flowing through the line is leading the voltage by 90.
Ic 10090
Vr Vs Ic Zline
Let Vs 2300000
We can see that the voltage rises by 3 kV. These quantities are typical for a
400 kV, 100-km long line.
The same can be seen by analysing the vectors.
31
Ic
Zline
Vs - Vdrop
Vdrop
Vr
The longer the line, the higher the impedance and the charging current and thus
the higher the rise in voltage. On very long lines a line reactor is used to damp
the voltage rise caused by the charging current.
Frequency recordings
The frequency of the South African power grid is equal to 50 Hz. Frequency
recordings are normally taken over several minutes with a scanning frequency of
100 Hz. The system frequency will respond based on the system conditions. A
sudden loss of generation will cause a decrease in system frequency while a
sudden loss of load will cause an increase in frequency. A rise in frequency
during a system fault could indicate slow or incorrect protection operation.
1
T
f
1
T
50
T 0.02 s
32
Apollo incident - 26-9-02
50.1
50
49.9
F re q u e n c y
49.8
49.7
49.6
49.5
49.4
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
Time - sec
Harmonic Analysis
The following graph shows the Fourier spectrum for the current during a single
phase to ground fault. The 0 harmonic indicates the DC component in the wave.
33
The following graph shows the harmonic content of the induced voltage during
the single pole open time when the secondary arc have not been extinguished.
34
The following graph shows the high levels of 2nd and 3rd harmonics when a
transformer is energised.
Appendix A shows the effect that various harmonics have on the measured
wave.
35
Appendix A
1.5
Even Harmonics
1
eg. 2,4 etc.
50 Hz
0.5
0
0 45 90 135 180 225 270 315 360
-0.5
100 Hz
-1
-1.5
1.5
50 Hz Odd Harmonics
1 eg. 3,5 etc.
0.5
0
0 45 90 135 180 225 270 315 360
-0.5
150 Hz
-1
-1.5
1.5 Combination of
50 Hz odd and even
1 Harmonics
0.5
0
0 45 90 135 180 225 270 315 360
-0.5
150 Hz
100 Hz
-1
-1.5
-2
36