MA1

Introduction to Microcontrollers
Why do we need to learn Microprocessors/controllers?

The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable.
The necessary tools for a microprocessor/controller

1. 2. 3. 4. 5. 6. 7. 8. CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port
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Microprocessors
CPU for Computers No RAM, ROM, I/O on CPU chip itself Example: Intel's x86, Motorolas 680x0
Microcontroller
A smaller computer On-chip RAM, ROM, I/O ports... Example: Motorolas 6811, Intels 8051, Zilogs Z8 and PIC
Microprocessor vs. Microcontroller

Microprocessor
CPU is stand-alone, RAM, ROM, I/O, timer are separate
Designer can decide on the amount of ROM, RAM and I/O ports. Expansive
Microcontroller
CPU, RAM, ROM, I/O and timer are all on a single chip
Fix amount of on-chip ROM, RAM, I/O ports For applications in which cost, power and space are critical
Versatility
General-purpose
Not Expansive
Single-purpose
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Microcontrollers for Embedded Systems

Home
Appliances, intercom, telephones, security systems, garage door openers, answering machines, fax machines, home computers, TVs, cable TV tuner, VCR, camcorder, remote controls, video games, cellular phones, musical instruments, sewing machines, lighting control, paging, camera, pinball machines, toys, exercise equipment etc.
Office
Telephones, computers, security systems, fax machines, microwave, copier, laser printer, color printer, paging etc.
Auto
Trip computer, engine control, air bag, ABS, instrumentation, security system, transmission control, entertainment, climate control, cellular phone, keyless entry
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Choosing a Microcontroller
8-bit microcontrollers
Motorolas 6811 Intels 8051 Zilogs Z8 Microchips PIC
There are also 16-bit and 32-bit microcontrollers made by various chip makers
Criteria for Choosing a Microcontroller

Meeting the computing needs of the task at hand efficiently and cost effectively
Speed Packaging Power consumption The amount of RAM and ROM on chip
The number of I/O pins and the timer on chip

How easy to upgrade to higher performance or lower powerconsumption versions Cost per unit
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Criteria for Choosing a Microcontroller

Availability of software development tools, such as compilers, assemblers, and debuggers Wide availability microcontroller and reliable sources of the
The 8051 family has the largest number of diversified (multiple source) suppliers
Intel (original) Atmel Philips/Signetics AMD Infineon (formerly Siemens) Matra Dallas Semiconductor/Maxim
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8051 CPU Operation

1. Features 2. Pin Diagram 3. Block Diagram
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8051 Microcontroller
Intel introduced 8051, referred as MCS- 51, in 1981. The 8051 is an 8-bit processor
The CPU can work on only 8 bits of data at a time
The 8051 became widely popular after allowing other manufactures to make and market any flavor of the 8051.
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8051 Family
The 8051 is a subset of the 8052 The 8031 is a ROM-less 8051
Add external ROM to it You lose two ports, and leave only 2 ports for I/O operations
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8051 Features
64KB Program Memory address space 64KB Data Memory address space 4K bytes of on-chip Program Memory 128 bytes of on-chip Data RAM 32 bidirectional and individually addressable 1/0 lines Two 16-bit timer/counters Full duplex UART 6-source/5-vector interrupt structure with two priority levels On-chip clock oscillator
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Pin Description of the 8051

8051 family members (e.g., 8751, 89C51, 89C52, DS89C4x0)
Have 40 pins dedicated for various functions such as I/O, RD, WR, address, data, and interrupts. Come in different packages, such as
DIP(dual in-line package), QFP(quad flat package), and LLC(leadless chip carrier)
Some companies provide a 20-pin version of the 8051 with a reduced number of I/O ports for less demanding applications
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Pin Diagram of the 8051
Suresh.P.Nair , HOD - ECE , RCET
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XTAL1 and XTAL2

The 8051 has an on-chip oscillator but requires an external clock to run it
A quartz crystal oscillator is connected to inputs XTAL1 (pin19) and XTAL2 (pin18) The quartz crystal oscillator also needs two capacitors of 30 pF value
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XTAL1 and XTAL2 ..

If you use a frequency source other than a crystal oscillator, such as a TTL oscillator:
It will be connected to XTAL1 XTAL2 is left unconnected
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XTAL1 and XTAL2 ..

The speed of 8051 refers to the maximum oscillator frequency connected to XTAL. We can observe the frequency on the XTAL2 pin using the oscilloscope.
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RST
RESET pin is an input and is active high (normally low) Upon applying a high pulse to this pin, the microcontroller will reset and terminate all activities This is often referred to as a power-on reset Activating a power-on reset will cause all values in the registers to be lost
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RST
In order for the RESET input to be effective, it must have a minimum duration of 2 machine cycles. In other words, the high pulse must be high for a minimum of 2 machine cycles before it is allowed to go low.
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EA
EA, external access, is an input pin and must be connected to Vcc or GND The 8051 family members all come with onchip ROM to store programs and also have an external code and data memory. Normally EA pin is connected to Vcc EA pin must be connected to GND to indicate that the code or data is stored externally.
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PSEN and ALE

PSEN, program store enable, is an output pin This pin is connected to the OE pin of the external memory. For External Code Memory, PSEN = 0
For External Data Memory, PSEN = 1

ALE pin is used for demultiplexing the address and data.
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I/O Port Pins

The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins. All the ports upon RESET are configured as output, ready to be used as input ports by the external device.
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Port 0
Port 0 is also designated as AD0-AD7. When connecting an 8051 to an external memory, port 0 provides both address and data. The 8051 multiplexes address and data through port 0 to save pins. ALE indicates if P0 has address or data.
When ALE=0, it provides data D0-D7 When ALE=1, it has address A0-A7
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Port 1 and Port 2

In 8051-based systems with no external memory connection:
Both P1 and P2 are used as simple I/O.
In 8051-based systems with external memory connections:

Port 2 must be used along with P0 to provide the 16-bit address for the external memory. P0 provides the lower 8 bits via A0 A7. P2 is used for the upper 8 bits of the 16-bit address, designated as A8 A15, and it cannot be used for I/O.
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Port 3
Port 3 can be used as input or output. Port 3 has the additional function of providing some extremely important signals
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Pin Description Summary

PIN TYPE NAME AND FUNCTION
Vss Vcc
P0.0 - P0.7
I I
I/O
Ground: 0 V reference. Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is an open-drain, bi-directional I/O port. Port 0 is also the multiplexed low-order address and data bus during accesses to external program and data memory. Port 1: Port I is an 8-bit bi-directional I/O port. Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the high order address byte during fetches from external program memory and during accesses to external data memory that use 16 bit addresses. Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also serves special features as explained.
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P1.0 - P1.7 P2.0 - P2.7
I/O I/O
P3.0 - P3.7
I/O
Pin Description Summary

PIN RST ALE PSEN* TYPE I O O NAME AND FUNCTION Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. Address Latch Enable: Output pulse for latching the low byte of the address during an access to external memory. Program Store Enable: The read strobe to external program memory. When executing code from the external program memory, PSEN* is activated twice each machine cycle, except that two PSEN* activations are skipped during each access to external data memory. External Access Enable/Programming Supply Voltage: EA* must be externally held low to enable the device to fetch code from external program memory locations. If EA* Is held high, the device executes from internal program memory. This pin also receives the programming supply voltage Vpp during Flash programming. (applies for 89c5x MCU's)
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EA*/VPP
General Block Diagram of 8051

Interrupt Control
4K ROM
128 B RAM
Timer 0 Timer 1
CPU
Bus Control
OSC
4 I/O Ports
Serial Port
TXD RXD
P0
P1
P2
P3
Detailed Block Diagram
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8051 Memory Space

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8051 Memory Structure

External
60K
64K
External
SFR
64K
EXT
EA = 0
INT
EA = 1
4K
128 Data Memory

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Program Memory
Internal RAM Structure

Direct Addressing Only Direct & Indirect Addressing
SFR [ Special Function Registers] 128 Byte Internal RAM
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Special Function Registers [SFR]
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Program Status Word [PSW]
C AC F0 RS1 RS0 OV F1 P
Carry Auxiliary Carry User Flag 0 Register Bank Select Parity User Flag 1 Overflow
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8051 instructions that affects flag
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128 Byte RAM

There are 128 bytes of RAM in the 8051.
Assigned addresses 00 to 7FH
The 128 bytes are divided into 3 different groups as follows:
General Purpose Area
BIT Addressable 1. A total of 32 bytes from locations 00 to 1F Area 128 BYTE hex are set aside for register banks and the INTERNAL RAM stack. Reg Bank 3
2. A total of 16 bytes from locations 20H to 2FH Reg Bank 2 are set aside for bit-addressable read/write Register Banks memory. Reg Bank 1 3. A total of 80 bytes from locations 30H to 7FH Reg Bank 0 are used for read and write storage, called scratch pad.
8051 Microcontroller 38
8051 RAM with addresses
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8051 Register Bank Structure

Bank 3 Bank 2
R0 R0 R0 R0
R1 R1 R1 R1
R2 R2 R2 R2
R3 R3 R3 R3
R4 R4 R4 R4
R5 R5 R5 R5
R6 R6 R6 R6
R7 R7 R7 R7
Bank 1
Bank 0
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8051 Register Banks with address
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8051 Programming Model
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8051 Stack
The stack is a section of RAM used by the CPU to store information temporarily.
This information could be data or an address
The register used to access the stack is called the SP (stack pointer) register
The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to FFH When the 8051 is powered up, the SP register contains value 07 RAM location 08 is the first location begin used for the stack by the 8051
8051 Stack
The storing of a CPU register in the stack is called a PUSH
SP is pointing to the last used location of the stack As we push data onto the stack, the SP is incremented by one This is different from many microprocessors
Loading the contents of the stack back into a CPU register is called a POP
With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once
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Bit Addressable & Byte Addressable
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Single bit Instructions
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Bit Addressable Programming

Example: Find out to which by each of the following bits belongs. Give the address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05
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8051 Peripheral Overview

1. Timers 2. Serial Port 3. Interrupts
8051 TIMERS
8051 Timer/Counter
OSC 12
C /T 0
TLx
THx
TFx
(1 Bit)
C /T 1
(8 Bit) (8 Bit)
T PIN
TR
Gate
INT PIN
INTERRUPT
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TMOD Register
GATE: When set, timer/counter x is enabled, if INTx pin is high and TRx is set. When cleared, timer/counter x is enabled, if TRx bit set. C/T*: When set, counter operation (input from Tx input pin). When cleared, timer operation (input from internal clock).
TMOD Register
The TMOD byte is not bit addressable.
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TCON Register
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8051 Timer Modes 8051 TIMERS

Timer 0
Mode 0 Mode 1 Mode 2 Mode 3
Timer 1
Mode 0
Mode 1 Mode 2
TIMER 0
OSC 12
C /T 0
C /T 1
TL0 TH0
TF0
T 0PIN
TR0
Gate
INT 0 PIN
INTERRUPT
TIMER 0 Mode 0
13 Bit Timer / Counter
OSC 12
C /T 0
C /T 1
T 0PIN
TL0 (5 Bit)
TH0 (8 Bit)
TF0
INTERRUPT
TR0
Gate
INT 0 PIN
Maximum Count = 1FFFh (0001111111111111)
TIMER 0 Mode 1
OSC 12
C /T 0
C /T 1
T 0PIN
TL0 (8 Bit)
TH0 (8 Bit)
TF0
INTERRUPT
TR0
Gate
INT 0 PIN
Maximum Count = FFFFh (1111111111111111)
TIMER 0 Mode 2
8 Bit Timer / Counter with AUTORELOAD
OSC 12
C /T 0
C /T 1
T 0PIN
TL0 (8 Bit)
TH0 (8 Bit)
Reload
TF0
INTERRUPT
TR0
Gate
INT 0 PIN
TH0 (8 Bit)
Maximum Count = FFh (11111111)
TIMER 0 Mode 3
Two - 8 Bit Timer / Counter
OSC 12
C /T 0
C /T 1
T 0PIN
TL0 (8 Bit)
TF0
INTERRUPT
TR0
Gate
INT 0 PIN
OSC
12
TH0 (8 Bit)
TF1
INTERRUPT
TR1
TIMER 1
OSC 12
C /T 0
C /T 1
TL1 TH1
TF1
T1PIN
TR1
Gate
INT 1 PIN
INTERRUPT
TIMER 1 Mode 0
OSC 12
C /T 0
C /T 1
T1PIN
TL1 (5 Bit)
TH1 (8 Bit)
TF1
INTERRUPT
TR1
Gate
INT 1 PIN
Maximum Count = 1FFFh (0001111111111111)
TIMER 1 Mode 1
OSC 12
C /T 0
C /T 1
T1PIN
TL1 (8 Bit)
TH1 (8 Bit)
TF1
INTERRUPT
TR1
Gate
INT 1 PIN
Maximum Count = FFFFh (1111111111111111)
TIMER 1 Mode 2
8 Bit Timer / Counter with AUTORELOAD
OSC 12
C /T 0
C /T 1
T1PIN
TL1 (8 Bit)
TH1 (8 Bit)
Reload
TF1
INTERRUPT
TR1
Gate
INT 1 PIN
TH1 (8 Bit)
Maximum Count = FFh (11111111)
Programming Timers
Example: Indicate which mode and which timer are selected for each of the following. (a) MOV TMOD, #01H (b) MOV TMOD, #20H (c) MOV TMOD, #12H Solution: We convert the value from hex to binary.
(a) TMOD = 00000001, mode 1 of timer 0 is selected. (b) TMOD = 00100000, mode 2 of timer 1 is selected. (c) TMOD = 00010010, mode 2 of timer 0, and mode 1 of timer 1 are selected.
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Programming Timers
Find the timers clock frequency and its period for various 8051-based system, with the crystal frequency 11.0592 MHz when C/T bit of TMOD is 0.
Solution:
1/12 11.0529 MHz = 921.6 MHz; T = 1/921.6 kHz = 1.085 us

8051 Serial Port

Basics of Serial Communication

Computers transfer data in two ways:
Parallel: Often 8 or more lines (wire conductors) are used to transfer data to a device that is only a few feet away.
Serial: To transfer to a device located many meters away, the serial method is used. The data is sent one bit at a time.
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Basics of Serial Communication

Serial data communication uses two methods
Synchronous method transfers a block of data at a time Asynchronous method transfers a single byte at a time
There are special ICs made by many manufacturers for serial communications.
UART (universal asynchronous Receiver transmitter) USART (universal synchronous-asynchronous Receivertransmitter)
Asynchronous Start & Stop Bit

Asynchronous serial data communication is widely used for character-oriented transmissions
Each character is placed in between start and stop bits, this is called framing. Block-oriented data transfers use the synchronous method.
The start bit is always one bit, but the stop bit can be one or two bits The start bit is always a 0 (low) and the stop bit(s) is 1 (high)
Asynchronous Start & Stop Bit
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Data Transfer Rate

The rate of data transfer in serial data communication is stated in bps (bits per second).
Another widely used terminology for bps is baud rate.
It is modem terminology and is defined as the number of signal changes per second In modems, there are occasions when a single change of signal transfers several bits of data
As far as the conductor wire is concerned, the baud rate and bps are the same.
8051 Serial Port

Synchronous and Asynchronous SCON Register is used to Control Data Transfer through TXd & RXd pins Some time - Clock through TXd Pin Four Modes of Operation: Mode 0 Mode 1 Mode 2 Mode 3
:Synchronous Serial Communication :8-Bit UART with Timer Data Rate :9-Bit UART with Set Data Rate :9-Bit UART with Timer Data Rate
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Registers related to Serial Communication
1. SBUF Register 2. SCON Register

3. PCON Register
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SBUF Register
SBUF is an 8-bit register used solely for serial communication. For a byte data to be transferred via the TxD line, it must be placed in the SBUF register.
The moment a byte is written into SBUF, it is framed with the start and stop bits and transferred serially via the TxD line.
SBUF holds the byte of data when it is received by 8051 RxD line. When the bits are received serially via RxD, the 8051 deframes it by eliminating the stop and start bits, making a byte out of the data received, and then placing it in SBUF.
SBUF Register
Sample Program:
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SCON Register
SM0 SM1 SM2 REN TB8 RB8 TI RI
Set to Enable Serial Data reception Enable Multiprocessor Communication Mode 9th Data Bit Sent in Mode 2,3
Set when a Charactor received

Set when Stop bit Txed 9th Data Bit Received in Mode 2,3
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8051 Serial Port Mode 0

The Serial Port in Mode-0 has the following features:
1. Serial data enters and exits through RXD
2. TXD outputs the clock

3. 8 bits are transmitted / received
4. The baud rate is fixed at (1/12) of the oscillator frequency
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1. Serial data enters through RXD 2. Serial data exits through TXD 3. On receive, the stop bit goes into RB8 in SCON 4. 10 bits are transmitted / received
1. Start bit (0) 2. Data bits (8) 3. Stop Bit (1)
5. Baud rate is determined by the Timer 1 over flow rate.


1. Serial data enters through RXD 2. Serial data exits through TXD 3. 9th data bit (TB8) can be assign value 0 or 1 4. On receive, the 9th data bit goes into RB8 in SCON 5. 11 bits are transmitted / received
1.Start bit (0) 2.Data bits (9) 3.Stop Bit (1)
6. Baud rate is programmable


1. Serial data enters through RXD 2. Serial data exits through TXD 3. 9th data bit (TB8) can be assign value 0 or 1 4. On receive, the 9th data bit goes into RB8 in SCON 5. 11 bits are transmitted / received
1.Start bit (0) 2.Data bits (9) 3.Stop Bit (1)
6. Baud rate is determined by Timer 1 overflow rate.

Programming Serial Data Transmission

1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode 2 (8-bit auto-reload) to set baud rate. 2. The TH1 is loaded with one of the values to set baud rate for serial data transfer. 3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8- bit data is framed with start and stop bits. 4. TR1 is set to 1 to start timer 1 5. TI is cleared by CLR TI instruction
6. The character byte to be transferred serially is written into SBUF register.

7. The TI flag bit is monitored with the use of instruction JNB TI, xx to see if the character has been transferred completely.
8. To transfer the next byte, go to step 5

Programming Serial Data Reception

1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode 2 (8-bit auto-reload) to set baud rate. 2. TH1 is loaded to set baud rate 3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8- bit data is framed with start and stop bits.
4. TR1 is set to 1 to start timer 1

5. RI is cleared by CLR RI instruction 6. The RI flag bit is monitored with the use of instruction JNB RI, xx to see if an entire character has been received yet 7. When RI is raised, SBUF has the byte, its contents are moved into a safe place. 8. To receive the next character, go to step 5.
Doubling Baud Rate

There are two ways to increase the baud rate of data transfer 1. By using a higher frequency crystal 2. By changing a bit in the PCON register PCON register is an 8-bit register.
When 8051 is powered up, SMOD is zero We can set it to high by software and thereby double the baud rate.
Doubling Baud Rate (cont)
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8051 Interrupts
INTERRUPTS
An interrupt is an external or internal event that interrupts the microcontroller to inform it that a device needs its service
A single microcontroller can serve several devices by two ways:
1. Interrupt 2. Polling
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Interrupt Vs Polling
1. Interrupts
Whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal. Upon receiving an interrupt signal, the microcontroller interrupts whatever it is doing and serves the device. The program which is associated with the interrupt is called the interrupt service routine (ISR) or interrupt handler.
2. Polling
The microcontroller continuously monitors the status of a given device. When the conditions met, it performs the service. After that, it moves on to monitor the next device until every one is serviced.
Interrupt Vs Polling
The polling method is not efficient, since it wastes much of the microcontrollers time by polling devices that do not need service. The advantage of interrupts is that the microcontroller can serve many devices (not all at the same time).
Each devices can get the attention of the microcontroller based on the assigned priority. For the polling method, it is not possible to assign priority since it checks all devices in a round-robin fashion.
The microcontroller can also ignore (mask) a device request for service in Interrupt.
Steps in Executing an Interrupt

1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on the stack. 2. It also saves the current status of all the interrupts internally (i.e: not on the stack). 3. It jumps to a fixed location in memory, called the interrupt vector table, that holds the address of the ISR. 4. The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it.
5. It starts to execute the interrupt service subroutine until it reaches the last instruction of the subroutine which is RETI (return from interrupt).
6. Upon executing the RETI instruction, the microcontroller returns to the place where it was interrupted.
8051 Microcontroller Suresh.P.Nair , HOD - ECE , RCET 89
Six Interrupts in 8051

Six interrupts are allocated as follows: 1. Reset power-up reset. 2. Two interrupts are set aside for the timers.
one for timer 0 and one for timer 1
3. Two interrupts are set aside for hardware external interrupts.

P3.2 and P3.3 are for the external hardware interrupts INT0 (or EX1), and INT1 (or EX2)
4. Serial communication has a single interrupt that belongs to both receive and transfer.
What events can trigger Interrupts?

We can configure the 8051 so that any of the following events will cause an interrupt:
Timer 0 Overflow. Timer 1 Overflow. Reception/Transmission of Serial Character. External Event 0. External Event 1.
We can configure the 8051 so that when Timer 0 Overflows or when a character is sent/received, the appropriate interrupt handler routines are called.
8051 Interrupt Vectors
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8051 Interrupt related Registers

The various registers associated with the use of interrupts are: TCON - Edge and Type bits for External Interrupts 0/1 SCON - RI and TI interrupt flags for RS232
IE - Enable interrupt sources

IP - Specify priority of interrupts
Enabling and Disabling an Interrupt

Upon reset, all interrupts are disabled (masked), meaning that none will be responded to by the microcontroller if they are activated.
The interrupts must be enabled by software in order for the microcontroller to respond to them. There is a register called IE (interrupt enable) that is responsible for enabling (unmasking) and disabling (masking) the interrupts.
Interrupt Enable (IE) Register

--
EA : Global enable/disable. --- : Reserved for additional interrupt hardware.

MOV IE,#08h or SETB ET1
ES : Enable Serial port interrupt.
ET1 : Enable Timer 1 control bit.

EX1 : Enable External 1 interrupt. ET0 : Enable Timer 0 control bit.
EX0 : Enable External 0 interrupt.

Enabling and Disabling an Interrupt

Example: Show the instructions to (a) enable the serial interrupt, timer 0 interrupt, and external hardware interrupt 1 and (b) disable (mask) the timer 0 interrupt, then (c) show how to disable all the interrupts with a single instruction. Solution:
(a) MOV IE,#10010110B ;enable serial, timer 0, EX1 Another way to perform the same manipulation is:
SETB IE.7 ;EA=1, global enable SETB IE.4 ;enable serial interrupt SETB IE.1 ;enable Timer 0 interrupt SETB IE.2 ;enable EX1
(b) CLR IE.1 ;mask (disable) timer 0 interrupt only
(c) CLR IE.7 ;disable all interrupts

Interrupt Priority
When the 8051 is powered up, the priorities are assigned according to the following. In reality, the priority scheme is nothing but an internal polling sequence in which the 8051 polls the interrupts in the sequence listed and responds accordingly.
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Interrupt Priority
We can alter the sequence of interrupt priority by assigning a higher priority to any one of the interrupts by programming a register called IP (interrupt priority). To give a higher priority to any of the interrupts, we make the corresponding bit in the IP register high.
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Interrupt Priority (IP) Register
Reserved
PS
PT1 PX1
PT0
PX0
Serial Port Timer 1 Pin INT 1 Pin Priority bit=1 assigns high priority Priority bit=0 assigns low priority
INT 0 Pin Timer 0 Pin
The ACC Accumulator

Commonly used for move and arithmetic instructions. Can be referred to in several ways: Implicitly in op-codes. Referred to as ACC (or A) for instructions that allow specifying a register. By its SFR address 0E0H. Operates in a similar manner to the 8085 accumulator. Bit addressable. ACC.2 means bit 2 of the ACC register.
The B Register
Commonly used as a temporary register, much like a 9th R register. Used by two op-codes MUL AB, div AB B register holds the second operand and will hold part of the result Upper 8 bits of the multiplication result Remainder in case of division. Can also be accessed through its SFR address of 0F0H. Bit addressable.
The DPL and DPH Registers

2 8-bit registers that can be combined into a 16-bit DPTR Data Pointer. Used by commands that access external memory Also used for storing 16bit values mov DPTR, #data16 ; setup DPTR with 16bit ext address movx A, @DPTR ; copy mem[DPTR] to A
Can be accessed as 2 separate 8-bit registers if needed. DPTR is useful for string operations and Look-Up-Table (LUT) operations.
The SP Register
SP is the stack pointer. SP points to the last used location of the stack. Push operation will first increment SP and then copy data. Pop operation will first copy data and then decrement SP. In 8051, stack grows upwards (from low memory to high memory) and can be in the internal RAM only. On power-up, SP points to 07H. Register banks 2,3,4 (08H to 1FH) form the default stack area.
Stack can be relocated by setting SP to the upper memory area in 30H to 7FH. mov SP, #32H
The PSW Register

Program Status Word is a bit addressable 8-bit register that has all the flags.
MSB CY AC F0 RS1 RS2 OV LSB P
Symbol CY AC F0 RS1 RS2 OV P
Position PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 Carry Flag
Function Auxiliary Carry Flag. For BCD Operations Flag 0. Available to the user for general purposes. Register bank select bits. Set by software to determine which register bank is being used. Overflow Flag Not used Parity Flag. Even Parity.
The P0, P1, P2, and P3 Registers

Port Latches. Specify the value to be output on the specific output port or the value read from the specific input port. Bit addressable. First bit has the same address as the register. Example: P1 has address 90H in the SFR, so P1.7 or address 97H refer to the same bit.
Link: SFR address
The SBUF Register

Serial Port Data Buffer. 2 registers at the same location
One is read-only used for reading serial input data.
Serial Data Receive Buffer.
The other is write-only used for storing serial output data.

Serial Data Transmit Buffer.
Link: SFR address
Timer Registers TH0 and TL0

The high and low bytes of the 16-bit counting register for timer/counter T0. There is also a TH1 / TL1 pair for the T1 timer. In the 8052, one more pair exists (TH2) / (TL2) for the T2 timer.
(RCAP2H) and (RCAP2L) exist only in the 8052 and they are copies of the TH2 and TL2 registers.
Link: SFR address
Control Registers
IP Interrupt Priority. IE Interrupt Enable. TMOD Timer Mode. TCON Timer Control. T2CON Timer 2 Control (8052) SCON Serial Port Control. PCON Power Control (80C51).
Link: SFR address
8051 Software Overview

1. Addressing Modes 2. Instruction Set 3. Programming
8051 Addressing Modes

The CPU can access data in various ways, which are called addressing modes
1. 2. 3. 4. 5.
Immediate Register Direct Register indirect External Direct
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Immediate Addressing Mode

The source operand is a constant. The immediate data must be preceded by the pound sign, # Can load information into any registers, including 16-bit DPTR register
DPTR can also be accessed as two 8-bit registers, the high byte DPH and low byte DPL
113
Register Addressing Mode

Use registers to hold the data to be manipulated.
The source and destination registers must match in size. MOV DPTR,A will give an error
The movement of data between Rn registers is not allowed MOV R4,R7 is invalid
Direct Addressing Mode

It is most often used the direct addressing mode to access RAM locations 30 7FH. The entire 128 bytes of RAM can be accessed. Contrast this with immediate addressing mode, there is no # sign in the operand.
115
SFR Registers & their Addresses

MOV 0E0H,#55H MOV A,#55H MOV 0F0H,#25H MOV B,#25H MOV 0E0H,R2 MOV A,R2 MOV 0F0H,R0 MOV B,R0 ;is the same as ;which means load 55H into A (A=55H) ;is the same as ;which means load 25H into B (B=25H) ;is the same as ;which means copy R2 into A ;is the same as ;which means copy R0 into B
116
SFR Addresses ( 1 of 2 )
Intel 8051 Programming
117
SFR Addresses ( 2 of 2 )
118
Example
119
Stack and Direct Addressing Mode

Only direct addressing mode is allowed for pushing or popping the stack. PUSH A is invalid. Pushing the accumulator onto the stack must be coded as PUSH 0E0H.
120
Register Indirect Addressing Mode

A register is used as a pointer to the data. Only register R0 and R1 are used for this purpose. R2 R7 cannot be used to hold the address of an operand located in RAM. When R0 and R1 hold the addresses of RAM locations, they must be preceded by the @ sign.
121
Register Indirect Addressing Mode

The advantage is that it makes accessing data dynamic rather than static as in direct addressing mode.
Looping is not possible in direct addressing mode. Write a program to clear 16 RAM locations starting at RAM address 60H.
122
External Direct
External Memory is accessed. There are only two commands that use External Direct addressing mode: MOVX A, @DPTR MOVX @DPTR, A DPTR must first be loaded with the address of external memory.
123
8051 Instruction Set
124
MOV Instruction
MOV destination, source ; copy source to destination.
MOV A,#55H ;load value 55H into reg. A MOV R0,A ;copy contents of A into R0 ;(now A=R0=55H) MOV R1,A ;copy contents of A into R1 ;(now A=R0=R1=55H) MOV R2,A ;copy contents of A into R2 ;(now A=R0=R1=R2=55H) MOV R3,#95H ;load value 95H into R3 ;(now R3=95H) MOV A,R3 ;copy contents of R3 into A ;now A=R3=95H
Intel 8051 Programming 125
ADD Instruction
ADD A, source ;ADD the source operand to the accumulator
MOV A, #25H
MOV R2,#34H
;load 25H into A

;load 34H into R2
ADD A,R2
;add R2 to accumulator
;(A = A + R2)
126
Structure of Assembly Language

ORG 0H MOV R5,#25H MOV R7,#34H MOV A,#0 ADD A,R5 ADD A,R7 ADD A,#12H HERE: SJMP HERE END ;start (origin) at location 0 ;load 25H into R5 ;load 34H into R7 ;load 0 into A ;add contents of R5 to A ;now A = A + R5 ;add contents of R7 to A ;now A = A + R7 ;add to A value 12H ;now A = A + 12H ;stay in this loop ;end of asm source file
Intel 8051 Programming 127
Data Types & Directives

DATA1: DATA2: DATA3: DATA4: DATA6: ORG DB DB DB ORG DB ORG DB 500H 28 00110101B 39H 510H 2591 518H My name is Joe
;DECIMAL (1C in Hex) ;BINARY (35 in Hex)
;HEX
; ASCII NUMBERS ;ASCII CHARACTERS
128
ADD Instruction and PSW
129
ADD Instruction and PSW
130
Multiplication of Unsigned Numbers

MUL AB ; A B, place 16-bit result in B and A
;load 25H to reg. A ;load 65H in reg. B ;25H * 65H = E99 where B = 0EH and A = 99H
MOV A,#25H MOV B,#65H MUL AB
Table 6-1:Unsigned Multiplication Summary (MUL AB) Multiplication

byte byte
Operand 1
A
Operand 2
B
Result
A=low byte, B=high byte
131
Division of Unsigned Numbers

DIV AB ; divide A by B
MOV A,#95H MOV B,#10H DIV AB ;load 95 into A ;load 10 into B ;now A = 09 (quotient) and B = 05 (remainder)
Table 6-2:Unsigned Division Summary (DIV AB) Division byte / byte Numerator A Denominator B Quotient A Remainder B
132
Checking an input bit

JNB (jump if no bit) ; JB (jump if bit = 1)
133
Switch Register Banks
134
Pushing onto Stack
135
Popping from Stack
136
Looping
137
Loop inside a Loop (Nested Loop)
138
8051 Conditional Jump Instructions
139
Conditional Jump Example
140
Conditional Jump Example
141
Unconditional Jump Instructions

All conditional jumps are short jumps
Target address within -128 to +127 of PC
LJMP (long jump): 3-byte instruction

2-byte target address: 0000 to FFFFH Original 8051 has only 4KB on-chip ROM
SJMP (short jump): 2-byte instruction

1-byte relative address: -128 to +127
142
Call Instructions
LCALL (long call): 3-byte instruction
2-byte address Target address within 64K-byte range
ACALL (absolute call): 2-byte instruction

11-bit address Target address within 2K-byte range
143

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Introduction to Microcontrollers

Why do we need to learn Microprocessors/controllers?

The necessary tools for a microprocessor/controller

Microprocessor vs. Microcontroller

Microcontrollers for Embedded Systems

Criteria for Choosing a Microcontroller

The number of I/O pins and the timer on chip

Criteria for Choosing a Microcontroller

8051 CPU Operation

Pin Description of the 8051

Pin Diagram of the 8051

Suresh.P.Nair , HOD - ECE , RCET

XTAL1 and XTAL2

XTAL1 and XTAL2 ..

XTAL1 and XTAL2 ..

PSEN and ALE

For External Data Memory, PSEN = 1

I/O Port Pins

Port 1 and Port 2

In 8051-based systems with external memory connections:

Pin Description Summary

P1.0 - P1.7 P2.0 - P2.7

Pin Description Summary

General Block Diagram of 8051

Detailed Block Diagram

Suresh.P.Nair , HOD - ECE , RCET

8051 Memory Space

8051 Memory Structure

128 Data Memory

Internal RAM Structure

SFR [ Special Function Registers] 128 Byte Internal RAM

Special Function Registers [SFR]

Suresh.P.Nair , HOD - ECE , RCET

Program Status Word [PSW]

8051 instructions that affects flag

128 Byte RAM

The 128 bytes are divided into 3 different groups as follows:

General Purpose Area

8051 RAM with addresses

8051 Register Bank Structure

8051 Register Banks with address

8051 Programming Model

Suresh.P.Nair , HOD - ECE , RCET

Bit Addressable & Byte Addressable

Single bit Instructions

Bit Addressable Programming

8051 Peripheral Overview

The TMOD byte is not bit addressable.

8051 Timer Modes 8051 TIMERS

Maximum Count = 1FFFh (0001111111111111)

Maximum Count = FFFFh (1111111111111111)

Maximum Count = FFh (11111111)

Maximum Count = 1FFFh (0001111111111111)

Maximum Count = FFFFh (1111111111111111)

Maximum Count = FFh (11111111)

1/12 11.0529 MHz = 921.6 MHz; T = 1/921.6 kHz = 1.085 us

8051 Serial Port

Basics of Serial Communication

Basics of Serial Communication

Asynchronous Start & Stop Bit