William Stallings Computer Organization and Architecture 6 Edition Instruction Sets: Addressing Modes and Formats
William Stallings Computer Organization and Architecture 6 Edition Instruction Sets: Addressing Modes and Formats
Computer Organization
and Architecture
6th Edition
Chapter 11
Instruction Sets:
Addressing Modes and Formats
Addressing Modes
Immediate
Direct
Indirect
Register
Register Indirect
Displacement (Indexed)
Stack
Immediate Addressing
Direct Addressing
Address field contains address of operand
Effective address EA = address field (A)
ADD AX, value
Value DB 05h
e.g. EA = (((A)))
Draw the diagram yourself
Shorter instructions
Faster instruction fetch
MOV AX, BX
ADD AX, BX
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Displacement Addressing
EA = A + (R)
A = base value
R = register that holds displacement
or vice versa
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15
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Base-Register Addressing
A holds displacement
EA = (CS) + A
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Indexed Addressing
A = base
R = displacement
EA = A + (R)
EA = A + (R)
R++
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Combinations
Postindex
EA = (A) + (R)
Preindex
EA = (A+(R))
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Stack Addressing
Operand is (implicitly) on top of stack
e.g.
ADD
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Immediate
Register operand
Displacement
Base
Base with displacement
Scaled index with displacement
Base with index and displacement
Base scaled index with displacement
Relative
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Load/store architecture
Indirect
Instruction includes 16 bit displacement to be added to
base register (may be GP register)
Can replace base register content with new address
Indirect indexed
Instruction references base register and index register
(both may be GP)
EA is sum of contents
Branch address
Absolute
Relative
Indirect
Arithmetic
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25
Instruction Formats
Layout of bits in an instruction
Includes opcode
Includes (implicit or explicit) operand(s)
Usually more than one instruction format
in an instruction set
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Instruction Length
Memory size
Memory organization
Bus structure
CPU complexity
CPU speed
27
Allocation of Bits
Number of addressing modes
Number of operands
Register versus memory
Number of register sets
Address range
Address granularity
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