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    Introduction To Cplds and Fpgas: by N.Chandrasekharan

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    William Arief Weng
    CPLDs and FPGAs are types of reconfigurable hardware. CPLDs use AND-OR arrays and crossbar switches to interconnect function blocks. FPGAs use configurable logic blocks (CLBs) and a programmable interconnect to implement logic functions. The FPGA interconnect uses a switch matrix and routing channels to connect CLBs. Designs are mapped to FPGA resources through technology mapping, placement, and routing steps to program the FPGA. FPGAs can serve as reconfigurable coprocessors or embedded systems to offload processing from a main processor.

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    Introduction To Cplds and Fpgas: by N.Chandrasekharan

    Uploaded by

    William Arief Weng
    77 views21 pages
    CPLDs and FPGAs are types of reconfigurable hardware. CPLDs use AND-OR arrays and crossbar switches to interconnect function blocks. FPGAs use configurable logic blocks (CLBs) and a programmable interconnect to implement logic functions. The FPGA interconnect uses a switch matrix and routing channels to connect CLBs. Designs are mapped to FPGA resources through technology mapping, placement, and routing steps to program the FPGA. FPGAs can serve as reconfigurable coprocessors or embedded systems to offload processing from a main processor.

    Original Description:

    Its an introduction to FPGA

    Original Title

    Introduction to FPGA

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    CPLDs and FPGAs are types of reconfigurable hardware. CPLDs use AND-OR arrays and crossbar switches to interconnect function blocks. FPGAs use configurable logic blocks (CLBs) and a programmable interconnect to implement logic functions. The FPGA interconnect uses a switch matrix and routing channels to connect CLBs. Designs are mapped to FPGA resources through technology mapping, placement, and routing steps to program the FPGA. FPGAs can serve as reconfigurable coprocessors or embedded systems to offload processing from a main processor.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    77 views21 pages

    Introduction To Cplds and Fpgas: by N.Chandrasekharan

    Uploaded by

    William Arief Weng
    CPLDs and FPGAs are types of reconfigurable hardware. CPLDs use AND-OR arrays and crossbar switches to interconnect function blocks. FPGAs use configurable logic blocks (CLBs) and a programmable interconnect to implement logic functions. The FPGA interconnect uses a switch matrix and routing channels to connect CLBs. Designs are mapped to FPGA resources through technology mapping, placement, and routing steps to program the FPGA. FPGAs can serve as reconfigurable coprocessors or embedded systems to offload processing from a main processor.

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    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    of 21

    Introduction to CPLDs and FPGAs

    By
    N.Chandrasekharan
    CPLD Families
    CPLD Block Diagram
    1
    0

    0
    FF

    0 1

    An individual switch
    In a crossbar is a
    diamond switch
    O/Ps

    Programmable switch
    Function block (~ PLA w/ 1 o/p
    for interconnecting
    I/Ps that can be FFed)
    various FBs
    Crossbar Switch
    CPLD Function Block

    Extra function (e.g., g,


    h) i/ps for OR term
    2:1 Mux

    Example function
    f= ab+bc+g+h

    D-FF

    PLA-like AND array


    Literal inputs (e.g., a, b, c)
    Field Programmable Gate Arrays (FPGAs)
    FPGA Types

    (Anti-fuse technology)
    FPGA Families
    SRAM-type FPGA Interconnect Architecture

    Diamond
    switch

    Horizontal
    routing
    (interconnect)
    channel
    PSM: Programmable Switch Matrix (for
    making connections between interconnects
    of different channels). The structure shown
    only allows i-to-i connections
    Vertical
    routing
    channels CLB: Configuration Logic Block
    (programmable logic cell)
    SRAM-type FPGA Interconnect
    Architecture (contd)

    Cell Connection
    Matrix (CCM)

    PSM
    Configuration Logic Block (CLB)

    5-i/p function implemented using G, F and H LUTs (Look Up Tables) using Shannons
    Expansion: p(a,b,c,d,e) = a p(1, b, c, d, e) + a p(0, b, c, d, e) = a q(b,c,d,e) + ar(b,c,d,e).
    q( ) impl. using LUT G, r impl. using LUT F and p=ag + ah impl. using LUT H
    The LUT o/ps can go through a FF (for seq. ckt design) or bypass it for a combinational o/p
    This is called technology mapping: mapping the logic to CLB logic components
    Technology Mapping
    Programming a CLB (contd)
    Components of Modern FPGAs
    Digital System: Implementation Spectrum

    Microprocessor Reconfigurable ASIC


    Hardware

    Software Firmware Hardware

    ASIC gives high performance at cost of


    inflexibility.
    Processor is very flexible but not tuned to the
    application.
    Reconfigurable hardware is a nice
    compromise.
    Simplified FPGA Logic Element

    Inputs Look-Up Out


    Table
    (LUT)

    State
    Clock

    Enable
    High-level Compilers & FPGAs
    Difficult to estimate hardware resources.
    Some parts of program more appropriate for
    processor (hardware/software codesign).
    Compiler must parallelize computation
    across many resources.
    Engineers like to write in C/VHDL/Verilog
    rather than pushing little blocks around.
    for (i = 0; i<n, i++)
    {
    c[i] = a[i] + b[i]
    }
    Some success stories
    Translating a Design to an FPGA
    RTL Circuit Array

    . A
    . + C
    B
    C = A+B
    .

    CAD to translate circuit from text description to


    physical implementation well understood.
    Most current FPGA designers use register-
    transfer level specification (allocation and
    scheduling)
    Same basic steps as ASIC design.
    Circuit Compilation & Implementation:
    Basic Steps
    1. Technology Mapping

    LUT

    4. Convert all implementation


    2. Placement
    LUT details to FPGA programming
    info (configuration bits): LUT
    RAM bits, CCM & PSM
    ? FF/SRAM bits, etc.
    Can store config bits on disk or ROM and
    Assign a logical LUT to a physical load into FPGA as needed
    location. Can thus use the FPGA to implement
    multiple digital systems (at different times
    or sometimes simultaneously in different
    3. Routing FPGA partitions)

    Select wire segments


    and switches for
    Interconnection.
    Technology Mapping: A Simple Example
    Made of Full Adders
    A B A+B = D
    Co FA Ci

    S
    Logic synthesis tool reduces circuit to
    SOP form
    S = ABCi + ABCi + ABCi + ABCi

    A A
    B LUT Co B LUT S
    Ci Ci

    Co = ABCi + ABCi + ABCi + ABCi


    Processor + FPGA
    Three possibilities
    daughtercard

    Proc FPGA

    chip
    Backplane bus
    (e.g. PCI)
    1. FPGA serves as coprocessor for data
    intensive applications possible project.

    Proc FPGA chip

    2. FPGA serves as embedded digital system


    for lower latency processing. Reconfigurable Functional Unit

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