By

Makeleni Siyanda

Functions of combinational
Logic
 “Who is wise? He that learns from
everyone.
Who is powerful? He that governs his
passion.
Who is rich? He that is content.
Who is that? Nobody.”
By- Benjamin Franklin
 Section Objectives
 Distinguish between half-adder and full-adders.
 Use full-adders to implement multibit parallel binary adders.
 Explain the differences between ripple carry and look-ahead
carry parallel adders.
 Use the magnitude comparator to determine the relationship
between two binary numbers and use cascaded comparators
to handle the comparison of larger numbers.
 Implement a basic binary decoder.
 Use BCD-to-7-segement decoders in display systems.
 Apply a decimal-to-BCD priority encoder in a simple keyboard
application.
 Convert from BCD to binary, binary to Gray code, and
Gray code to binary by using logic devices.
 Apply multiplexers in data selection, multiplexed
displays, logic function generation, simple
communications systems.
 Used decoders as demultiplexers.
 Explain the meaning of parity.
 Use parity generators and checkers to detect bit errors
in digital systems.
 Implement a simple data communications system.
 Identify glitches, common bugs in digital systems.
 Basic Adders

 Adders are important both in computers and

any digital systems where numerical data
processed.
 Two common types:
 half adders.
 full adders.
Half-adder

 Half-adder accepts two binary digits on its

inputs and produces two binary digits on its
outputs, a sum bit and carry bit.
Full-Adder

 The full-adder accepts three inputs including

an input carry and generates a sum and
output carry.
 Basic difference between a full-adder and a
half-adder is that the full-adder accepts an
input carry.
 A logic symbol for full-adder is shown below.
Parallel Binary Adder

 The previous full-adder take care of two

single bit e.g. A and B.
 To add Binary number with more than one
bits, additional adder are needed.e.g. When
one binary number is added to another, each
column generates a sum bit and a 1 or 0 carry
bit to the next column to the left, as
illustrated below
Four-Bit Parallel Adder

 A basic 4-bit binary parallel adder is

implemented with full-adders as shown
below.
 Examples of 4-bit parallel adders are 74LS83A
and74LS283 low-power schottky TTL device.
The differences between the two is the pin
number.
Adder Expansion

 The 4-bit parallel adder can be expanded to

handle the addition of two 8-bit numbers by
using two 4-bit adders and connecting the
carry input of the least significant adder to
ground because there is no carry into least
significant bit position and by connecting the
carry output of least significant adder to the
carry input of the most significant adder. This
process is called cascading.
 Adder-Application

 An example of full-adder and parallel adders

application is a simple voting system that can
be used to simultaneously provide Yes or No
vote.
 Comparators

 The basic function of a comparator is to

compare the magnitudes of two quantities to
determine the relationship of those quantities.
In its simplest form, a comparator circuit
determines whether two numbers are equal.
 The exclusive-OR gate can be used as a basic
comparator because it output is 1 if the two
input bits are not equal and a 0 if the input bits
are equal.
 In order to compare binary numbers containing
two bits each, an additional exclusive-OR gate is
necessary. Two LSBs of two numbers are
compared by gate G1, and the two MSBs are
compared by gate G2, as shown in fig.6-20
 In fig.6-20,the output of exclusive-OR gate is 1
when the two input are not equal and 0 when
equal.
 Inverter and AND gates are used to provide
equality or inequality in the inputs of each gate
Integrated Circuit Comparator

 In addition to the equality output, many IC

comparators provide additional output such
as greater than, less than and equal to.
 To determine an inequality of A and B in two 4-
bit binary. steps are as follows:
 We first examine the highest-order bit in each
number.
 If A3=1 and B3=0, number A is greater than
number B
 If A3=0 and B3=1, number A is less than number B
 If A3=B3, then we must examine the next lower
bit position for an inequality.
Example

 Let A be 0 1 1 1 and B is 1 0 0 0. Comparing A3 and

B3 indicates that A<B because A3=0 and B3=1. In
this case ignore the lower bit because the A<B has
been established.
 Let A be 1 1 1 0 and B is 1 0 0 1. Since both the A3
and B3 are equal, then consider the lower bits
A2=1 and B2=0, A>B , Ignore the next lower bits.
 Case 3, lf A is 1 1 1 0 and B is 1 1 1 1.Here all the
bits are equal except the LSBs A0=0 and B0=1
indicate A<B
 Analyze the comparator operation in Fig.6-24
for the numbers A3A2A1A0=1010 and
B3B2B1B0=1001.
The 7485 4-Bit Magnitude Comparator

 The 7485 is an MSI comparator that is also

available in the LS TTL family.
 To expand the comparator, the A>B, A=B, and
A<B outputs of the less significant
comparator are connected to the
corresponding cascading inputs of the next
higher comparator.
 The least significant must have a HIGH on the
A=B input and LOWs on the A<B and A>B
inputs.
 DECODERS

 The basic function of a decoder is to detect

the presence of a specified combination of
bits(code) on its inputs and to indicate the
presence of that code by a specified output
level. In its general form, a decoder has n
input lines to handle n bits and from one to 2n
Output lines to indicate the presence of one or
more n-bit combinations.
 Basic Binary Decoder

 Suppose we need binary 1001 occurs on the

inputs of a digital circuit. We can set the
output signature to be 1 or 0 for the input of
such numbers.
The 4-Bit Binary Decoder

 In order to decode all possible combinations

of four bits, sixteen decoding gates are
required (2^4=16). This type of decoder is
called a 4-line-to-16-line decoder because
there are four inputs and sixteen outputs
.Table 6-5 shows a general table of 4-line-to-
16-line decoder.
 Figure 6-31 show BIN/DEC i.e. binary input
makes a corresponding to decimal output.
 A good example of 4-line-to-16-line decoder
is 74154 and 74HC154 for MSI LS TTL and
CMOS family respectively.
 The input label 1,2,4, and 8 represent the
binary weights of the input bits
2^3,2^2,2^1,2^0.
BCD-to-Decimal Decoder

 The BCD-to-decimal decoder converts each

BCD code(8421 code) into one of ten possible
decimal digit indications. It is referred to as a
4-line-to-10-line decoder or a 1-of-10
decoder.
 The BCD codes represents only the ten
decimal digits 0 through 9.
 To display numeric information, a device called a seven-
segment display unit may be used. The device is shown
below. It is made up of seven LEDs. The LED may turn
on if it is activated.
 To display a certain number, the appropriate segment
must be activated.
 The segments are labeled A, B , C , D , E , F and G.
 For example, to display a 0 ,segments A,B,C,D,,E and F
must be activated. Segment G must not be activated.
 The table below also show the relationship between
BCD and the seven-segment code
IC 7447 BCD-to-seven-segment code decoder,
connected to a display unit.
 Encoders

 An encoder is a combinational logic circuit that

essentially performs a “reverse” decoder function.
An encoder accepts an active level on one of its
inputs representing a digit, such as a decimal or
octal digit, and converts it to a coded output, such
as BCD or binary. Encoders can also be devised to
encode various symbols and alphabetic
characters. The process of converting from
familiar symbols or numbers to a coded format is
called encoding.
The Decimal-to-BCD Encoder

 This type of encoder has ten inputs-one for

each decimal digit-and four outputs
corresponding to the BCD code, as shown
below.
 Read 74147 Decimal-to-BCD Encoder
 The Decimal-to-BCD priority Encoder
 The 74148 Octal-to-Binary Encoder
 Note : you must write a short note on each
inside your tutorial book.
 Code Converters

 BCD-to-Binary Conversion
 The binary numbers representing the weights
of the BCD bits are summed to produce the
total binary number.
 Let consider decimal number 87 and
expressed in BCD as 1000 0111
 The left most represent 80 while the right 4-
bits represent 7.
 ten digit units digit
 Weight 80 40 20 10 8421
 Bit designation B3 B2 B1 B0 A3A2A1A0
Example
Binary Coded Decimal(BCD)

 The 8421 code is a type of binary coded

decimal (BCD) code. The designation 8421
indicates the binary weights of the four bits
2^3,2^2,2^1,2^0.
The Gray Code

 The Gray code is unweighted and is not an

arithmetic code; that is, there are no specific
weights assigned to the bit positions.
Multiplexers(Data Selector)

 A multiplexer(MUX) is a device that allows

digital information from several sources to be
routed onto a single line for transmission over
that line to a common destination. The basic
multiplexer has several data-input lines and a
single output line. It also has data-select
inputs, which permit digital data on any one of
the inputs to be switched to the output line.
Multiplexers are also known as data selector.
 A logic symbol for a 4-input multiplexer
(MUX) is shown below. There are two data
select bits and four data-input lines.
 Demultiplexers

 A demultiplexer(DMUX)basically reverses the

multiplexing function. It takes data from one
line and distributes them to a given number
of output lines. For this reason, the
demultiplexer is also known as a data
distributor. Decoder can also be used as
demultiplexers.
Example
THANKS