Adc Dac
Adc Dac
Sam Suresh.J
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Objectives
• Recognize the relationship between digital and analog
values in D/A and A/D converters.
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Analog signals
• Analog output is typical of most transducers and sensors. In
order to use the power of digital electronics with the real
world, one must convert from analog to digital and vice
versa.
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Relationship Between Analog and Digital Values
Vmax = 7.5V
7.0V
1111
1110
An ideal A/D converts an analog voltage to a
6.5V
6.0V
1101 linearly proportional digital representation.
1100
5.5V 1011
Vmax = 7.5V
7.0V
1111
1110
Let the A/D converter has n-bit digital output
6.5V
6.0V
1101 and let A be Analog Value and D be the
1100
5.5V 1011 equivalent Digital Number.
5.0V 1010
4.5V 1001
4.0V
3.5V
1000
0111
Then,
3.0V 0110
2.5V 0101
2.0V 0100 Analog Digital
1.5V 0011 Vmin 0..000
1.0V
0.5V
0010
A D
0001
Vmin = 0V 0000 Vmax 1..111
proportionality
A Vmin
D (2 n 1)
Vmax Vmin
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Some definitions
Offset: minimum analog value Vmin
Step Size (or Resolution, Q): smallest analog change resulting from
changing one bit in the digital number, or the analog difference between
two consecutive digital numbers:
Vmax Vmin
Q
2n 1
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Example
Given an 4-bit A/D converter having an analog input that
ranges form 0V to 7.5V. What is the resolution of this A/D
converter?
Answer:
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D/A Converter
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Binary representation and bit weight
In an electronic circuit, a combination of high voltage (+5V) and
low voltage (0V) is usually used to represent a binary number.
For example, a binary number 1010 is represented by
Weighting 23 22 21 20
Binary Digit 1 0 1 0
State +5V 0V +5V 0V
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The binary weighted resistor network
– Comprises of a register and resistor network
– Output of each bit of the register will be low (0V) or high (5V)
– Input resistance is inversely proportional to the binary weight
of each digit.
R I1 Rf
MSB
2R I2 If
4-bit register
4R I3 -
S I
LSB 8R I4 +
Vo
Vo I f R f ( I1 I 2 I 3 I 4 ) R f 12
D/A Example
In the previous D/A, calculate the output voltage for an input code word
0110 if a logic 1 is 5V and a logic 0 is 0V, and
R = Rf = 1k.
Answer:
• I1 = I4 = 0
• I2 = 5V / 2R = 5 / 2KΩ = 2.5 mA
• I3 = 5V / 4R = 5 / 4KΩ = 1.25 mA
Vo = -If Rf
= -(I4 + I3+ I2+ I1)Rf
= -(2.5+1.25) x 1000
= -3.75 V 13
The binary weighted resistor network
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The R-2R Ladder Resistor Network
• Only two resistance values R and 2R are used.
• The principle of the network is based on Kirchhoff's current rule.
• Note that the network of resistors to the right of each node has an
equivalent resistance of 2R.
I I I
Vo R f b2 b1 b0
2 4 8 16
Analog to Digital Converter
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A/D converter
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The Sample & Hold (S/H)
To measure an AC voltage at a particular instant in time, it is
necessary to sample the waveform with a ‘sample and hold’
(S/H) circuit.
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Types of A/D Converters
1. Counting type
2. Parallel or Flash
3. Successive Approximation
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1- Counting A/D
Comparator START
clock
Counter
D/A
Digital Output
o When START is received, control logic sets counter to 0, and turns on Clock
sending regular pulses to the counter.
o As the Clock sends regular pulses to the counter, the counter outputs a digital
signal to the Digital-to-Analog converter
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• As the counter counts, its output to the D/A generates a staircase ramp to
the comparator.
Vin
• As the ramp voltage increases to the comparator, it rises closer and closer to
Vin. When the ramp voltage exceeds Vin , the comparator output shifts which
signals the control logic to turn off the clock. With the clock off, the counter
reading is proportional to Vin.
• With a counting type A/D, if the signal is varying rapidly, the counter must
count up and reset before each cycle can begin, making it difficult to follow
the signal.
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2- Flash Converters
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Flash Converters
• The cost of this type of converter stems from the circuit complexity
since the number of comparators and resistors required increases
rapidly. The 3-bit example required 7 converters, 6-bits would
require 63, while an 8-bits converter would need 255 comparators
and equivalent precision resistors.
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3- Successive approximation A/D
Digital
Output
Data
comparator
Successive clock
Approximation
Register
STRT
At the beginning, all bits from the SAR are set to zero, and
conversion begins by taking STRT line low.
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Successive approximation A/D
Digital
Output
Data
comparator
Successive clock
Approximation
Register
STRT
First the logic in the SAR sets the MSB bit equal to 1
(+5 V). Remember that a 1 in bit 7 will be half of full
scale.
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Successive approximation A/D
Digital
Output
Data
comparator
Successive clock
Approximation
Register
STRT
Digital
Output
Data
comparator
Successive clock
Approximation
Register
STRT
If the D/A output is > Vin then the MSB is set to 0 and
the next bit is set equal to 1.
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Successive approximation A/D
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Example
Calculate the maximum conversion time of
(a)a 8-bit counting A/D and
(b) a successive approximation A/D,
if the clock rate is 2MHz.
Solution:
(a) For a 8-bit counting A/D, the maximum number of count is
nc = 28 = 256
Therefore, the maximum conversion time is
nc 256
Tc 128 10 6
s 128s
f 2 10 6
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Example, continued
n 8
Tc 4 10 6
s 4 s
f 2 10 6
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Accuracy of A/D Conversion
There are two ways to improve accuracy of
A/D conversion:
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Aliasing
• Occurs when the input signal is changing much faster
than the sample rate.
Nyquist Rule:
• Use a sampling frequency at least twice as high as
the maximum frequency in the signal to avoid
aliasing.
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