• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 133 matches

• 1990
• 
  Pierre Abouzeid, K. Sakouti, Gabriele Saucier, Franck Poirot:
  Multilevel Synthesis Minimizing the Routing Factor. DAC 1990: 365-368
• 
  K. Adamiak, R. Allen, J. Poltz, C. Rebizant, A. Wexler:
  System Simulation of Printed Circuit Boards Including Packages and Connectors. DAC 1990: 413-418
• 
  Vishwani D. Agrawal, Kwang-Ting Cheng:
  Test Function Specification in Synthesis. DAC 1990: 235-240
• 
  Tim Andrews:
  Object Databases in Electronic Design: Implementation Experiences (Panel Abstract). DAC 1990: 679
• 
  James Armstrong, Chang Cho, Sandeep Shah, Chakravarthy Kosaraju:
  The VHDL Validation Suite. DAC 1990: 2-7
• 
  Pranav Ashar, Srinivas Devadas, A. Richard Newton:
  A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. DAC 1990: 601-606
• 
  Timothy J. Barnes:
  SKILL: A CAD System Extension Language. DAC 1990: 266-271
• 
  Wayne Bower, Carl Seaquist, Wayne H. Wolf:
  A Framework for Industrial Layout Generators. DAC 1990: 419-424
• 
  Karl S. Brace, Richard L. Rudell, Randal E. Bryant:
  Efficient Implementation of a BDD Package. DAC 1990: 40-45
• 
  Daniel R. Brasen, Michael L. Bushnell:
  MHERTZ: A New Optimization Algorithm for Floorplanning and Global Routing. DAC 1990: 107-110
• 
  Maurício Breternitz Jr., John Paul Shen:
  Architecture Synthesis of High-Performance Application-Specific Processors. DAC 1990: 542-548
• 
  Randall J. Brouwer, Prithviraj Banerjee:
  PHIGURE: A Parallel Hierarchical Global Router. DAC 1990: 650-653
• 
  Randal E. Bryant:
  Symbolic Simulation - Techniques and Applications. DAC 1990: 517-521
• 
  Jerry R. Burch, Edmund M. Clarke, Kenneth L. McMillan, David L. Dill:
  Sequential Circuit Verification Using Symbolic Model Checking. DAC 1990: 46-51
• 
  Kenneth M. Butler, M. Ray Mercer:
  The Influences of Fault Type and Topology on Fault Model Performance and the Implications to Test and Testable Design. DAC 1990: 673-678
• 
  H. Cai, Stefaan Note, Paul Six, Hugo De Man:
  A Data Path Layout Assembler for High Performance DSP Circuits. DAC 1990: 306-311
• 
  Yang Cai, D. F. Wong:
  A Channel/Switchbox Definition Algorithm for Building-Block Layout. DAC 1990: 638-641
• 
  Erik C. Carlson, Rob A. Rutenbar:
  Design and Performance Evaluation of New Massively Parallel VLSI Mask Verification Algorithms in JIGSAW. DAC 1990: 253-259
• 
  Andrea Casotto, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
  Design Management Based on Design Traces. DAC 1990: 136-141
• 
  Srimat T. Chakradhar, Vishwani D. Agrawal, Michael L. Bushnell:
  Automatic Test Generation Using Quadratic 0-1 Programming. DAC 1990: 654-659
• 
  Sreejit Chakravarty:
  On Synthesizing and Identifying Stuck-Open Testable CMOS Combinational Circuits (extended abstract). DAC 1990: 736-739
• 
  Pak K. Chan:
  Algorithms for Library-Specific Sizing of Combinational Logic. DAC 1990: 353-356
• 
  Abhijit Chatterjee, Richard I. Hartley:
  A New Simultaneous Circuit Partitioning and Chip Placement Approach Based on Simulated Annealing. DAC 1990: 36-39
• 
  Basant R. Chawla:
  Distributed Computing Environment for Design Automation in the 90's (Panel Abstract). DAC 1990: 220
• 
  Gwo-Dong Chen, Daniel Gajski:
  An Intelligent Component Database for Behavioral Synthesis. DAC 1990: 150-155
• 
  Kuang-Chien Chen, Saburo Muroga:
  Timing Optimization for Multi-Level Combinational Networks. DAC 1990: 339-344
• 
  Kwang-Ting Cheng, Vishwani D. Agrawal:
  An Entropy Measure for the Complexity of Multi-Output Boolean Functions. DAC 1990: 302-305
• 
  Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli:
  Constraint Generation for Routing Analog Circuits. DAC 1990: 561-566
• 
  Moon-Jung Chung, Sangchul Kim:
  An Object-Oriented VHDL Design Environment. DAC 1990: 431-436
• 
  Richard J. Cloutier, Donald E. Thomas:
  The Combination of Scheduling, Allocation, and Mapping in a Single Algorithm. DAC 1990: 71-76

skipping 103 more matches