research-article

AnyBoard: An FPGA-Based, Reconfigurable System

Authors:

David E. Van den Bout,

Joseph N. Morris,

Douglas Thomae,

Scott Labrozzi,

Peter HallmanAuthors Info & Claims

IEEE Design & Test, Volume 9, Issue 3

Pages 21 - 30

https://doi.org/10.1109/54.156155

Published: 01 July 1992 Publication History

Abstract

AnyBoard, a low-cost, field programmable gate array (FPGA)-based, reconfigurable rapid-prototyping system is described. The system hardware organization and software tools that help users automatically map designs to the FPGAs and manage the design process are discussed. The implementation of a pattern generator design is presented to illustrate the system's effectiveness.

References

[1]

1. A. El Gamal and J. Gill, "Semi-Custom VLSI Systems," Proc. 1989 VLSI Education Conf., and Exposition, National Science Foundation, Santa Clara, Calif., 1989, pp. 79-85.

[2]

2. D.D. Hill and D.R. Cassiday, "Preliminary Description of Tabula Rasa, an Electrically Reconfigurable Hardware Engine," Proc. IEEE Int'l Conf. Computer Design, IEEE Computer Society Press, Los Alamitos, Calif., 1990, pp. 391-394.

[3]

3. J. Viitanen, T. Korpiharju, and H. Kiminkinen, "Mapping Algorithms Onto the TUT Cellular Array Processor," Proc. Int'l Conf. Application-Specific Array Processors , 1990, pp. 235-246.

[4]

4. R. Freeman, "User-Programmable Gate Arrays," IEEE Spectrum, Dec. 1988, pp. 32-35.

Digital Library

[5]

5. H. Wolff, "How Quick Turn Is Filling a Gap," Electronics, Vol. 63, No. 4, Apr. 1990, p. 70.

[6]

6. D. Lopresti et al., "Building and Using a Highly Parallel Programmable Logic Array, Computer, Vol. 24, No. 1, Jan. 1991, pp. 81-89.

Digital Library

[7]

7. D.E. Van den Bout, W. Snyder, and T.K. Miller III, "Rapid Prototyping for Neural Networks," in Advanced Neural Computers , R. Eckmiller, ed., North-Holland, New York, 1990, pp. 91-100.

[8]

8. T. Petersen, D. Thomae, and D.E. Van den Bout, "The AnyBoard: A Rapid-Pro totyping System for Use in Teaching Digital Circuit Design," Proc. First Int'l Workshop Rapid System Prototyping, IEEE CS Press, June 1990, pp. 25-32.

[9]

9. D. Van den Bout et al., "The NCSU De sign Center," Proc. Microelectronic System Education Conf., National Science Foundation, Santa Clara, Calif., 1991.

[10]

10. J.N. Morris, Hardware Design of Rapid Prototyping Reconfigurable Logic System , master's thesis, North Carolina State Univ., ECE Dept., Box 7911, Raleigh, NC 27695-7911, 1992.

[11]

11. D. Thomae, T. Petersen, and D.E. Van den Bout, "The AnyBoard Rapid Prototyping Environment," in Advanced Research in VLSI, C.H. Sequin, ed., MIT Press, Cambridge, Mass., 1991, pp. 356- 370.

Digital Library

[12]

12. C. Fiduccia and R. Mattheyses, "A Linear-Time Heuristic for Improving Network Partitions," Proc. 19th Design Automation Conf., IEEE CS Press, 1982, pp. 175-181.

Digital Library

[13]

13. B. Kernighan and S. Lin, "An Efficient Heuristic Procedure for Partitioning Graphs," Bell System Technical J., Vol. 49, No. 2, Feb. 1970, pp. 291-307.

[14]

14. M. Hanan, P. Wolff, and B. Agule, "Some Experimental Results on Placement Techniques," Proc. Design Automation Conf., IEEE CS Press, 1976, pp. 214-224.

Digital Library

[15]

15. D.E. Van den Bout, "Axe: A language for the Simulation of Digital Hardware," Simulation, Vol. 48, No. 2, Feb. 1987, pp. 56-61.

Digital Library

[16]

16. S.C. Labrozzi, Solder: An Object-Oriented Environment for the Description and Event-Driven Simulation of Structural and Behavioral Digital Designs, master's thesis, North Carolina State Univ., ECE Dept., Raleigh, 1992.

[17]

17. M.S. Wingo, DOOD: The Digital Object-Oriented Database for the AnyBoard Environment , master's thesis, North Carolina State Univ., ECE Dept., Raleigh, 1992.

[18]

18. R.D. Hallman, RapidView: A Hardware Simulation Tool for the AnyBoard Rapid Prototyping Enoironment, master's the sis, North Carolina State Univ., ECE Dept., Raleigh, 1992.

Cited By

Drew DNewcomb JMcGrath WMaksimovic FMellis DHartmann BRekimoto JIgarashi TWobbrock JAvrahami D(2016)The ToastboardProceedings of the 29th Annual Symposium on User Interface Software and Technology10.1145/2984511.2984566(677-686)Online publication date: 16-Oct-2016
https://dl.acm.org/doi/10.1145/2984511.2984566
Shoa AShirani S(2005)Run-time reconfigurable systems for digital signal processing applicationsJournal of VLSI Signal Processing Systems10.1007/s11265-005-4841-x39:3(213-235)Online publication date: 1-Mar-2005
https://dl.acm.org/doi/10.1007/s11265-005-4841-x
Kuusilinna KChang CAmmer MRichards BBrodersen R(2003)Designing BEEEURASIP Journal on Advances in Signal Processing10.1155/S11108657032121542003(502-513)Online publication date: 1-Jan-2003
https://dl.acm.org/doi/10.1155/S1110865703212154
Show More Cited By

Index Terms

AnyBoard: An FPGA-Based, Reconfigurable System
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs

Index terms have been assigned to the content through auto-classification.

Recommendations

Synthesizable Standard Cell FPGA Fabrics Targetable by the Verilog-to-Routing CAD Flow
Special Section on Field Programmable Logic and Applications 2015 and Regular Papers

In this article, we consider implementing field-programmable gate arrays (FPGAs) using a standard cell design methodology and present a framework for the automated generation of synthesizable FPGA fabrics. The open-source Verilog-to-Routing (VTR) FPGA ...
Embedded SoPC Design with Nios II Processor and Verilog Examples
Embedded Design Using Programmable Gate Arrays

Comments

Information & Contributors

Information

Published In

cover image IEEE Design & Test

IEEE Design & Test Volume 9, Issue 3

July 1992

91 pages

ISSN:0740-7475

Issue’s Table of Contents

Copyright © Copyright © 1992 IEEE. All Rights Reserved.

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 July 1992

Qualifiers

Research-article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

14
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 12 Aug 2024

Other Metrics

View Author Metrics

Citations

Cited By

Drew DNewcomb JMcGrath WMaksimovic FMellis DHartmann BRekimoto JIgarashi TWobbrock JAvrahami D(2016)The ToastboardProceedings of the 29th Annual Symposium on User Interface Software and Technology10.1145/2984511.2984566(677-686)Online publication date: 16-Oct-2016
https://dl.acm.org/doi/10.1145/2984511.2984566
Shoa AShirani S(2005)Run-time reconfigurable systems for digital signal processing applicationsJournal of VLSI Signal Processing Systems10.1007/s11265-005-4841-x39:3(213-235)Online publication date: 1-Mar-2005
https://dl.acm.org/doi/10.1007/s11265-005-4841-x
Kuusilinna KChang CAmmer MRichards BBrodersen R(2003)Designing BEEEURASIP Journal on Advances in Signal Processing10.1155/S11108657032121542003(502-513)Online publication date: 1-Jan-2003
https://dl.acm.org/doi/10.1155/S1110865703212154
Ejnioui ARanganathan NKaptanoglu STrimberger S(1999)Multi-terminal net routing for partial crossbar-based multi-FPGA systemsProceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays10.1145/296399.296454(176-185)Online publication date: 1-Feb-1999
https://dl.acm.org/doi/10.1145/296399.296454
Khalid MRose JCong JKaptanoglu S(1998)A hybrid complete-graph partial-crossbar routing architecture for multi-FPGA systemsProceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays10.1145/275107.275119(45-54)Online publication date: 1-Mar-1998
https://dl.acm.org/doi/10.1145/275107.275119
Aggarwal GThaper NAggarwal KBalakrishnan MKumar S(1997)A Novel Reconfigurable Co-Processor ArchitectureProceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications10.5555/523974.834907Online publication date: 4-Jan-1997
https://dl.acm.org/doi/10.5555/523974.834907
Chapman GDufort BEbeling C(1997)Laser correcting defects to create transparent routing for large area FPGA'sProceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays10.1145/258305.258308(17-23)Online publication date: 9-Feb-1997
https://dl.acm.org/doi/10.1145/258305.258308
Matsumura TYamanaka NYamaguchi() RIshikawa() K(1996)Real-time Emulation Method for ATM Switching Systems in Broadband ISDNProceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)10.5555/827259.828075Online publication date: 19-Jun-1996
https://dl.acm.org/doi/10.5555/827259.828075
Xie HForward KAdams KLeask DChan PRose J(1995)An SBus monitor boardProceedings of the 1995 ACM third international symposium on Field-programmable gate arrays10.1145/201310.201335(160-166)Online publication date: 15-Feb-1995
https://dl.acm.org/doi/10.1145/201310.201335
Gschwind M(1994)Reprogrammable hardware for educational purposesACM SIGCSE Bulletin10.1145/191033.19110226:1(183-187)Online publication date: 12-Mar-1994
https://dl.acm.org/doi/10.1145/191033.191102
Show More Cited By

View Options

View options

Media

Figures

Other

Tables

View Issue’s Table of Contents