research-article

Real-time performance analysis of multiprocessor systems with shared memory

Authors:

Simon Schliecker,

Rolf ErnstAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 10, Issue 2

Article No.: 22, Pages 1 - 27

https://doi.org/10.1145/1880050.1880058

Published: 07 January 2011 Publication History

Abstract

Predicting timing behavior is key to reliable real-time system design and verification, but becomes increasingly difficult for current multiprocessor systems on chip. The integration of formerly separate functionality into a single multicore system introduces new intercore timing dependencies resulting from the common use of the now shared resources. This feedback of system timing on local timing makes traditional performance analysis approaches inappropriate.

This article presents a general methodology to model the shared resource traffic and consider its effect on the local task execution. The aggregate busy time captures the timing of multiple accesses to a shared memory far better than the traditional models that focus on the timing of individual events. An iterative approach is proposed to tackle the analysis dependencies that exist in systems with event-driven task activation and dynamic resource arbitration.

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Cited By

Davis RBate I(2022)Mixed Criticality on Multi-cores Accounting for Resource Stress and Resource SensitivityProceedings of the 30th International Conference on Real-Time Networks and Systems10.1145/3534879.3534883(103-115)Online publication date: 7-Jun-2022
https://dl.acm.org/doi/10.1145/3534879.3534883
Arora JRashid SMaia CTovar E(2022)Analyzing Fixed Task Priority Based Memory Centric Scheduler for the 3-Phase Task Model2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)10.1109/RTCSA55878.2022.00012(51-60)Online publication date: Aug-2022
https://doi.org/10.1109/RTCSA55878.2022.00012
Arora JMaia CRashid SNelissen GTovar E(2022)Schedulability analysis for 3-phase tasks with partitioned fixed-priority schedulingJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2022.102706131:COnline publication date: 1-Oct-2022
https://dl.acm.org/doi/10.1016/j.sysarc.2022.102706
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Index Terms

Real-time performance analysis of multiprocessor systems with shared memory
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies
2. General and reference
  1. Cross-computing tools and techniques
    1. Performance

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 10, Issue 2

December 2010

457 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/1880050

Issue’s Table of Contents

Copyright © 2011 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 07 January 2011

Accepted: 01 December 2010

Revised: 01 September 2009

Received: 01 September 2008

Published in TECS Volume 10, Issue 2

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Cited By

Davis RBate I(2022)Mixed Criticality on Multi-cores Accounting for Resource Stress and Resource SensitivityProceedings of the 30th International Conference on Real-Time Networks and Systems10.1145/3534879.3534883(103-115)Online publication date: 7-Jun-2022
https://dl.acm.org/doi/10.1145/3534879.3534883
Arora JRashid SMaia CTovar E(2022)Analyzing Fixed Task Priority Based Memory Centric Scheduler for the 3-Phase Task Model2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)10.1109/RTCSA55878.2022.00012(51-60)Online publication date: Aug-2022
https://doi.org/10.1109/RTCSA55878.2022.00012
Arora JMaia CRashid SNelissen GTovar E(2022)Schedulability analysis for 3-phase tasks with partitioned fixed-priority schedulingJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2022.102706131:COnline publication date: 1-Oct-2022
https://dl.acm.org/doi/10.1016/j.sysarc.2022.102706
Arora JMaia CRashid SNelissen GTovar E(2022)Bus-contention aware WCRT analysis for the 3-phase task model considering a work-conserving bus arbitration schemeJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2021.102345122:COnline publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1016/j.sysarc.2021.102345
Davis RGriffin DBate I(2022)A framework for multi-core schedulability analysis accounting for resource stress and sensitivityReal-Time Systems10.1007/s11241-022-09377-858:4(456-508)Online publication date: 1-Dec-2022
https://dl.acm.org/doi/10.1007/s11241-022-09377-8
Arora JMaia CAftab Rashid SNelissen GTovar E(2021)Bus-Contention Aware Schedulability Analysis for the 3-Phase Task Model with Partitioned SchedulingProceedings of the 29th International Conference on Real-Time Networks and Systems10.1145/3453417.3453433(123-133)Online publication date: 7-Apr-2021
https://dl.acm.org/doi/10.1145/3453417.3453433
Rashid SNelissen GTovar EDi Natale GFummi F(2020)Cache persistence-aware memory bus contention analysis for multicore systemsProceedings of the 23rd Conference on Design, Automation and Test in Europe10.5555/3408352.3408453(442-447)Online publication date: 9-Mar-2020
https://dl.acm.org/doi/10.5555/3408352.3408453
Rashid SNelissen GTovar E(2020)Cache Persistence-Aware Memory Bus Contention Analysis for Multicore Systems2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116265(442-447)Online publication date: Mar-2020
https://doi.org/10.23919/DATE48585.2020.9116265
Arora JMaia CRashid SNelissen GTovar E(2020)Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling2020 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS49844.2020.00050(407-410)Online publication date: Dec-2020
https://doi.org/10.1109/RTSS49844.2020.00050
Maiza CRihani HRivas JGoossens JAltmeyer SDavis R(2019)A Survey of Timing Verification Techniques for Multi-Core Real-Time SystemsACM Computing Surveys10.1145/332321252:3(1-38)Online publication date: 18-Jun-2019
https://dl.acm.org/doi/10.1145/3323212
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