Article

Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW

Authors:

Miroslav N. Velev,

Randal E. BryantAuthors Info & Claims

DAC '01: Proceedings of the 38th annual Design Automation Conference

Pages 226 - 231

https://doi.org/10.1145/378239.378469

Published: 22 June 2001 Publication History

Abstract

We compare SAT-checkers and decision diagrams on the evalua-tion of Boolean formulas produced in the formal verification of both correct and buggy versions of superscalar and VLIW micro-processors. We identify one SAT-checker that significantly out-performs the rest. We evaluate ways to enhance its performance by variations in the generation of the Boolean correctness formu-las. We reassess optimizations previously used to speed up the formal verification and probe future challenges.

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Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW

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cover image ACM Conferences

DAC '01: Proceedings of the 38th annual Design Automation Conference

June 2001

863 pages

ISBN:1581132972

DOI:10.1145/378239

Chairman:
Jan Rabaey
Univ. of California

Copyright © 2001 ACM.

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Published: 22 June 2001

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Cited By

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https://doi.org/10.1007/978-3-031-37989-5_7
Katebi HSakallah KMarkov I(2012)Conflict anticipation in the search for graph automorphismsProceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning10.1007/978-3-642-28717-6_20(243-257)Online publication date: 11-Mar-2012
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Nadel ABloem RSharygina N(2010)Boosting minimal unsatisfiable core extractionProceedings of the 2010 Conference on Formal Methods in Computer-Aided Design10.5555/1998496.1998537(221-229)Online publication date: 20-Oct-2010
https://dl.acm.org/doi/10.5555/1998496.1998537
Dwoskin JGomathisankaran MChen YLee RGates CFranz MMcDermott J(2010)A framework for testing hardware-software security architecturesProceedings of the 26th Annual Computer Security Applications Conference10.1145/1920261.1920318(387-397)Online publication date: 6-Dec-2010
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Nadel ARyvchin V(2010)Assignment stack shrinkingProceedings of the 13th international conference on Theory and Applications of Satisfiability Testing10.1007/978-3-642-14186-7_35(375-381)Online publication date: 11-Jul-2010
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Aloul FRamani AMarkov ISakallah K(2009)Dynamic symmetry-breaking for Boolean satisfiabilityAnnals of Mathematics and Artificial Intelligence10.1007/s10472-010-9173-257:1(59-73)Online publication date: 1-Sep-2009
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Luo LWong MKyung CChoi KHa S(2008)Ordered escape routing based on Boolean satisfiabilityProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356865(244-249)Online publication date: 21-Jan-2008
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Ansótegui CLarrubia JLi CManyà F(2007)Exploiting multivalued knowledge in variable selection heuristics for SAT solversAnnals of Mathematics and Artificial Intelligence10.1007/s10472-007-9062-549:1-4(191-205)Online publication date: 1-Apr-2007
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