article

SystemC-based HW/SW co-simulation platform for system-on-chip (SoC) design space exploration

Authors:

M. Khalil-HaniAuthors Info & Claims

International Journal of Information and Communication Technology, Volume 2, Issue 1/2

Pages 108 - 119

https://doi.org/10.1504/IJICT.2009.026434

Published: 01 June 2009 Publication History

Abstract

The development of digital designs today is much more complex than before, as they now impose more severe demands and require greater number of functionalities to be conceived. The current approach, based on the register transfer level (RTL) design methods, can result in extremely long simulation time compounded with time-consuming verification process. Hence, today digital system design begins with modelling at a higher level of design abstraction, that is, the electronic system level (ESL). This paper presents a hardware-software (HW/SW) co-simulation environment based on SystemC for application in the design of system-on-chip (SoC). We discuss the SystemC modelling of the hardware and the software parts of the system, and the interprocess communication module of the co-simulation platform. Its objective is to help designers obtain an appropriate HW/SW partitioning that satisfy specified area-speed design tradeoffs. Besides, an early system verification can also be carried out with a high simulation speed. A case study of a SoC implementing elliptic curve cryptography (ECC) is presented to validate the co-simulation platform in terms of system functionality verification and design space exploration.

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Cited By

Nambiar VBalakrishnan SKhalil-Hani MMarsono M(2013)HW/SW co-design of reconfigurable hardware-based genetic algorithm in FPGAs applicable to a variety of problemsComputing10.1007/s00607-013-0305-595:9(863-896)Online publication date: 1-Sep-2013
https://dl.acm.org/doi/10.1007/s00607-013-0305-5

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cover image International Journal of Information and Communication Technology

International Journal of Information and Communication Technology Volume 2, Issue 1/2

June 2009

162 pages

ISSN:1466-6642

EISSN:1741-8070

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Inderscience Publishers

Geneva 15, Switzerland

Publication History

Published: 01 June 2009

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Cited By

Nambiar VBalakrishnan SKhalil-Hani MMarsono M(2013)HW/SW co-design of reconfigurable hardware-based genetic algorithm in FPGAs applicable to a variety of problemsComputing10.1007/s00607-013-0305-595:9(863-896)Online publication date: 1-Sep-2013
https://dl.acm.org/doi/10.1007/s00607-013-0305-5

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