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Testing semiconductor memories: theory and practiceAugust 1991
Publisher:
  • John Wiley & Sons, Inc.
  • 605 Third Ave. New York, NY
  • United States
ISBN:978-0-471-92586-6
Published:01 August 1991
Pages:
512
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Abstract

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  154. van de Goor A, Offerman A and Schanstra I Towards a Uniform Notation for Memory Tests Proceedings of the 1996 European conference on Design and Test
  155. Sachdev M Test and Testability Techniques for Open Defects in RAM Address Decoders Proceedings of the 1996 European conference on Design and Test
  156. Mikitjuk V, Yarmolik V and van de Goor A RAM Testing Algorithm for Detection Linked Coupling Faults Proceedings of the 1996 European conference on Design and Test
  157. ACM
    Stroud C, Chen P, Konala S and Abramovici M Evaluation of FPGA resources for built-in self-test of programmable logic blocks Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays, (107-113)
  158. Rai S and Kirpalani V (1996). A Modified TRAM Architecture, IEEE Transactions on Computers, 45:8, (969-974), Online publication date: 1-Aug-1996.
  159. van de Goor A, Schanstra I and Zorian Y Functional test for shifting-type FIFOs Proceedings of the 1995 European conference on Design and Test
  160. Karpovsky M, van de Goor A and Yarmolik V Pseudo-exhaustive word-oriented DRAM testing Proceedings of the 1995 European conference on Design and Test
  161. Janssen J and Corporaal H Partitioned register file for TTAs Proceedings of the 28th annual international symposium on Microarchitecture, (303-312)
  162. Sosnowski J (1994). Transient Fault Tolerance in Digital Systems, IEEE Micro, 14:1, (24-35), Online publication date: 1-Feb-1994.
  163. Treuer R and Agarwal V (1993). Built-In Self-Diagnosis for Repairable Embedded RAMs, IEEE Design & Test, 10:2, (24-33), Online publication date: 1-Apr-1993.
  164. van Sas J, Catthoor F and De Man H (1993). Test Algorithms for Double-Buffered Random Access and Pointer-Addressed Memories, IEEE Design & Test, 10:2, (34-44), Online publication date: 1-Apr-1993.
  165. Van De Goor A (1993). Using March Tests to Test SRAMs, IEEE Design & Test, 10:1, (8-14), Online publication date: 1-Jan-1993.
  166. Zorian Y and Ivanov A (1992). An Effective BIST Scheme for ROM's, IEEE Transactions on Computers, 41:5, (646-653), Online publication date: 1-May-1992.
Contributors
  • Delft University of Technology

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