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Proceeding Downloads
VDA: A Simple but Efficient Virtual-Channel-Based Deadlock Avoidance Scheme for Scalable Chiplet Networks
With the escalating computation capability demands of AI and other applications, chiplet technology has emerged as a prominent force in the current market, offering scalability and cost-effectiveness. One of the most critical issues in chiplet-based ...
TTNNM: Thermal- and Traffic-Aware Neural Network Mapping on 3D-NoC-based Accelerator
3D Network on Chips (3D-NoCs) have ample on-chip wiring resources and high bandwidth, yet face numerous hotspots and higher temperature gradients due to increased integration and power density. This could lead to device failure, impacting system ...
An Embedded Multi-Layer Spiral Square Inductor for Integrated Power Delivery - Physical Design and Analytical Models
Planar inductors are widely utilized in traditional, PCB-level switching mode power supplies. To mitigate prohibitive power loss in modern high-performance integrated systems, power converters should be embedded closer to points-of-load (POLs). The ...
On Advanced Methodologies for Microarchitecture Design Space Exploration
With the ever-increasing complexity of microprocessors, microarchitectural design becomes over-challenging. Design space exploration (DSE) of microarchitecture configurations to obtain high-quality designs with different PPA trade-offs is time-consuming,...
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Acceptance Rates
Year | Submitted | Accepted | Rate |
---|---|---|---|
GLSVLSI '18 | 197 | 48 | 24% |
GLSVLSI '17 | 197 | 48 | 24% |
GLSVLSI '16 | 197 | 50 | 25% |
GLSVLSI '15 | 148 | 41 | 28% |
GLSVLSI '14 | 179 | 49 | 27% |
GLSVLSI '13 | 238 | 76 | 32% |
Overall | 1,156 | 312 | 27% |