GLSVLSI

With minimal compromises on other metrics, eliminating overflow and lowering congestion level of global routing results as much as possible is a crucial topic for reducing violations and hotspots in subsequent design phases. Different from current common ...

With advanced semiconductor technology progressing well into sub-7nm scale, voltage drop has become an increasingly challenging issue. As a result, there has been extensive research focused on predicting and mitigating dynamic IR drops, leading to the ...

To improve the power delivery network (PDN) efficiency under the consideration of scaling trends, back-side PDN has been proposed. To well utilize the remaining routing resources on the back side after constructing the PDN, a pioneering work [4] ...

As semiconductor manufacturing technologies progress beyond the current 3nm, the demand for more compact and powerful VLSI circuits obliges on-chip power grid networks to become denser, resulting in a substantial increase in current densities. ...