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- research-articleNovember 2023
Trade-off Mechanism Between Reliability and Performance for Data-flow Soft Error Detection
Journal of Electronic Testing: Theory and Applications (JELT), Volume 39, Issue 5-6Pages 583–595https://doi.org/10.1007/s10836-023-06087-2AbstractThe high energy particles in the space environment will perturb integrated circuits, resulting in system errors or even failures, which is also known as single event effects (SEE). To ensure the normal operation of space systems, it is first ...
- research-articleDecember 2022
Development of a Simplified Programming Kit Based 16LF18856 for Embedded Systems Testing and Education in Developing Countries
- Jean de Dieu Nguimfack-Ndongmo,
- Kevin Kentsa Zana,
- Derek Ajesam Asoh,
- Nicole Adélaïde Kengnou Telem,
- René Kuate-Fochie,
- Godpromesse Kenné
Journal of Electronic Testing: Theory and Applications (JELT), Volume 38, Issue 6Pages 589–602https://doi.org/10.1007/s10836-022-06037-4AbstractEmbedded systems and applications have recently emerged as a domain of high interest to the general public in developing countries. Unfortunately, these countries lack the technological infrastructure for the design, testing, and implementation of ...
- research-articleAugust 2022
Novel Fault-Tolerant Processing in Memory Cell in Ternary Quantum-Dot Cellular Automata
Journal of Electronic Testing: Theory and Applications (JELT), Volume 38, Issue 4Pages 419–444https://doi.org/10.1007/s10836-022-06018-7AbstractProcessing-in-memory (PIM) is a computational architecture in which the processing unit and memory are integrated into a single unit. Different technologies and methods can be used to implement PIM, but a more optimal design for PIM can be ...
- research-articleApril 2022
FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications
- research-articleFebruary 2022
A New Neural Network Based on CNN for EMIS Identification
Journal of Electronic Testing: Theory and Applications (JELT), Volume 38, Issue 1Pages 77–89https://doi.org/10.1007/s10836-022-05985-1AbstractElectromagnetic interference sources (EMIS) must be identified in order to locate them promptly. Because representative features of EMIS broadband signals are difficult to extract, we propose a new identification method based on convolutional ...
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- research-articleDecember 2021
Stress-Aware Periodic Test of Interconnects
Journal of Electronic Testing: Theory and Applications (JELT), Volume 37, Issue 5-6Pages 715–728https://doi.org/10.1007/s10836-021-05979-5AbstractSafety-critical systems have to follow extremely high dependability requirements as specified in the standards for automotive, air, and space applications. The required high fault coverage at runtime is usually obtained by a combination of ...
- research-articleAugust 2021
Neural Network-based Online Fault Diagnosis in Wireless-NoC Systems
Journal of Electronic Testing: Theory and Applications (JELT), Volume 37, Issue 4Pages 545–559https://doi.org/10.1007/s10836-021-05966-wAbstractThe recent development of wireless Network-on-Chip (WiNoC) by introducing wireless interface in traditional wired NoC has significantly increased the performance of NoC systems with higher bandwidth and low latency on-chip communication. However, ...
- research-articleAugust 2021
Fault-Aware Dependability Enhancement Techniques for Phase Change Memory
Journal of Electronic Testing: Theory and Applications (JELT), Volume 37, Issue 4Pages 503–513https://doi.org/10.1007/s10836-021-05961-1AbstractA variety of resistive memories have been proposed in recent years. Among these emerging technologies, phase change memory (PCM) has received the most research attentions since it has the advantages of high scalability, non-volatility, fast access,...
- research-articleJune 2021
A Numeral System Based Framework for Improved One-Lambda Crosstalk Avoidance Code Using Recursive Symmetry Formula
Journal of Electronic Testing: Theory and Applications (JELT), Volume 37, Issue 3Pages 395–408https://doi.org/10.1007/s10836-021-05950-4AbstractCrosstalk fault on the chip wires seriously jeopardizes data reliability. One of the most effective methods to reduce crosstalk fault is crosstalk fault avoidance coding (CAC) based on numeral systems. CAC methods reduce crosstalk fault by ...
- research-articleApril 2021
Fault Diagnosis Method of Low Noise Amplifier Based on Support Vector Machine and Hidden Markov Model
Journal of Electronic Testing: Theory and Applications (JELT), Volume 37, Issue 2Pages 215–223https://doi.org/10.1007/s10836-021-05938-0AbstractRadio Frequency (RF) analog circuit failures often occur in broadband, high voltage and high temperature environment, so how to determine fault location and forecast the time which failure is going to occur is an important topic. Based on actual ...
- research-articleDecember 2020
Low-Cost Error Detection in Deep Neural Network Accelerators with Linear Algorithmic Checksums
Journal of Electronic Testing: Theory and Applications (JELT), Volume 36, Issue 6Pages 703–718https://doi.org/10.1007/s10836-020-05920-2AbstractThe widespread adoption of deep neural networks in safety-critical systems necessitates the examination of the safety issues raised by hardware errors. The appropriateness of the concern is herein confirmed by evidencing the possible catastrophic ...
- research-articleAugust 2020
Evaluation of Ionizing Radiation Effects on Device Modules Used in Wireless-Based Monitoring Systems
Journal of Electronic Testing: Theory and Applications (JELT), Volume 36, Issue 4Pages 499–508https://doi.org/10.1007/s10836-020-05890-5AbstractTo increase the reliability of wireless-based monitoring systems under ionizing radiation environments, multiple diversified commercial off-the-shelf (COTS) modules have been used to achieve radiation tolerance. This paper presents experimental ...
- research-articleDecember 2019
DVFS Based Error Avoidance Strategy in Wireless Network-on-Chip
Journal of Electronic Testing: Theory and Applications (JELT), Volume 35, Issue 6Pages 767–777https://doi.org/10.1007/s10836-019-05841-9AbstractIn wireless on-chip network, the reliability of data packet transmission in the link faces great challenges due to crosstalk between lines, noise and transient faults, which seriously affects the overall performance of the network. Therefore, ...
- articleJune 2019
Assessing the Reliability of Successive Approximate Computing Algorithms under Fault Injection
- Gennaro S. Rodrigues,
- Ádria Barros De Oliveira,
- Fernanda Lima Kastensmidt,
- Vincent Pouget,
- Alberto Bosio
Journal of Electronic Testing: Theory and Applications (JELT), Volume 35, Issue 3Pages 367–381https://doi.org/10.1007/s10836-019-05806-yThis work presents two fault injection and dependability test methodologies exploring the fault tolerance of successive approximation algorithms. This type of approximate computing algorithm can present an inherent fault tolerance, converging to a final ...
- articleApril 2019
A Low-Cost Test Solution for Reliable Communication in Networks-on-Chip
Journal of Electronic Testing: Theory and Applications (JELT), Volume 35, Issue 2Pages 215–243https://doi.org/10.1007/s10836-019-05792-1Networks-on-chip (NoC) provide the communication infrastructure for high-speed and large-scale computation that integrates several IP-cores on a single die. Faults on network channels severely degrade system performance and throughput. This paper ...
- articleApril 2019
Memory-Aware Design Space Exploration for Reliability Evaluation in Computing Systems
Journal of Electronic Testing: Theory and Applications (JELT), Volume 35, Issue 2Pages 145–162https://doi.org/10.1007/s10836-019-05785-0In this paper, we present an analytical methodology to measure the vulnerability of the memory components of a microprocessor-based computing system. It is based on the data and the instruction lifetime and residence. The proposed approach considers ...
- articleFebruary 2019
Fault Tolerant Soft-Core Processor Architecture Based on Temporal Redundancy
Journal of Electronic Testing: Theory and Applications (JELT), Volume 35, Issue 1Pages 9–27https://doi.org/10.1007/s10836-019-05778-zEmbedded soft-core processors are becoming the usual solution to deal with network and data communications inside FPGAs. However, when developing space-based applications, the designer must consider the effects of ionizing radiation such as Total ...
- articleOctober 2018
Fault Leveling Techniques for Yield and Reliability Enhancement of NAND Flash Memories
Journal of Electronic Testing: Theory and Applications (JELT), Volume 34, Issue 5Pages 559–570https://doi.org/10.1007/s10836-018-5752-7Novel fault leveling techniques based on address remapping (AR) are proposed in this paper. We can change the logical-to-physical address mapping of the page buffer such that faulty cells within a flash page can be evenly distributed into different ...