Quantum information science (QIS) aims at controlling quantum coherence effects in light and matter in order to enable new information processing capabilities that are not possible with classical resources. Quantum information can be encoded in photons ...

The emergence of non-volatile memory technologies such as Spin Torque Transfer Magneto-resistive Random Access Memory RAM and Phase Change Memories provide new opportunities for architectural innovations. While the zero off-state leakage, fast read ...

As the fabrication technology node shrinks down to 90nm or below, high standby power becomes one of the major critical issues for CMOS logic circuits due to the high leakage currents. A number of non-volatile storage technologies such as FRAM, MRAM, ...

Voltage stacking has been proposed as an efficient solution for power delivery in high performance processors, for 3D ICs, for pin-limited ICs, and for implicit sleep mode (standby) DC/DC conversion. In this paper we demonstrate voltage stacking for an ...

Robust, high-performance and low-power match-line sense amplifier designs are urgently required to catch up with the new requirements of large-scale CAMs in nano-scale CMOS technologies. In this paper we evaluate the performance of four state-of-the-art ...

This paper considers the problem of increasing the storage density in fault-tolerant VLSI systems which require only limited data retention times. To this end, the concept of storing many bits per memory cell is applied to area-efficient and fully logic-...

This paper proposes a novel L1 data cache design with dual-versioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this new cache architecture, each dvSRAM cell has two cells, a main cell and a ...

Previous works have shown that typical power management knobs such as voltage scaling or power gating can also be exploited to reduce aging phenomena caused by Negative Bias Temperature Instability (NBTI). We propose a scheme for power-managed caches ...

With CMOS technology scaling, data stability and yield have become key concerns of low power embedded memories, which are realized using the static random access memory (SRAM). In this paper, we propose a seven transistor (7T) SRAM bit-cell to address ...

The ternary content addressable memory (TCAM) is widely used in the network router to speed up the forwarding table lookup, but it usually consumes a large amount of power. This paper introduces a low-power TCAM design, in which we propose the mask-...

DRAMs consume a large portion of total system energy consumption. Thus, reducing DRAM energy consumption is able to prolong the lifetime of battery-operated embedded/portable systems. To this end, we propose DRAM energy-aware data prefetching scheme to ...

Power and delay induced from long on-chip interconnections are becoming major issues of chip multiprocessor design. Both network-on-chip (NoC) and three-dimensional integration are promising ways to mitigate the interconnection problem. In this paper, ...

Exciting developments are taking place in the field of spintronics, particularly with the advances in the fabrication and characterization of devices such as Magnetic Tunnel Junctions (MTJ). The distinction of spintronic devices from conventional ...