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A path-load based adaptive routing algorithm for networks-on-chip

Published: 31 August 2009 Publication History

Abstract

Applications executing in current MPSoCs present traffic behavior with different characteristics in terms of QoS requirements and traffic modeling. Another important MPSoC traffic feature is its unpredictability and dynamic nature. Networks-on-chip (NoCs) are communication structures being used due to higher degree of parallelism, fault tolerance, and scalability, when compared to busses. Even with increased bandwidth due to parallelism, some flows may compete for the same network resources, affecting the applications performance, and possibly violating QoS requirements. Adaptive routing algorithms may reduce such congestion, enabling dynamic path modification according to some congestion evaluation metric. State of the art approaches have a limited view of the congestion areas, since each router take routing decisions based on its neighbors congestion status. Such local decision may lead packets to another NoC congested region, therefore being inefficient. This paper proposes a new method, using the information of all routers in the source-target path. This method relies on a protocol for QoS session establishment, followed by distributed monitoring, and reroute to non-congested routers. The set of executed experiments presents results concerning latency and buffer utilization when the method proposed is applied.

References

[1]
Tedesco, L. et al. "Application Driven Traffic Modeling for NoCs". In: SBCCI'06, pp. 62--67.
[2]
Al Faruque, M. A. et al. "ROAdNoC: Runtime Observability for an Adaptive Network on Chip Architecture". In: ICCAD'08, pp. 543--548.
[3]
Ogras, U. Y.; Marculescu, R. "Analysis and Optimization of Prediction-Based Flow Control in Networks-on-Chip". ACM Transaction on Design Automation of Electronic Systems, v. 13(1), 2008, article 11, 28p.
[4]
Manolache, S. et al. "Buffer Space Optimisation with Communication Synthesis and Traffic Shaping for NoCs". In: DATE'06, pp. 1--6.
[5]
Mello, A. et al. "Rate-based Scheduling Policy for QoS Flows in Networks on Chip". In: VLSI-SOC 2007, pp. 140--145.
[6]
Li, M. et al. "DyXY - A Proximity Congestion-aware Deadlock-free Dynamic Routing Method for Network on Chip". In: DAC'06, pp. 849--852.
[7]
Hu, J.; Marculescu, R. "Dyad -- Smart routing for networks on chip". In: DAC'04, pp. 260--263.
[8]
Lotfi-Kamran, P. et al. "BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs". In: DATE'08, pp. 1408--1413.
[9]
Al Faruque, M. A. et al. "Run-time Adaptive On-chip Communication Scheme". In: ICCAD'07, pp. 26--31.
[10]
Gratz, P. et al. "Regional Congestion Awareness for Load Balance in Networks-on-Chip". In: HPCA'08, pp. 203--214.
[11]
Lattard, D. et al. "A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip". IEEE Journal of Solid State Circuits, v. 43(1), 2008, pp 223--235.

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  • (2011)A new fault-tolerant and congestion-aware adaptive routing algorithm for regular Networks-on-Chip2011 IEEE Congress of Evolutionary Computation (CEC)10.1109/CEC.2011.5949923(2465-2472)Online publication date: Jun-2011

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cover image ACM Conferences
SBCCI '09: Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
August 2009
325 pages
ISBN:9781605587059
DOI:10.1145/1601896
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 31 August 2009

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Author Tags

  1. dynamic routing
  2. networks on chip
  3. quality of service
  4. traffic monitoring

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  • Research-article

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SBCCI '09
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SBCCI '09 Paper Acceptance Rate 50 of 119 submissions, 42%;
Overall Acceptance Rate 133 of 347 submissions, 38%

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  • (2011)A new fault-tolerant and congestion-aware adaptive routing algorithm for regular Networks-on-Chip2011 IEEE Congress of Evolutionary Computation (CEC)10.1109/CEC.2011.5949923(2465-2472)Online publication date: Jun-2011

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