research-article

Congestion aware, fault tolerant, and thermally efficient inter-layer communication scheme for hybrid NoC-bus 3D architectures

Authors:

Amir-Mohammad Rahmani,

Kameswar Rao Vaddina,

Pasi Liljeberg,

Hannu TenhunenAuthors Info & Claims

NOCS '11: Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip

Pages 65 - 72

https://doi.org/10.1145/1999946.1999957

Published: 01 May 2011 Publication History

Abstract

Three-dimensional IC technology offers greater device integration and shorter interlayer interconnects. In order to take advantage of these attributes, 3D stacked mesh architecture was proposed which is a hybrid between packet-switched network and a bus. Stacked mesh is a feasible architecture which provides both performance and area benefits, while suffering from inefficient intermediate buffers. In this paper, an efficient architecture to optimize system performance, power consumption, and reliability of stacked mesh 3D NoC is proposed. The mechanism benefits from a congestion-aware and bus failure tolerant routing algorithm called AdaptiveZ for vertical communication. In addition, we hybridize the proposed adaptive routing with available algorithms to mitigate the thermal issues by herding most of the switching activities closer to the heat sink. Our extensive simulations with synthetic and real benchmarks, including the one with an integrated videoconference application, demonstrate significant power, performance, and peak temperature improvements compared to a typical stacked mesh 3D NoC.

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Cited By

Dinesh Kumar TKarthikeyan A(2023)Dynamic low power management technique for decision directed inter-layer communication in three dimensional wireless network on chipAutomatika10.1080/00051144.2023.226108864:4(1280-1295)Online publication date: 6-Oct-2023
https://doi.org/10.1080/00051144.2023.2261088
Melo DZeferino CBezerra EDilillo L(2021)Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)10.1109/DTIS53253.2021.9505053(1-6)Online publication date: 28-Jun-2021
https://doi.org/10.1109/DTIS53253.2021.9505053
Melo DZeferino CDilillo LBezerra E(2019)Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers DesignSensors10.3390/s1924541619:24(5416)Online publication date: 9-Dec-2019
https://doi.org/10.3390/s19245416
Show More Cited By

Index Terms

Congestion aware, fault tolerant, and thermally efficient inter-layer communication scheme for hybrid NoC-bus 3D architectures
1. Hardware

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Published In

cover image ACM Conferences

NOCS '11: Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip

May 2011

282 pages

ISBN:9781450307208

DOI:10.1145/1999946

General Chairs:
Radu Marculescu
CMU
,
Mike Kishinevsky
Intel
,
Program Chairs:
Ran Ginosar
Technion, Israel
,
Karam S. Chatha
Arizona State University

Copyright © 2011 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 May 2011

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NOCS'11

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NOCS'11: International Symposium on Networks-on-Chips

May 1 - 4, 2011

Pennsylvania, Pittsburgh

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Overall Acceptance Rate 14 of 44 submissions, 32%

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Cited By

Dinesh Kumar TKarthikeyan A(2023)Dynamic low power management technique for decision directed inter-layer communication in three dimensional wireless network on chipAutomatika10.1080/00051144.2023.226108864:4(1280-1295)Online publication date: 6-Oct-2023
https://doi.org/10.1080/00051144.2023.2261088
Melo DZeferino CBezerra EDilillo L(2021)Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)10.1109/DTIS53253.2021.9505053(1-6)Online publication date: 28-Jun-2021
https://doi.org/10.1109/DTIS53253.2021.9505053
Melo DZeferino CDilillo LBezerra E(2019)Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers DesignSensors10.3390/s1924541619:24(5416)Online publication date: 9-Dec-2019
https://doi.org/10.3390/s19245416
de Melo DAlbenes Zeferino CDilillo LBezerra E(2019)Analyzing the Error Propagation in a Parameterizable Network-on-Chip Router2019 IEEE Latin American Test Symposium (LATS)10.1109/LATW.2019.8704580(1-6)Online publication date: Mar-2019
https://doi.org/10.1109/LATW.2019.8704580
Badawy AGardea JJin YCook J(2018)3D-PIM NoCs with Multiple Subnetworks: A Performance and Power Evaluation2018 IEEE 37th International Performance Computing and Communications Conference (IPCCC)10.1109/PCCC.2018.8710763(1-8)Online publication date: Nov-2018
https://doi.org/10.1109/PCCC.2018.8710763
Sujatha MJayagowri R(2018)A Review on Hybrid Network on Chip2018 International Conference on Current Trends towards Converging Technologies (ICCTCT)10.1109/ICCTCT.2018.8551009(1-11)Online publication date: Mar-2018
https://doi.org/10.1109/ICCTCT.2018.8551009
Su NGu HWang KYu XZhang B(2018)A highly efficient dynamic router for application-oriented network on chipThe Journal of Supercomputing10.1007/s11227-018-2334-574:7(2905-2915)Online publication date: 1-Jul-2018
https://dl.acm.org/doi/10.1007/s11227-018-2334-5
Gardea JJin YBadawy ACook J(2017)Performance Evaluation of Mesh-based 3D NoCsProceedings of the 10th International Workshop on Network on Chip Architectures10.1145/3139540.3139545(1-6)Online publication date: 14-Oct-2017
https://dl.acm.org/doi/10.1145/3139540.3139545
Li KWang S(2017)Design Methodology of Fault-Tolerant Custom 3D Network-on-ChipACM Transactions on Design Automation of Electronic Systems10.1145/305474522:4(1-20)Online publication date: 20-May-2017
https://dl.acm.org/doi/10.1145/3054745
Dash RRisco-Martín JTuruk AAyala Jde Rango FRisco Martín J(2016)A thermal driven genetic algorithm for three dimensional network-on-chip systemsProceedings of the Summer Computer Simulation Conference10.5555/3015574.3015621(1-8)Online publication date: 24-Jul-2016
https://dl.acm.org/doi/10.5555/3015574.3015621
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