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Networks on chipJanuary 2003
- Editors:
- Axel Jantsch,
- Hannu Tenhunen
Abstract
No abstract available.
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chapter
chapter
Will networks on chip close the productivity gap?
Pages 3–18
We introduce two properties of the design process called the arbitrary composability and the linear effort properties. We argue that a design paradigm, which has these two properties is scalable and has the potential to keep up with the pace of ...
chapter
A design methodology for NOC-based systems
Pages 19–38
Diversity of computational requirements of information technology products will increase. The products will be based on computers, but the full exploitation of silicon capacity will require improvements in design productivity and system architectures. ...
chapter
Mapping concurrent applications onto architectural platforms
Pages 39–59
Embedded system designers are faced with an expanding array of challenges 1in both application and architecture design. One challenge is the task of modelling heterogeneous concurrent applications. Another is the task of finding a programming model for ...
chapter
Guaranteeing the quality of services in networks on chip
- Kees Goossens,
- John Dielissen,
- Jef van Meerbergen,
- Peter Poplavko,
- Andrei Rădulescu,
- Edwin Rijpkema,
- Erwin Waterlander,
- Paul Wielage
Pages 61–82
Users expect a predictable quality of service (QOS) of embedded systems, even for future, more dynamic, applications. System-on-chip designers use networks on chip (NOC) to solve deep submicron problems, and to divide global problems into local, ...
chapter
On packet switched networks for on-chip communication
Pages 85–106
Designing a system on a chip with large number of cores poses many challenging problems. Designing a flexible on-chip communication network, which can provide the desired bandwidth and can be reused across many applications, is the key problem. In this ...
chapter
Energy-reliability trade-off for NoCs
Pages 107–129
Solutions for combined energy minimization and communication reliability control have to be developed for SoC networks. Redundant encodings and error-resilient protocols create new degrees of freedom for trading off energy against realiability and ...
chapter
Testing strategies for networks on chip
Pages 131–152
The complexity of Networks-on-Chip (NoC) makes the application of traditional test methods obsolete. For NoC, a combination of methods known from the System-on-Chip, memory and FPGA test areas should be used. That includes functional test, scan test, ...
chapter
Clocking strategies for networks-on-chip
Pages 153–172
One of the main problems when designing today's ASICs, is to distribute a skew-free synchronous clock over the whole chip. A large part of the power is also consumed in the clock-tree, in some cases as much as 50% of the total power consumption of the ...
chapter
A parallel computer as a NOC region
Pages 173–192
A network on chip (NOC) scheme relying on reuse of existing intellectual property blocks and a unified communication solution has been proposed for solving architectural and design productivity problems of future systems on chips. A NOC consists of a ...
chapter
NOC Application programming interfaces: high level communication primitives and operating system services for power management
Pages 239–260
Due to its heterogeneous and distributed nature, programming NoC communications may be very complicated if we treat NoC as individual elements of resources, switches, and interfaces. To mitigate the complexity, we raise the abstraction level and take ...
chapter
Multi-level software validation for NOC
Pages 261–279
This chapter presents a problem in conventional methods of validating software design for NoC: software validation at different abstraction levels. As a solution to resolve the problem, a method of multi-level software validation is explained.
chapter
Software for multiprocessor networks on chip
Pages 281–303
Multiprocessor SoC becomes increasingly software-intensive due to multiplatform design, real-time performance, robustness, reliability, availability, and safety constraints. In this chapter, we examine multiprocessor SoC software, by focusing on user-...
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Index Terms
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