research-article

Shared hardware data structures for hard real-time systems

Authors:

Gabriel Parmer,

Bhagirath Narahari,

Rahul SimhaAuthors Info & Claims

EMSOFT '12: Proceedings of the tenth ACM international conference on Embedded software

Pages 133 - 142

https://doi.org/10.1145/2380356.2380382

Published: 07 October 2012 Publication History

Abstract

Hardware support can reduce the time spent operating on data structures by exploiting circuit-level parallelism. Such hardware data structures (HWDSs) can reduce the latency and jitter of data structure operations, which can benefit real-time systems by reducing worst-case execution times (WCETs). For example, a hardware priority queue (HWPQ) can enqueue and dequeue prioritized items in constant time with low variance; the best software implementations are in logarithmic-time asymptotic complexity for at least one of the enqueue or dequeue operations. The main problems with HWDSs are the limited size of hardware and the complexity of sharing it. In this paper we show that software support can help circumvent the size and sharing limitations of hardware so that applications can benefit from a HWDS. We evaluate our work by showing how the choice of software or hardware affects schedulability of task sets that use multiple priority queues of varying sizes. We model task behavior on two applications that are important in real-time and embedded domains: the grey-weighted distance transform for topology mapping and Dijkstra's algorithm for GPS navigation. Our results indicate that HWDSs can reduce the WCET of applications even when a HWDS is shared by multiple data structures or when data structure sizes exceed HWDS size constraints.

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cover image ACM Conferences

EMSOFT '12: Proceedings of the tenth ACM international conference on Embedded software

October 2012

266 pages

ISBN:9781450314251

DOI:10.1145/2380356

General Chairs:
Ahmed Jerraya
CEA
,
Luca Carloni
Columbia University
,
Program Chairs:
Florence Maraninchi
Grenoble INP & VERIMAG
,
John Regehr
University of Utah

Copyright © 2012 ACM.

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Published: 07 October 2012

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ESWEEK'12

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ESWEEK'12: Eighth Embedded System Week

October 7 - 12, 2012

Tampere, Finland

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https://doi.org/10.1109/MECO55406.2022.9797213
Derafshi DNorollah AKhosroanjam MBeitollahi H(2020)HRHS: A High-Performance Real-Time Hardware SchedulerIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2019.295213631:4(897-908)Online publication date: 1-Apr-2020
https://doi.org/10.1109/TPDS.2019.2952136
Kohutka LNagy LStopjakova V(2020)RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems2020 9th Mediterranean Conference on Embedded Computing (MECO)10.1109/MECO49872.2020.9134328(1-4)Online publication date: Jun-2020
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Kohutka LNagy LStopjakova V(2019)A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time SystemsJournal of Circuits, Systems and Computers10.1142/S021812661940005XOnline publication date: 26-Mar-2019
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Benacer IBoyer FSavaria Y(2019)HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking DevicesIEEE Access10.1109/ACCESS.2019.29391547(130672-130684)Online publication date: 2019
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Benacer IBoyer FSavaria Y(2018)A Fast, Single-Instruction–Multiple-Data, Scalable Priority QueueIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.283804426:10(1939-1952)Online publication date: Oct-2018
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